Wafer Delay Research Articles

Wafer Delay Minimization in Scheduling Single-Arm Cluster Tools with Two-Space Process Modules

Wafer Delay Minimization in Scheduling Single-Arm Cluster Tools with Two-Space Process Modules

Scheduling of time-constrained single-arm cluster tools with purge operations in wafer fabrications

Purge operations are widely used to remove residual chemicals and impurities in chambers of wafer fabrication systems to ensure wafer quality. However, such operations lead to more start-up transient processes and wafer delays. In addition, wafer residency time constraints must be met to ensure the wafer quality. Thus, the system scheduling problem with such considerations will become more complicated. This work aims to optimize the start-up transient process of a single-arm cluster tool with purge operations and wafer residency time constraints by using resource-oriented Petri net (ROPN) models. Based on the models, we dynamically depict the behavior of the steady state and start-up transient processes of a single-arm cluster tool with purge operations. Then, a scheduling method that dynamically adjusts the robot waiting time is proposed to find an optimal schedule for such systems with purge operations and wafer residency time constraints. Finally, some examples are tested to illustrate the effectiveness of our method.

Feedback Control of Cluster Tools: Stability Against Random Time Disruptions

In this research, we examine <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">feedback control</i> -based cluster tool scheduling methods to maintain <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">consistent</i> wafer sojourn times when a tool is subject to <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">random disruptive events</i> . In our previous work, we proposed a feedback control design that regulates wafer sojourn times not to exceed the upper limits on wafer delays in a deterministic processing environment. Although such a feedback controller may ensure that wafer delay upper limits are always satisfied, it does not necessarily guarantee that the tool always restores its initial tool state after the occurrence of time disruptive events. This article thus further examines under which conditions a feedback controller enforces the wafer sojourn times to be <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">stabilized</i> in a <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">stochastic</i> processing environment with unexpected random time disruptions. <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Note to Practitioners</i> —In semiconductor manufacturing, excessive wafer sojourn times at wafer fabrication tools increase the risk of wafer quality failures. In particular, the wafer quality fluctuates when the sojourn times are inconsistent over different wafers. Therefore, in cluster tools, wafer sojourn times are often strictly regulated to be minimized or to remain constant with an objective of reducing the risk of wafer quality degradation. In this research, we examine a cluster tool scheduling framework that enables to maintain stable tool operations even when a tool is randomly disrupted by unexpected exceptional events.

Wafer Delay Analysis and Workload Balancing of Parallel Chambers for Dual-Armed Cluster Tools With Multiple Wafer Types

We examine a scheduling problem for a dual-armed cluster tool that processes multiple similar wafer types concurrently. It has been recently proved that the well-known swap sequence, which is widely used for single wafer type processing, also minimizes the cycle time for concurrent processing. In this article, we wish to minimize wafer delays in a process chamber, which are critical to wafer quality degradation, while maintaining the minimum cycle time. In particular, we show that concurrent processing of wafers with different processing times complicates the analysis of wafer delays significantly, and the wafer delays can be remarkably reduced by finding a proper cycle plan which is the release sequence of different wafer types. We first characterize wafer delays for a given cycle plan by analyzing the circuits of the timed event graph (TEG) model. From this, we prove that concurrent processing of wafers may cause a significant workload imbalance between parallel chambers of a process step, and hence the wafer delays increase substantially. We present that the wafer delays are minimized by a cycle plan that evenly balances workloads between parallel chambers. We also propose how wafer loading task at each process step has to be postponed to meet wafer delay constraints while maintaining the minimum cycle time. Note to Practitioners —Wafer quality control has become an essential fab operational problem in semiconductor manufacturing industry. In cluster tools, which are dominantly being used for diverse wafer fabrication stages, it has been proven that the wafer delays within process chambers have a crucial impact on the wafer quality. Accordingly, modern fabs have introduced stringent quality control to regulate wafer delays in cluster tools. In this research, we propose a scheduling strategy to minimize the wafer delays when a cluster tool concurrently processes multiple wafer types. We first show that the release sequence of different wafer types significantly impacts the wafer delays under concurrent processing, and we then propose how these wafer delays can be minimized by finding the optimal wafer release sequence.

Reducing Wafer Delay Time by Robot Idle Time Regulation for Single-Arm Cluster Tools

Nowadays, wafer fabrication in semiconductor manufacturing is highly dependent on cluster tools. A cluster tool is equipped with several process modules (PMs) and a wafer handling robot. When the tool is operating, generally each PM is processing a wafer, and the robot is responsible for delivering the wafers from one PM to another. Thus, when a wafer is completed in a PM, the robot may be busy for performing other tasks such that it cannot immediately unload the completed wafer in the PM, resulting in that the wafer has to stay there for some extra time. The processing time of a wafer together with its delay time for waiting for the robot’s arrival for unloading is defined as wafer residency time in a PM. However, a long wafer delay time may deteriorate its quality. Therefore, it is highly desired and important to reduce the wafer delay time at each step as much as possible. This work aims to tackle this important issue for single-arm cluster tools (SACTs). Specifically, by using a Petri net model, this work analyzes the steady-state operational behavior of an SACT under the backward and earliest starting strategies. It is found that there must exist wafer delay time at the steps in the upstream of the bottleneck step, and such wafer delay time can be reduced by properly adjusting the robot waiting time. Thus, three algorithms are developed to reduce the wafer delay time at each step as much as possible by properly assigning the robot idle time. Finally, the application of the proposed method is illustrated by using examples. <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Note to Practitioners</i> —In a modern semiconductor fab, there are hundreds of cluster tools for wafer fabrication. To ensure wafer quality, it is important to reduce the wafer delay time in PMs of cluster tools after a wafer is processed since the high temperature, chemical gas, and particles in the PMs may damage the wafer. To do so, this work proposes three algorithms with polynomial complexity to assign the robot idle time as robot waiting time such that the wafer delay time in PMs can be reduced as much as possible. Furthermore, the obtained schedule by these algorithms is optimal in terms of the cycle time. Besides, the developed algorithms can be easily embedded into the controller of cluster tools by facility engineers. Therefore, this work has a practical value.

Integrated Scheduling of a Dual-Armed Cluster Tool for Maximizing Steady Schedule Patterns

A cluster tool consists of several single-wafer processing chambers and a wafer handling robot. A wafer has to wait within a chamber after being processed there until it is unloaded by the robot. Such wafer delays may cause wafer quality degradation or variability due to residual gases and heat in the chamber. The tool operation schedule has to maintain identical timing patterns or schedules for each cycle so as to keep wafer delays constant for every wafer. However, at the beginning of the tool operation, the tool is in an empty state and hence we need to make the tool reach such steady schedule by loading wafers into the tool. In this article, we develop a method of scheduling the robot tasks during the start-up period of a cluster tool to reach a target steady schedule quickly as possible. To do this, we model the behaviors of a cluster tool using timed Petri nets and linear system matrices in the max-plus algebra. By analyzing the matrices, we first identify a class of steady schedules which can be reached from the empty tool. We develop the matrices that explain the schedule evolution of the start-up period before reaching the steady period. By examining the matrices, we develop a method of choosing the most desirable one from such class of reachable steady schedules that can be achieved in the minimum time. We also prove that the schedule also minimizes the time duration of the close-down. Finally, we present computational experiments.

Robot Waiting Time Analysis and Its Impact on Wafer Delay Time of Single-Arm Cluster Tools

Abstract With the circuit width of a wafer being decreased below 10 nanometers, it is important to reduce the wafer delay time in a process module as much as possible since too long wafer delay time has negative influence on the wafer quality. To do so, based on a Petri net model, we examine the characteristic of the robot wait time under the steady state by an earliest starting strategy. It is found that a unique steady state is reached by such a strategy, leading to inevitable wafer delays in the system. Then, a robot-waiting-time-controlled method is presented to reduce the wafer delays as much as possible by appropriately regulating the robot idle time. Finally, two industrial examples show that the robot-waiting-time-controlled method outperforms the earliest starting strategy in terms of the wafer delay reduction.

Adaptive Scheduling of Cluster Tools With Wafer Delay Constraints and Process Time Variation

A cluster tool consists of several single-wafer processing chambers and a wafer-handling robot. Cluster tools are widely used for wafer fabrication in semiconductor manufacturing fabs. As the circuit width shrinks down to below 20 or even several nanometers, wafer waiting within a chamber after processing becomes more critical to wafer quality due to residual gases and heat. Conventional tool scheduling rules, such as the swap sequence and the backward sequence, may not satisfy strict upper limits on wafer delays, especially when process times fluctuate randomly. We examine a scheduling problem for cluster tools with strict upper limits on wafer delays under process time variation. We propose a new class of schedules, which not only keeps timing patterns steady as possible but also adapts timing of tasks in response to process time variation so as to satisfy wafer delay constraints robustly. We also derive conditions for which there exists such a schedule. We develop a mixed-integer programming model to find an optimal schedule among such adaptive schedules. By numerical experiments, we show that the proposed scheduling method can effectively cope with tight wafer delay constraints even under large process time variations. Note to Practitioners —As the circuit widths shrink down, residual gases and particles within chambers after processing wafers become more critical to wafer quality. In fact, leading fabs are now cleaning a chamber for each new wafer in order to reduce such quality risk. We propose a new practical method for scheduling tools that can significantly reduce such quality risk caused by wafer waiting within chambers after processing.

${K}$ -Cyclic Schedules and the Worst-Case Wafer Delay in a Dual-Armed Cluster Tool

In a cluster tool for semiconductor manufacturing, a wafer waits within a chamber after processing until it is unloaded by the robot. Such wafer delays degrade wafer quality due to residual gases and heat, even cause quality failures. A cluster tool mostly operates in a ${K}$ -cyclic schedule, where an identical timing pattern repeats for each ${K}$ cycles, because of sporadic disruptions in process times or robot task times and the closed-architecture of the tool scheduler. In addition, it is hard to predict the ${K}$ -cyclic schedule that the tool will reach. Such a ${K}$ -cyclic schedule makes wafer delays at each chamber repeat ${K}$ different values. Therefore, such variability of wafer delays increases the risk of quality failure. Therefore, we examine the maximum wafer delay among all possible ${K}$ -cyclic schedules called the worst-case wafer delay in this paper. We first characterize the maximum cyclicity ${K}$ of tool schedules. We then develop closed-form formulas for most frequently used wafer flow patterns and an optimization model that computes the worst-case wafer delay. We also identify factors that affect the worst-case wafer delay and their influences by experiments. Finally, we suggest tool operation guidelines for lowering the worst-case wafer delay.

Wafer delay analysis and control of dual-armed cluster tools with chamber cleaning operations

As the design of integrated circuits has become increasingly complicated and dense, serious wafer quality problems are observed in modern wafer fabrication facilities. Therefore, in cluster tools of leading fabs process chambers are periodically cleaned in order to eliminate residual chemicals and impurities that can damage the wafer quality. A chamber cleaning operation is mainly applied to tools in which a wafer delay has a crucial impact on the wafer quality, and hence the need of wafer delay control becomes more significant when chamber cleaning is considered. Thus, we first examine how wafer delays can be specified for cluster tools with chamber cleaning operations. We confirm that wafer delays are substantially increased when chambers are periodically cleaned, and we show that such increased wafer delays cannot be eliminated or reduced using the existing scheduling methods. In such a case, we prove that a partial loading strategy can minimise both the tool cycle time and the wafer delays by controlling the number of wafers being loaded into parallel chambers. We also present how wafer delays under the partial loading strategy can be further reduced by introducing a timing control method that regulates the start times of robot tasks.

A New Class of Sequences Without Interferences for Cluster Tools With Tight Wafer Delay Constraints

Robotized cluster tools for semiconductor wafer fabrication may have a wafer wait within a processing chamber after processing there until the wafer is unloaded from the chamber by a robot. Such wafer delays cause wafer quality degradation or variability due to residual gases and heats within the chamber. There have been numerous works on characterizing wafer delays and scheduling under upper limits on wafer delays while presuming that the tools are operated by well-known simple robot task sequences such as swap or backward sequences. However, when the wafer delay constraints are tight, there may not be feasible schedules for such sequences. We wish to know whether there can be alternative robot task sequences which can satisfy such tight wafer delay constraints. In this paper, we identify a new class of robot task sequences that can better satisfy tight wafer delay constraints than the conventional swap or backward sequences while keeping the same minimum tool cycle time. By examining the circuits of timed event graph (TEG) models for the tool operation behaviors in many different robot task sequences, we identify that such robot task sequences do not make interferences between the work cycles of the resources such as the robot and chambers. The resource interference can cause delays in the work cycles, and hence increase the wafer delays or the tool cycle time. To prove this, we examine circuits in an extended TEG model, a negative event graph, which incorporates time constraints as negative places and tokens. From this, we derive closed-form conditions for which such sequences are feasible against given wafer delay constraints. By experiments, we show that the proposed new sequences have shorter wafer delays, and hence better satisfy tight wafer delay constraints than conventional sequences. Note to Practitioners —As circuit widths shrink down to several nanometers, cluster tools for semiconductor fabrication require extreme process quality control. Even wafer delays within processing chambers of cluster tools can cause wafer quality degradation and variability. Therefore, it is desirable for cluster tools to have much shorter wafer delays. However, conventional sequences such as the swap and backward sequences, which are being prevalently used in practice, may not satisfy tight wafer delay constraints. Our proposed sequences, which are as simple as the conventional sequences, have much shorter wafer delays while keeping the same minimum tool cycle time.

Schedulability Analysis for Noncyclic Operation of Time-Constrained Cluster Tools With Time Variation

We consider a scheduling problem of a robotized cluster tool for semiconductor manufacturing, which should control wafer delays within a chamber so as not to exceed a specified limit under time variation. The prior research has proposed a ${\rm p}^{+}$ -time event graph, an extension of Petri nets, for modeling the scheduling problem and developed a method of verifying whether a cyclic ${\rm p}^{+}$ -time event graph or a cluster tool, which repeats identical work cycles, can satisfy the time constraints under time variation. In this paper, we extend and simplify the schedulability analysis method in the prior research for a noncyclic event graph or a cluster tool which performs start-up and close-down operation for a lot or lot switching, and obtain specialized results. We assume that a robot task sequence or firing sequence of transitions is given. Based on the schedulability analysis, we also propose a way of modifying a not always schedulable noncyclic ${\rm p}^{+}$ -time event graph with some qualifications to be always schedulable, that is, we prolong token holding times at some places or equivalently delay firings of some transitions so as to be always feasible.

Feedback Control of Cluster Tools for Regulating Wafer Delays

Robotized cluster tools for semiconductor manufacturing have strict time constraints such that a wafer processed at a processing chamber should be unloaded within a specified time limit. Otherwise, it has a serious quality problem due to residual gases and heat within the chamber. Even though there have been studies on identifying a feasible tool operation schedule over such time constraints on wafer delays, such a schedule is subject to timing disruptions or time variation, and thus may violate the time constraints. In this study, we propose a more robust method of regulating wafer delays against timing disruptions not to exceed a specified limit. We first model the discrete-event behavior of a tool by a timed event graph. We then develop a feedback controller for single-armed and dual-armed cluster tools that can satisfy the time constraints by regulating wafer delays. To do this, we develop a feedback controller for the timed event graph by analyzing the timing behavior in a linear system model based on the max-plus algebra. The feedback controller postpones an event or firing of a transition, i.e., loading a wafer into a chamber, until a properly determined time elapses after an associated preceding event occurs. Finally, we present examples of feedback control and show that the feedback control is quite robust even under persistent time variation.

Schedule Restoration for Single-Armed Cluster Tools

The idle time between two consecutive tasks may seriously affect the wafer quality in some wafer fabrication processes requiring high temperature and pressure. Hence, a cluster tool provides high wafer quality and predictability when operated at a steady schedule, which means that every cycle repeats the same pattern considering not only a sequence but also timing. However, multiple process modules per step can cause the fluctuation of wafer quality even under the same sequence since different modules have different wafer delays. It is known that a dual-armed cluster tool can always have a steady schedule that can be established via a timed event graph and (max, +) algebra. We extend this result to a single-armed cluster tool and generalize the method to establish its steady schedule. Although a cluster tool is initially set on a steady schedule, the schedule can become unsteady after disruptive events, such as wafer alignment failures, and it cannot always return to it. We develop strategies that change the system dynamics of a cluster tool by appropriately delaying some tasks such that any disrupted schedule pattern is stabilized in a finite time. Finally, we examine how they help to flatten wafer delays after a disruption or when tasks have stochastic time fluctuation.

Scheduling start-up and close-down periods of dual-armed cluster tools with wafer delay regulation

Cluster tools have been increasingly used for semiconductor manufacturing. While there have been many studies on cluster tool scheduling, most of them have focused on full work cycles in which identical work cycles are repeated. However, in reality, there are significant transient periods during which an empty tool begins to process new wafers or finishes processing and becomes empty. We should minimise the lengths of transient periods, so that a cluster tool quickly enters a desirable steady schedule for full work cycles or finishes operations quickly. We should also regulate wafer delays within chambers, because they cause wafer quality variation or failures. In this paper, we propose scheduling strategies for transient periods to meet those requirements. We prove that for the close-down period, the earliest starting policy that starts each operation as soon as the preceding operations complete minimises the close-down period while regulating the wafer delays. We also show that for the start-up period, the latest starting policy that starts each operation as late as possible while meeting the deadlines specified by the starting times of the given steady schedule minimises the start-up period. Finally, we suggest a way of minimising the total makespan by optimising the steady schedule.

Schedulability Analysis of Time-Constrained Cluster Tools With Bounded Time Variation by an Extended Petri Net

Cluster tools for some wafer fabrication processes such as low-pressure chemical vapor deposition have strict wafer delay constraints. A wafer that completes processing in a processing chamber should leave the chamber within a specified time limit. Otherwise, the wafer suffers from severe quality troubles due to residual gases and heat within the chamber. An important engineering problem is to verify whether for given task times there exists a tool operation schedule that satisfies the wafer delay limit. There have been studies on the problem, which all assume deterministic task times. However, in reality, the task times are subject to random variation. In this paper, we develop a systematic method of determining schedulability of time-constrained decision-free discrete-event systems, where time variation can be confined within finite intervals. To do this, we propose an extended Petri net for modeling such systems. We then develop a necessary and sufficient condition for which there always exists a feasible schedule and one for which there never exists any feasible schedule. We develop a graph-based computational procedure for verifying the schedulability conditions and determining the worst-case task delay. We demonstrate how the procedure can be used for cluster tool engineering to control wafer delays against wafer alignment failures and time variation.

Scheduling analysis of time-constrained dual-armed cluster tools

Cluster tools, each of which consists of several single-wafer processing chambers and a wafer handling robot, have been increasingly used for diverse wafer fabrication processes. Processes such as some low pressure chemical vapor deposition processes require strict timing control. Unless a wafer processed at a chamber for such a process leaves the chamber within a specified time limit, the wafer is subject to quality problems due to residual gases and heat. We address the scheduling problem for such time-constrained dual-armed cluster tools that have diverse wafer flow patterns. We propose a systematic method of determining the schedulable process time range for which there exists a feasible schedule that satisfies the time constraints. We explain how to select the desirable process times within the schedulable process time range. We present a method of determining the tool operation schedule. For more flexible scheduling under the time constraints, we propose a modification of the conventional swap operation in order to allow wafer delay on a robot arm during a swap operation. We compare the performance of the new swap strategy with that of the conventional swap strategy.