Abstract

Abstract With the circuit width of a wafer being decreased below 10 nanometers, it is important to reduce the wafer delay time in a process module as much as possible since too long wafer delay time has negative influence on the wafer quality. To do so, based on a Petri net model, we examine the characteristic of the robot wait time under the steady state by an earliest starting strategy. It is found that a unique steady state is reached by such a strategy, leading to inevitable wafer delays in the system. Then, a robot-waiting-time-controlled method is presented to reduce the wafer delays as much as possible by appropriately regulating the robot idle time. Finally, two industrial examples show that the robot-waiting-time-controlled method outperforms the earliest starting strategy in terms of the wafer delay reduction.

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