Wafer Bonding Research Articles

Effect of Wafer-Scale Shape Variations and Mounting in Wafer Bonding

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UHV- Direct Bonding of Semiconductor Wafers at Room Temperature using Hydrogen Ion Beam Surfaces Cleaning

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Silicon Wafer Bonding Using Deposited and Thermal Oxides: A Comparative Study

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Low-Temperature Silicon Wafer Bonding with Titanium

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Si-based Condenser Microphone by Wafer Bonding Technique

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UV Activation Treatment for Wafer Bonding

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Wafer Bonding for Optical MEMS

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Wafer Scale Packaging of MEMS by Using Plasma Activated Wafer Bonding

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New SOI Devices Transferred onto Fused Silica by Direct wafer Bonding

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Mechanical Aspects of Wafer Bonding

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Recent Results on Advanced Molecular Wafer Bonding Technology for 3D Integration on Silicon

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Adhesive Wafer Bonding Using Partially Cured Benzocyclobutene for Three-Dimensional Integration

Wafer-level three-dimensional integration (3D) is an emerging technology to increase the performance and functionality of integrated circuits (ICs), with adhesive wafer bonding a key step in one of the attractive technology platforms. In such an application, the dielectric adhesive layer needs to be very uniform, and precise wafer-to-wafer alignment accuracy of the bonded wafers is required. In this paper we present a new adhesive wafer bonding process that involves partially curing (cross-linking) of the benzocyclobutene (BCB) coatings prior to bonding. The partially cured BCB layer essentially does not reflow during bonding, minimizing the impact of inhomogeneities in BCB reflow under compression and/or any shear forces at the bonding interface. The resultant nonuniformity of the BCB layer thickness after wafer bonding is less than 1% of the average layer thickness, and the wafers shift relative to each other during the wafer bonding process less than (average) for 200 mm diameter wafers. When bonding two silicon wafers using partially cured BCB, the critical adhesion energy is sufficiently high for subsequent IC processing.

Surface Activation Using Remote Plasma for a New Wafer Bonding Route to Strained-Si

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Silicon Layer Stacking Enabled by Wafer Bonding

ABSTRACTThree-dimensional integrated circuits (3-D ICs), in the form of a vertical stack of several interconnected device layers, have many performance, form factor, and integration advantages. The main objective of this work is to develop reliable process technology to enable the fabrication of a vertically interconnected silicon multi-layer stack.Low temperature wafer bonding processes, both copper thermo-compression bonding and silicon dioxide fusion bonding, are studied extensively as key enabling technology. Cu thermo-compression bonding is studied for its feasibility as a permanent bond between active layers in a multi-layer stack. Silicon dioxide wafer bonding, on the other hand, is used as a temporary bond to attach a donor wafer to a handle wafer during donor wafer thinning and subsequent layer transfer. Sufficiently high bond strength is obtained with careful surface preparation and activation prior to bonding.Silicon layer can be stacked either in a “face down” or “face up” orientation. Using a combination of wafer bonding and thinning, double-layer stacks in both orientations are fabricated. By repeating these steps on two “face down” double-layer stacks, a four-layer stack is successful demonstrated.

Fabrication of Thin-GaN LED Structures by Au–Si Wafer Bonding

Using Au-Si wafer bonding and laser lift-off (LLO) techniques, an light emitting diode (LED) GaN epi layer was successfully transferred onto a Si substrate. After the wafer bonding, a KrF excimer laser was used to separate the GaN layer from the grown sapphire substrate. The Raman spectra results show that the quality of the transferred GaN epi layer did not change; the initial compressive stress level of the GaN epi layer was relieved by 202 MPa after transferring. The transferred GaN epi layer was further processed for use in a thin-GaN LED device. The luminance-intensity-current voltage curve results indicate a forward voltage of 3.4 V, and a luminance intensity of 204 mcd at 20 mA.

Reactive Multilayer Foils for Silicon Wafer Bonding

ABSTRACTIn this study silicon wafers were bonded using Al/Ni reactive multilayer foils as local heat sources for melting solder layers. Exothermic reactions in Al/Ni reactive multilayer foils were investigated by XRD and DSC. XRD measurements showed that dominant product after exothermic reaction was ordered B2 AlNi compound. The heat of reaction was calculated to be -57.9 KJ/mol by DSC. With Al/Ni reactive multilayer foil, localized heating can be achieved during bonding process. Both experimental measurements and numerical simulation showed that the heat exposure to the wafers was highly limited and localized. Moreover, leakage test showed that this bonding approach possessed a good hermeticity.

High-Performance Temporary Adhesives for Wafer Bonding Applications

ABSTRACTMyriad structures for stacking chips, power devices, smart cards, and thin substrates for processors have one thing in common: thin silicon. Wafer thinning will soon be an essential process step for most of the devices fabricated and packaged henceforth. The key driving forces for thinned wafers are improved heat dissipation, three-dimensional stacking, reduced electrical resistance, and substrate flexibility. Handling of thin and ultrathin substrates however is not trivial because of their fragility and tendency to warp and fold. The thinned substrates need to be supported during the backside grinding process and through the subsequent processes such as lithography, deposition, etc. Using temporary adhesives to attach the processed device wafer to a rigid carrier wafer offers an efficient solution. The key requirements for such materials are ease of application, coating uniformity with minimal thickness variation across the wafer, good adhesion to a wide variety of surfaces, thermal stability in processes such as dielectric deposition and metallization, and ease of removal to allow high throughput. An additional requirement for these materials is stability in harsh chemical environments posed by processes such as etching and electroplating. Currently available materials meet only a subset of these requirements. None of them meet the requirement of high-temperature stability combined with ease of removal. We have developed adhesives that meet a wide range of post-thinning operating temperatures. Additionally, the materials are soluble in industry-accepted safe solvents and can be spin-applied to required thicknesses and uniformity. Above all, the coatings can be removed easily without leaving any residue. This paper reports on the development of a wide range of temporary adhesives that can be used in wafer thinning applications while applying both novel and conventional bonding and debonding methods.

A novel fabrication method of flexible and monolithic 3D microfluidic structures using lamination of SU-8 films

The fabrication of three-dimensional (3D) microfluidic networks entirely made of SU-8 with integrated electrodes is reported. The described technology allows the fabrication of uncrosslinked SU-8 dry film on a polyester (PET) sheet and its subsequent lamination to form closed microstructures. Unlike other reported methods, transferred layers are patterned following the bonding step allowing a more accurate and simple alignment between levels than techniques using already patterned layers. Dry release of the complete polymer microstructure was demonstrated. Flexible microfluidic chips were obtained. This technique uses simple tools and no wafer bonder is used but lamination techniques which are more collective processes. Limitations in the method for layers thicker than 50 µm have been observed and are discussed. Hydraulic flow experiments have been performed to study the deformation of the cover layer which could influence adjacent flow in a three-dimensional configuration. Important deformations have been observed for layers 10 µm thick and an average pressure greater than 100 kPa. No deformations have been noted for layers with thicknesses greater than 35 µm and for average pressures up to 200 kPa. No failures occurred within the range of the experimental set-up, i.e. up to 300 kPa.

Wafer Bonding Techniques for MEMS

Wafer Bonding Techniques for MEMS

Thermal analysis of bond layer influence on performance of an all-active vertically coupled, microring resonating laser

The vertical coupling of active InP based ring resonators and passive feeding waveguides necessitates the use of a waferbonding technology in the fabrication process. The required bond material (BCB) has a low thermal conductivity and will strongly influence the operating temperature and thus the performance of the ring resonator through its insulating effect. A comprehensive thermal analysis of a proposed vertically coupled ring resonator of 50 μm outer radius is undertaken during the design phase to determine the thermal impact of: the design of the wafer bond, the design of the passivation layer and the optical power levels. Thermal abatement strategies for semiconductor lasers are presented.