Voltage Islanding Research Articles

An energy efficient synthesis flow for application specific SoC design

Multiple Supply Voltage (MSV) is a known design technique to deal with the power and thermal issues of Multi Processor System on Chips (MPSoCs). In this paper, an MSV driven synthesis flow is proposed in four phases for the design of application-specific MPSoCs. The first phase conducts the core-to-router allocation concerning the operating voltages of cores as well as the bandwidth/latency requirements of the data flowing between the cores. The second phase coordinates voltages of cores connected to the same router. The third phase refines the power delivery network using our proposed voltage-aware hierarchical floorplanning algorithm. Finally, router-to-router connection and path allocation are done by the use of existing methods in the last phase. For the first time, we perform the core to router allocation phase before the voltage islanding phase to find the highest number of design solutions satisfying the set of given constraints; this in turn, improves the flexibility and efficiency of our synthesis process. Exhaustive experimental evaluations have been done on real-world benchmarks. Results confirm achieving 90% more design solutions (to conduct a wiser design space exploration) and an average of 93% Energy Delay Product (EDP) improvement as compared to the existing synthesis approaches.

Research on neutral point grounding mode and single-phase earth fault location of medium voltage island microgrid

For medium voltage islanding microgrid, the voltage clamp of the main network neutral arc suppression coil or small resistance is lost. Multiple PTs parallel operation will occur because different entities of a microgrid independently measure the voltage. It is necessary to consider the influence of multi PTs ferroresonance on the neutral grounding mode of islanding microgrid. The neutral point ungrounded, neutral point grounded by arc suppression coil and neutral point grounded by small resistance are analyzed respectively, considering multi PTs ferroresonance and single-phase earth fault location, it is determined that the islanded microgrid adopts neutral point grounded by small resistance. On this basis, the zero sequence current distribution is used to locate the single-phase earth fault. Finally, a simulation example is built to verify the correctness of the proposed method.

DSP - Based Islanding Protection for Photovoltaic Grid Connected Inverter

This research presents the DSP - based islanding protection for photovoltaic grid connected inverter with under / over frequency and under / over voltage islanding protection methods. The design is based on the TMS320VC33PGE digital signal processor on the NI SPEEDY 33 board from National Instrument Inc. The prototype is monitor the grid frequency and grid voltage at the point of common coupling (PCC) between the photovoltaic grid connected inverter, the local load and the distribution. The results of study, the prototype can turn off relay between photovoltaic grid connected inverter and utility grid when the frequency is change under 48Hz or over 52Hz and the voltage is change under 200V or over 240V.

Energy efficient mapping and voltage islanding for regular NoC under design constraints

Computational energy consumption of the processing elements (PEs) of a NoC can be significantly reduced by scaling down their voltage levels. This creates clusters of adjacent PEs operating at the same voltage level, known as voltage islands. Excessive number of voltage islands is undesirable from the physical design perspective and due to the overhead of level shifter energy consumption between adjacent voltage islands. Considering these issues during mapping of the PEs to the NoC routers, can potentially lead to acceptable solutions with reduced overall energy consumption. In this paper, we formulate the mapping problem as an optimisation problem. We present both optimal solution, obtained by solving a mixed integer linear program (MILP), and heuristic solution based on random greedy selection. Experimental results using benchmark and real applications show that the heuristic finds near-optimal solution in almost all cases in a very small fraction of the time required to achieve the optimal solution.