Diode Voltage Drop Research Articles

Steady-State Temperature-Sensitive Electrical Parameters’ Characteristics of GaN HEMT Power Devices

Gallium nitride high-electron-mobility transistor (GaN HEMT) power devices are favored in various scenarios due to their high-power density and efficiency. However, with the significant increase in the heat flux density, the junction temperature of GaN HEMT has become a crucial factor in device reliability. Since the junction temperature monitoring technology for GaN HEMT based on temperature-sensitive electrical parameters (TSEPs) is still in the exploratory stage, the TSEPs’ characteristics of GaN HEMT have not been definitively established. In this paper, for the common steady-state TSEPs of GaN HEMT, the variation rules of the saturation voltage with low current injection, threshold voltage, and body-like diode voltage drop with temperature are investigated. The influences on the three TSEPs’ characteristics are considered, and their stability is discussed. Through experimental comparison, it is found that the saturation voltage with low current injection retains favorable temperature-sensitive characteristics, which has potential application value in junction temperature measurement. However, the threshold voltage as a TSEP for certain GaN HEMT is not ideal in terms of linearity and stability.

Novel majority carrier accumulation insulated gate bipolar transistor with Schottky junction

Insulated gate bipolar transistor (IGBT) is the core of modern power semiconductor device, and has been widely used due to its excellent electrical characteristics. A novel majority carrier accumulation mode IGBT with Schottky junction contact gate semiconductor layer (AC-SCG IGBT) is proposed and investigated by TCAD simulation in this article. When the AC-SCG IGBT is in the on-state, a forward bias is applied to the gate. Due to the very low forward voltage drop (<i>V</i><sub>F</sub>) of the Schottky barrier diode, the potential of the gate semiconductor layer is almost equal to the gate potential, which can accumulate a large number of majority carrier electrons in the drift region. In addition to the electrons existing, these accumulated electrons increase the conductivity of the drift region, thus significantly reducing <i>V</i><sub>F</sub>. Therefore, the doping concentration of the drift region is not limited by <i>V</i><sub>F</sub>. The lightly doped drift region can make AC-SCG IGBT have a higher breakdown voltage (BV). Moreover, it also reduces the barrier capacitance in the turn-off process, thus the overall Miller capacitance is small, which can quickly turn off and reduce the turn-off time (<i>T</i><sub>off</sub>) and turn-off loss (<i>E</i><sub>off</sub>). The simulation results indicate that at the BV of 600 V, the <i>V</i><sub>F</sub> of 0.84 V for the proposed AC-SCG IGBT is reduced by 46.2% compared with that for the conventional IGBT (<i>V</i><sub>F</sub> of 1.56 V). The <i>E</i><sub>off</sub> of the AC-SCG IGBT (0.77 mJ/cm<sup>2</sup>) is reduced by 52.5% compared with that for the conventional IGBT (1.62 mJ/cm<sup>2</sup>), and the <i>T</i><sub>off</sub> (155.8–222.7 ns) is reduced by 30%. The contradiction between <i>V</i><sub>F</sub> and <i>E</i><sub>off</sub> is eliminated. In addition, the proposed AC-SCG IGBT has a better anti-latch-up capability and is coupled with its higher BV, so it has a larger forward biased safe operating area (FBSOA). The proposed novel structure meets the development requirements for future IGBT device performance, and has great significance for guiding the development of the power semiconductor device field.

Junction temperature monitoring for cascode GaN devices using the Si MOSFET's body diode voltage drop

In this paper, a new online junction temperature monitoring method is proposed for cascode GaN devices using the body diode of Si MOSFET. The reverse current during soft-switching mode is utilized to extract the voltage drop of the Si MOSFET's body diode. It is pointed out that, to accurately obtain the voltage drop of Si MOSFET's body diode, the VDS voltage of cascode GaN device should be measured when the reverse current is small during the dead-time period. An experimental platform has been designed to validate the proposed method. The proposed method exhibits an accuracy within 0.6 °C and a R2 = 0.99 goodness of linear fit on a test Buck converter, showing that this method is practical for real applications.

비반전 동기 벅-부스트 컨버터의 CRM 제어

Buck-Boost Converter is a non-insulated Converter with a wide input range and could receive various voltage as an input However, as research for high efficiency of power conversion system progresses, the need to reduce semiconductor losses is increased. Buck-Boost Converter has a disadvantage in that a high conduction losses and a switching losses due to a forward voltage drop of diode. In this paper, the reduction of conduction losses was verified by comparing conduction losses of Synchronous Buck-Boost Converter and conduction losses of conventional Buck-Boost Converter, and the application of CRM(Critical Conduction Mode) control was demonstrated through experiments.

A Novel Dual-Slope Resistance to Digital Converter With Lead Resistance Compensation

A novel dual-slope resistance to digital converter (RDC) for compensating lead resistance is presented. The RDC uses a dual-slope analog-to-digital converter (ADC) structure along with three switches and a diode. It completes measurement in one charging–discharging cycle only, hence provides an improvement to existing RDCs based on direct microcontroller interfaces (DMIs), where two or three charging–discharging cycles are required. Moreover, it incorporates the feature of lead resistance compensation in dual-slope RDCs. The scheme works by connecting the resistive sensor to the input terminal of the integrator of the dual-slope ADC. In the charging path (or mode), sensor resistance is presented along with a lead resistance; and in discharging path, sensor resistance is bypassed, and only lead resistance is there. The difference between the RC time constant during these two modes is used to find the sensor resistance. The diode is used to turn on a switch for bypassing the resistive sensor. The diode voltage drop is not there in the charging and discharging path, which is another novelty. A detailed error analysis is also carried to evaluate the performance of the scheme considering switch resistance, diode voltage drop, voltage mismatch, and opamp noises. The scheme works with low-value resistive sensors ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\approx 100~\Omega $ </tex-math></inline-formula> ), a feature not found in the existing dual-slope RDCs. The hardware prototype of the proposed scheme on the breadboard shows a measurement time of 2.09 ms with an average error of ±0.04% at 100 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula> when lead resistance varied from 20 to 100 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula> . The scheme takes 23.44% less time for measurement.

Junction Temperature Measurement Method for Thermal Resistance Testing of SiC MOSFET Module

The internal anti-parallel Schottky barrier diode threshold voltage of SiC metal-oxide-semiconductor field-effect transistor (MOSFET) modules is less than that of their body diodes, which prevents the use of the body diode voltage drop to measure junction temperature. In this paper, a thermal resistance test of the SiC MOSFET module is proposed based on the onstate voltage drop as a temperature-sensitive electrical parameter. Measurements are performed with the method and its feasibility evaluated. The on-state voltage drop temperature sensitivity under different gate voltages and the repeatability of the on-state voltage drop parameters before and after electric power heating in the thermal resistance tests are studied. The on-state voltage drop is measured under a high gate voltage and the accuracy of junction temperature measurement improves when the grid voltage remains the same during heating and measurement.

Improving output current of inductor-cell based five-level CSI using hysteresis current controller

Current source inverter (CSI) operates to output a specified ac current waveform from dc current sources. Talking about power quality, harmonics distortion of ac waveform is a problem of an inverter circuit. Generating a multilevel current waveform will have less harmonics content than a traditional three-level current waveform. In addition to non-ideal conditions of power switches, i.e. voltage drop in diodes, conductors or controlled switches, the performance of current controller applied in an inverter circuit will considerably affect the ac waveform quality produced by inverter circuit. This paper presents and discusses application of hysteresis current controller in the five-level H-bridge with inductor-cell current source inverter. The current controller performance was compared with the proportional integral current controller. Some test results are presented and discussed to explore the advantages of hysteresis controller in reducing the current ripple and harmonics distortion of output current.

SISTEM MAINTENANCE TRANSFORMATOR 60 MVA PADA ELECTRIC ARC FURNACE (EAF) 7 SLAB STEEL PLANT 1

&lt;p&gt;&lt;strong&gt;Abstract.&lt;/strong&gt;&lt;/p&gt;&lt;p&gt;Preventive Maintenance is every activity undertaken to keep each component tool running in accordance with the expected conditions, through inspection, detection and prevention of total damage that is sudden (breakdown). Breakdown voltage or diode voltage drop is the minimum voltage value at the diode to be able to flow electric current. The research method used is qualitative research with a descriptive approach. In this study, the authors conducted data collection through: (1) direct observation (2) Retrieval of data using the Magger tool (3) literature study. The results of the study stated that in the examination and analysis of dissolved gas content (Dissolved gas analysis, DGA), to prevent the occurrence of: (partial) discharges, thermal failure (thermal faults), deterioration/deterioration of paper insulation/lamination. Insulation Resistance is a test to see the strength of insulation against physical and chemical damage. Damage that often occurs in the EAF 7 transformer is a breakdown voltage and an overheat transformer because the room temperature is not cold due to the transformer close to the cooking place or iron melting.&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p&gt;&lt;strong&gt;Keywords.&lt;/strong&gt; BDV, DGA, insulation resistance, maintenance, transformer&lt;/p&gt;&lt;p&gt;&lt;strong&gt; &lt;/strong&gt;&lt;/p&gt;

Detection System of Switch Power Supply Based on DSP

The power supply of electronic equipment is significant and have important function in electronic field. In this paper, a detection system of switch power supply based on DSP is introduced. The system can detect the duty-ratio of capacity value, inductance value, resistance value,output voltage value,diode voltage drop and current pulse-width modulation chip on PCB of switch power supply. Consequently, it finishes the real-time detection on PCB and it is significant to research the fault analysis of switch power supply. The schematic diagram and the outside circuit schematic diagram based on DSP is given in the paper. In the meanwhile, the system accomplishes the data selecting and setting of lower computer by using LabVIEW upper computer. The system has the universality to electrical industry.

A New Complete Condition Monitoring Method for SiC Power MOSFETs

This article proposes a new complete condition monitoring method which can independently monitor both the threshold voltage drift and the packaging degradation accurately by monitoring only the reverse body diode voltage drop at different gate bias levels. The SiC MOSFETs are aged through an accelerated aging method and the corresponding changes in electrical parameters are periodically measured to assess their correlation with the state of the device's health. It has been revealed that the on-state resistance reveals the combination of gate oxide and package-related degradation while the threshold voltage mainly depicts gate oxide-related issues. Unlike these two parameters, the body diode voltage drop is found to independently indicate the state of device health both for package and gate oxide. This is caused by a unique secondary conduction mode of SiC MOSFETs in third-quadrant operation which is clearly disclosed with transition boundaries by a proposed body diode transfer characterization curve. In order to have a detailed condition information of the device with a simple circuit, monitoring the reverse body diode voltage drop at 0 and -5 V gate bias is proposed. The proposed condition monitoring method is implemented on a gate drive circuit and experimental results are given for two artificially degraded devices. The experimental results confirm that the proposed method can independently monitor both the gate oxide and packaging degradations accurately by monitoring a single precursor parameter. The proposed method can be integrated into the gate driver or converter itself to monitor SiC devices.

Investigation of a Non-isolated Reduced Redundant Power Processing DC/DC Converter for High-Power High Step-Up Applications

In this paper, a nonisolated high step-up dc/dc converter, belonging to the family of reduced redundant power processing converters (R2P2), is investigated for high-power applications. The selection of this topology as the most suitable for such applications among those belonging to the R2P2 family is justified. Emphasis is given on the theoretical analysis of the real step-up voltage ratio of the converter, and voltage and current stresses under continuous and discontinuous conduction modes of operation, taking into account the nonideality of the topology components, namely the parasitic resistances of semiconductor devices and inductors and the voltage drop of diodes. The theoretical analysis and the behavior of the selected converter are experimentally validated through a 2 kW prototype. Moreover, the overall efficiency of the chosen converter is experimentally investigated for various step-up voltage ratios and for a high-power range, considering a waste heat recovery system for a maritime application.

Design Methodology of DC Power Cycling Test Setup for SiC MOSFETs

The long-term reliability concerns regarding the latest power devices, e.g., silicon carbide (SiC) MOSFETs, need to be well understood for their rapid and widespread deployment in industrial applications. As an effective reliability assessment, the dc power cycling test is one of the most realistic procedures providing accelerated lifetime tests. In this paper, a dc power cycling setup for SiC power MOSFETs is proposed, and the design methodology is generalized for practicing engineers. At first, the aging-independent junction temperature measurement method is identified to eliminate the laborious recalibration process. Specifically, the electrical parameter changes of commercial SiC MOSFETs are evaluated in a power cycling test. It is observed experimentally that the body diode's voltage drop at low current and negative gate bias is unaffected by the device/package degradation. Therefore, it is selected for T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j</sub> measurement in the proposed setup. Following that, the design considerations regarding precise parameter measurement of the device's parameter are presented. The transient behavior of the proposed test setup is analyzed, and a simulation model is built in LTspice. Based on the model, the effects of gate timing control and paralleled capacitors are investigated for realizing accurate measurements, and the simulation results are verified experimentally in a prototype. In addition, considering the measurement delay in the conditioning circuits and the common-mode noise, the practical issues affecting the measurement accuracy in a multiple-phase setup are investigated in the experiment. Experimental results show that an accurate measurement can be achieved with the design considerations.

Power-electronic-interface topology for MEMS energy harvesting with multiple transducers

Based on circuit simulations, this paper investigates a concept for a power electronic interface circuit for MEMS electrostatic energy harvesters. Two ordinary overlap-varying transducers are first electrically configured as a symmetric voltage doublers which enables the device to self-start from an initially low bias. The harvesting system is then reconfigured to couple with a buck-boost DC-DC converter in order to maximize the power delivered to an electronic load. The losses of electronic components due to diode voltage drop and parasitic resistance of inductors are taken into account for a feasibility investigation. Dependence of the maximum output power on inductance and switching frequency is explored.

Fully Integrated Inductor-Less Flipping-Capacitor Rectifier for Piezoelectric Energy Harvesting

This paper presents a fully integrated piezoelectric energy harvesting interface without external components. Instead of relying on bulky external inductors with high quality factor as in the conventional parallel-synchronized-switch harvesting-on-inductor (P-SSHI) approach, we propose a flipping-capacitor rectifier (FCR) topology to achieve voltage inversion of the piezoelectric energy harvester through a reconfigurable capacitor array. This fundamentally preserves a fully integrated solution without inductors while achieving a high-energy extraction capability. Measurement results from FCR <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sub> using discrete components shows an output power enhancement of up to 3.4×, which is close to the theoretical prediction. We also fabricated a sevenphase FCR <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> with four MIM capacitors and 21 switches using a 0.18-μm 1.8/3.3/6 V CMOS process, occupying an active area of ~1.7 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Additionally, we implemented an active rectifier based on a common-gate comparator with phase alignment to ensure high-speed operation while minimizing the diode voltage drop. A phase generate-and-combine circuit eliminates redundant switching activities. Systematic optimization of the three main energy loss mechanisms during the finite flip time: 1) phase offset; 2) incomplete charge transfer; and 3) reduced conduction time, is also introduced. Measurement results show that the output power enhancement can reach up to 4.83× at an excitation frequency of 110 kHz.

Integrated temperature sensor with diamond Schottky diodes using a thermosensitive parameter

Diamond Schottky diodes with high figures of merit have been previously demonstrated. However, self-heating during characterization process has been widely observed and fast and high temperature monitoring is highly desired, moreover temperature management is of high interest for device parallelization. In this article, we investigate the possibility to monolithically integrate a small area Schottky diode which will be used as temperature sensor. The diode voltage drop at a constant forward bias current will be used as a thermosensitive parameter. This voltage drop has a quasi-linear variation over a temperature range (experimentally demonstrated from 300K to 440K in this study due to the maximum operating temperature of the experiments) at constant bias current densities between 0.25A/cm2 and 2.5A/cm2, with a sensor sensitivity of −1.6mV/K. It is also demonstrated that this integrated temperature sensor is affected by the biasing conditions of the main Schottky diode. To perform reliable measurements, the temperature measurement must be done while the main Schottky diode is in OFF-state or the fabrication process must be modified. This integrated temperature measurement allows accurate junction temperature monitoring, offering a diamond Schottky diode operation at its best ON-state performance through an active device temperature management.

Aging Precursor Identification and Lifetime Estimation for Thermally Aged Discrete Package Silicon Power Switches

Thermal/power cycles are widely acknowledged methods to accelerate the package related failures. Many studies have focused on one particular aging precursor at a time and continuously monitored it using custom-built circuits. Due to the difficulties in taking sensitive measurements, the reported findings are more on the quantities requiring less sensitive measurements. In this paper, two custom-designed testbeds are used to age a number of power MOSFETs and insulated gate bipolar transistors. An automated curve tracer is utilized to capture parametric variations in I-V curves, parasitic capacitances, and gate charges at certain time intervals. The results suggest that the only viable aging precursors are the on-state voltage drop/on-state resistance, body diode voltage drop, parasitic capacitances, and gate threshold voltage for die attach solder and gate-oxide degradation mechanisms. Based on the experimental results, gate threshold voltage variation is empirically modeled to estimate the remaining useful lifetime of the switches experiencing gate oxide degradation. The model parameters are found by the least squares method applied to inliers determined by the random sample and consensus outlier removal algorithm.

Piezoelectric vibration energy harvesting: A connection configuration scheme to increase operational range and output power

For a conventional monolithic piezoelectric transducer (PT) using a full-bridge rectifier, there is a threshold voltage that the open-circuit voltage measured across the PT must attain prior to any transfer of energy to the storage capacitor at the output of the rectifier. This threshold voltage usually depends on the voltage of the storage capacitor and the forward voltage drop of diodes. This article presents a scheme of splitting the electrode of a monolithic piezoelectric vibration energy harvester into multiple ( n) equal regions connected in series in order to provide a wider operating voltage range and higher output power while using a full-bridge rectifier as the interface circuit. The performance of different series stage numbers has been theoretically studied and experimentally validated. The number of series stages ([Formula: see text]) can be predefined for a particular implementation, which depends on the specified operating conditions, to achieve optimal performance. This enables the system to attain comparable performance compared to active interface circuits under an increased input range while no additional active circuits are required and the system is comparatively less affected by synchronized switching damping effect.

Connection Configurations to Increase Operational Range and Output Power of Piezoelectric MEMS Vibration Energy Harvesters

Among the various methods of extracting energy harvested by a piezoelectric vibration energy harvester, full-bridge rectifiers (FBR) are widely employed due to its simplicity and stability. However, its efficiency and operational range are limited due to a threshold voltage that the open-circuit voltage generated from the piezoelectric transducer (PT) must attain prior to any energy extraction. This voltage linearly depends on the output voltage of the FBR and the forward voltage drop of diodes and the nature of the interface can significantly limit the amount of extracted energy under low excitation levels. In this paper, a passive scheme is proposed to split the electrode of a micromachined PT into multiple (n) equal regions, which are electrically connected in series. The power output from such a series connected MEMS PT allows for the generated voltage to readily overcome the threshold set by the FBR. Theoretical calculations have been performed in this paper to assess the performance for different series stages (n values) and the theory has been experimentally validated. The results show that a PT with more series stages (high n values) improves the efficiency of energy extraction relative to the case with fewer series-connected stages under weak excitation levels.

Full-Wave Rectifier with Vibration Detector for Vibrational Energy Harvesting Systems

In this paper, a full-wave rectifier (FWR) with a simple vibration detector suitable for use with vibrational energy harvesting systems is presented. Conventional active FWRs where active diodes are used to reduce the diode voltage drop and increase the system efficiency are usually powered from the output. Output-powered FWRs exhibit relatively high efficiencies because the comparators used in active diodes are powered from the stable output voltage. Nevertheless, a major drawback is that these FWRs consume power from the output storage capacitor even when the system is not harvesting any energy. To overcome the problem, a technique using a simple vibration detector consisting of a peak detector and a level converter is proposed. The vibration detector detects whether vibrational energy exists or not in the input terminal and disables the comparators when there is no vibrational energy. The proposed FWR with the vibration detector is designed using a 0.35- μm CMOS process. Simulation results have verified the effectiveness of the proposed scheme. By using the proposed vibration detector, a decrease in leakage current by approximately 67,000 times can be achieved after the vibration disappears.

Measurement and Characterization Technique for Real-Time Die Temperature Prediction of MOSFET-Based Power Electronics

This paper presents a technique to predict the die temperature of a MOSFET based on an empirical model derived following an offline thermal characterization. First, a method for the near-simultaneous measurement of die temperature during controlled power dissipation is presented. The method uses a linear arbitrary waveform power controller which is momentarily disconnected at regular intervals to allow the forward voltage drop of the MOSFET's antiparallel diode to be measured. Careful timing ensures the power dissipation is not significantly affected by the repeated disconnection of the power controller. Second, a pseudorandom binary sequence-based system identification approach is used to determine the thermal transfer impedance, or cross coupling between the dice of two devices on shared cooling using the near-simultaneous measurement and control method. A set of infinite impulse response digital filters are fitted to the cross-coupling characteristics and used to form a temperature predictor. Experimental verification shows excellent agreement between measured and predicted temperature responses to power dissipation. Results confirm the usefulness of the technique for predicting die temperatures in real time without the need for on-die sensors.