Differential Voltage Current Conveyor Research Articles

DVCC Based (2 + α) Order Low Pass Bessel Filter Using Optimization Techniques

This paper proposes the design and analysis of (2 + α) order low pass Bessel filter using different optimization techniques. The coefficients of the proposed filter are obtained by minimizing the error between transfer functions of (2 + α) order low pass filter and third-order Bessel approximation using simulated annealing (SA), interior search algorithm (ISA), and nonlinear least square (NLS) optimization techniques. The best optimization technique based on the error in gain, cut-off frequency, roll-off, passband, stopband, and phase is chosen for designing the proposed filter. The stability analysis of the proposed filter has also been done in W-plane. The simulated responses of the best optimized proposed filter are attained using the FOMCON toolbox of MATLAB and SPICE. The circuit realization of 2.5 order low pass Bessel filter is done using two DVCCs (differential voltage current conveyors), one generalized impedance converter (GIC) based inductor, and one fractional capacitor. The proposed filter is implemented for the cut-off frequency of 10 kHz using a wideband fractional capacitor. Monte Carlo and noise analyses are also performed for the proposed filter. The MATLAB and SPICE results are shown in good agreement.

A Band-Pass Instrumentation Amplifier Based on a Differential Voltage Current Conveyor for Biomedical Signal Recording Applications

Recently, due to their abundant benefits, current-mode instrumentation amplifiers have received considerable attention in medical instrumentation and read-out circuit for biosensors. This paper is focused on the design of current-mode instrumentation amplifiers for portable, implantable, and wearable electrocardiography and electroencephalography applications. To this end, a CMOS differential voltage second-generation current conveyor (DVCCII) based on a linear transconductor is presented. A new band-pass instrumentation amplifier, based on the designed DVCCII, is also implemented in this paper. The concept of the proposed differential voltage current conveyor and instrumentation amplifier is validated numerically and their predicted performance is presented. The simulation results of the presented circuits were tested for 0.18 μm TSMC CMOS technology in a post layout simulation level using the Cadence Virtuoso tool with a ±0.9 V power supply, and demonstrated that the designed DVCCII has a wide dynamic range of ±400 mV and ±0.85 mA and a power consumption of 148 μW. The layout of the DVCCII circuit occupies a total area of 0.378 μm2. It is shown that the designed DVCCII benefits from good linearity over a wide range of input signals and provides a low input impedance at terminal X. Two versions of the proposed band-pass instrumentation amplifier using pseudo resistances were designed with different specifications for two different applications, namely for EEG and ECG signals. Numerical analyses of both designs show proper outputs and frequency responses by eliminating the undesired artifact and DC component of the EEG and ECG input signals.

A Mixed-Mode filter with DVCCs and grounded passive components only

A new differential voltage current conveyor (DVCC)-based mixed-mode (MM) analog filter is suggested, composed of three triple output DVCCs and six grounded passive elements, two capacitors and four resistors. The suggested circuit can simultaneously provide voltage-mode (VM) low-pass (LP), high-pass (HP), and bandpass (BP) responses. Also, it can simultaneously produce current-mode (CM) both non-inverting and inverting LP, HP, and BP responses. Interconnection of relevant output currents both non-inverting and inverting notch filter (NF) and all-pass (AP) filter currents can be easily realized. The suggested topology can simultaneously realize transadmittance-mode HP and BP responses while simultaneously realizing transimpedance-mode LP, HP, and BP responses. For the VM filter choice, its input impedance is high; thus, it can be easily cascaded with other VM ones. Similarly, for the CM selection, its output impedances are high; therefore, it can be easily cascaded with other CM ones. However, one passive element-matching condition is needed for the CM NF choices, while two passive element-matching constraints are required for the CM AP filter selections. Numerous simulations through the SPICE program are included to verify the theory. Further, some experiments are achieved.

New Resistor-Less Electronically Controllable ±C Simulator Employing VCII, DVCC, and a Grounded Capacitor

In this paper, a new realization of electronically controllable positive and negative floating capacitor multiplier (±C) is presented. The peculiarity of the presented topology is that, for the first time, it implements a floating equivalent capacitor between its two input terminals, rather than a grounded one. To achieve the best performance, we simultaneously use the advantages provided by the current conveyor and its dual circuit, the voltage conveyor. The proposed topology is resistor free and employs one dual-output second-generation voltage conveyor (VCII±) and one electronically tunable differential voltage current conveyor (E-DVCC) as active building blocks (ABBs) and a single grounded capacitor. The value of the simulated capacitor is controlled by means of a control voltage VC which is used to control the current gain between X and Z terminals of E-DVCC. The circuit is free from any matching condition. A complete non-ideal analysis by considering parasitic impedances as well as non-ideal current and voltage gains of the used ABBs is presented. The proposed circuit is designed at the transistor level in 0.18 µm and ±0.9 V supply voltage. Simulation results using the SPICE program show a multiplication factor ranging from ±10 to ±25.4 with a maximum error of 0.56%. As an example, the application of the achieved floating capacitor as a standard high pass filter is also included.

A Current Mode Universal Filter and a Single Resistance Controlled Oscillator Employing only Grounded Passive Elements: Applications of VDCC

This research article explores the possible applications of voltage differencing current conveyor (VDCC), as a current mode universal filter and a sinusoidal oscillator. Without the need for an additional active/passive element, a very simple hardware modification makes it a dual-mode quadrature oscillator from the filter configuration. Both the proposed circuit requires only two VDCC and all grounded passive elements, hence a preferable choice for integration. The filter has some desirable features such as availability of all five explicit outputs, independent tunability of filter parameters. Availability of explicit quadrature current outputs, independence in start and frequency of oscillations, makes it a better oscillator design. Apart from prevalent CMOS simulation results, VDCC is also realized and experimentally tested using the off-the-shelf integrated circuit. All the pen and paper analysis such as non-ideal, sensitivity and parasitic analysis supports the design.

On the realization of electronically tunable mutually coupled circuit employing voltage differencing current conveyors (VDCCs)

On the realization of electronically tunable mutually coupled circuit employing voltage differencing current conveyors (VDCCs)

Compact Charge-Controlled Memristance Simulator with Electronic/Resistive Tunability

The work endeavors to realize a single Voltage Differencing Current Conveyor (VDCC)-based current-controlled memristor emulator with charge-dependent linear memristance function. Such current-controlled memristors closely model the current ([Formula: see text])–voltage ([Formula: see text]) relationship of the popular TiO2-based physical memristor architecture constructed by Hewlett–Packard (HP). The presented emulator circuit comprises only two grounded passive elements and two external MOS transistors along with a VDCC active element and provides the facility of electronic/resistive tunability. It is found through the detailed literature survey that the presented circuit is the most compact design to realize a charge-controlled memristance simulator as compared to any previously reported structure. The designed configuration has been verified through presented simulation results generated using PSPICE based on 0.18[Formula: see text][Formula: see text]m CMOS technology. It has also been validated through relaxation and chaotic oscillators developed using the proposed VDCC-based memristor emulator and output waveforms have been shown. Furthermore, the discussed memristor emulator has been implemented and verified through commercial ICs, AD844 and LM13700.

Carbon Nanotube Field Effect Transistors Based Digitally Reconfigurable Single Differential Voltage Current Conveyor based Analog Biquadratic Multifunctional Filter at 32nm Technology Node

Carbon Nanotube Field Effect Transistors (CNFET) are considered to be the potential candidates for overcoming the shortcomings associated with the scale of the art CMOS transistors; as the scaling continues. In this paper a digitally reconfigurable CNFET based biquadratic multifunctional filter employing a CNFET based single Differential Voltage Current Conveyor (DVCC) at 32nm technology node has been presented. The circuit utilizes a single CNFET based DVCC block along with the arrangement of few resistors and capacitors. The proposed digitally reconfigurable multifunctional filter circuit is able to obtain programmable low pass, high pass and band pass filter configurations using the same topology. The designed CNFET based multifunctional filter obtains a resonant frequency of the order of GHz. Furthermore, a 3-bit digital control of the designed multifunctional filter parameters i.e. Quality Factor (Qo) & resonant frequency has been made possible using the Current Summing Network (CSN). Sensitivity and comparative analysis has also been performed. The circuit has been simulated at a low voltage supply of 0.9V using HSPICE environment at 32nm technology node. The simulation results obtained are in sync with the theoretical analysis

Electronically controllable memcapacitor emulator employing VDCCs

Memcapacitors are become one of the research interest after the realization of memristors. Many researchers focused on the designing memcapacitor emulator because of some fabrication difficulties of this new element. In this paper, Voltage Differencing Current Conveyor (VDCC) based memcapacitor emulator is developed. This emulator is composed of two VDCCs and can be electronically controllable. To show the operation performance of the proposed circuit, some analyses and memcapacitor based associative learning circuit are given. TSMC 0.18 µm process parameters are used to simulate the memcapacitor. The circuit is also implemented on breadboard using discrete circuit elements. Both theoretical and simulation results are good agreement when compared previous studies.

Electronically tunable mixed mode universal filter employing grounded capacitors utilizing highly versatile VD-DVCC

PurposeThis paper aims to achieve two main objectives. First, to introduce to the literature a new versatile active building block, namely, voltage differencing differential voltage current conveyor (VD-DVCC) for analog signal processing applications. Second, to design a novel electronically tunable mixed-mode universal filter. The designed filter provides low-pass, high-pass, band-pass, band-reject and all-pass responses in voltage-mode (VM), current-mode (CM), trans-impedance-mode (TIM) and trans-admittance-mode (TAM).Design/methodology/approachThe proposed filter uses two VD-DVCCs, three resistors and two capacitors. All the capacitors used are grounded, which is advantageous from the monolithic integration point of view. The VD-DVCC is designed and validated in Cadence software using CMOS 0.18 µm process design kit from Silterra Malaysia at a supply voltage of ±1 V.FindingsThe proposed novel filter enjoys many attractive features including as follows: the ability to operate in all four modes, no requirement of capacitive matching, tunability of quality factor (Q) independent of pole frequency, availability of both inverting and non-inverting outputs for VM and TIM mode, high output impedance explicit current output for CM and TAM, no requirement for double/negative input signals (voltage/current) for response realization and low active and passive sensitivities. The filter is designed for a pole frequency of 5.305 MHz. The obtained results bear a close resemblance with the theoretical findings.Originality/valueThe proposed novel filter structure requires a minimum number of active and passive components and provides operation in all four operating modes. The filter will find application in structures of mixed-mode systems.

A DVCC-Based Current-Mode First-Order Universal Filter

A current-mode first-order filter configuration simultaneously providing noninverting and inverting low-pass (LP) and high-pass (HP) responses depending on passive element choice is proposed. In addition, all-pass filter (APF) responses can be easily obtained with interconnection of LP and HP output currents. The proposed filter employs only two differential voltage current conveyors, a grounded resistor and a grounded capacitor, so it is suitable for integrated circuit realization. It provides the feature of high output impedance. It does not need any passive element matching constraints. A voltage-mode oscillator based on the inverting APF is presented as a typical application. The performance of the proposed configuration is verified through many SPICE simulation and experimental test results.

Design of voltage-mode PID controller using a single voltage differencing current conveyor (VDCC)

Design of voltage-mode PID controller using a single voltage differencing current conveyor (VDCC)

Electronically Tunable Full Wave Precision Rectifier Using DVCCTAs

This work presents a voltage mode scheme of a full-wave precision rectifier circuit using an analog building block differential voltage current conveyor transconductance amplifier (DVCCTA) including five NMOS transistors. The proposed design is essentially suited for low voltage and high-frequency input signals. The operation of the proposed rectifier design depends upon the region of operation of NMOS transistors. The output waveform of the presented rectifier design can be made electronically tunable by controlling the bias voltage. The functional correctness and verification of the presented design are performed using 0.25-µm TSMC technology under the supply voltage of ±1.5 V. The absence of a resistor leads to a minimal parasitic effect. To obtain further insight on the robustness of the circuit, a Monte Carlo simulation and corner analysis are also presented. The circuit is verified experimentally by incorporating a breadboard model with the help of commercially available ICs CA3080 (operational transconductance amplifier) and AD844AN (current feedback operational amplifier) and offers remarkable compliance with both theoretical and simulation outcomes. The presented design has been laid out on Cadence virtuoso, which consumes a chip area of 9044 µm2.

Voltage Differencing Current Conveyor Based Voltage-Mode and Current-Mode Universal Biquad Filters with Electronic Tuning Facility

The objective of this study is to present four new universal biquad filters, two voltage-mode multi-input-single-output (MISO), and two current-mode single-input-multi-output (SIMO). The filters employ one voltage differencing current conveyor (VDCC) as an active element and two capacitors along with two resistors as passive elements. All the five filter responses, i.e., high-pass, low-pass, band-pass, band-stop, and all-pass responses, are obtained from the same circuit topology. Moreover, the pole frequency and quality factor are independently tunable. Additionally, they do not require any double/inverted input signals for response realization. Furthermore, they enjoy low active and passive sensitivities. Various regular analyses support the design ideas. The functionality of the presented filters are tested by PSPICE simulations using TSMC 0.18 µm technology parameters with ± 0.9 V supply voltage. The circuits are also justified experimentally by creating the VDCC block using commercially available OPA860 ICs. The experimental and simulation results agree well with the theoretically predicted results.

CMOS realization of electronically tunable VDCC based single-input-dual-output filter

This paper introduces a CMOS implementation of filter application based on single Voltage Differencing Current Conveyor (VDCC). The filter employs a single VDCC, one floating capacitor and three grounded passive components. The designed filter can simultaneously implement the band-pass and high-pass filtering responses. By means of the trans-conductance gain of the VDCC, the angular frequency and quality factor of the filter can be dynamically modified. Furthermore, avoid conflicting with the natural frequency, the quality factor can also be tuned. Layout, pre and post layout simulations are carried out for the circuits, the proposed filter which occupies 68μm×23μm area excluding the area of the passive components, using 0.18μm AMS CMOS process parameters in Cadence environment. The proposed VDCC structure can utilize additional high-impedance z-copy terminal. The natural frequency of the filter is designed as 100MHz which is suitable for the RF applications. Post-layout simulations with noise, THD, PVT, and Monte Carlo analyzes are conducted with the Spectre simulator to assess the feasibility of the developed structures. The findings of the simulations are found to be closely in consistent with the theoretical research.

On the design of improved resistive sensor interface using 32 nm CNFET

The interface circuits have been mostly utilized in the areas like food-processing, pharmacy, industries, biotechnology, etc. The differential voltage current conveyor (DVCC) is a very multipurpose active device and gained attention for circuit based on current-mode. The paper presented a current conveyor (DVCC) based on CNFET for the design of a resistive sensor interface. Proposed circuit decreases 16.6% power than prevailing work. The design also reduces the number of active and passive components. Moreover, an Instrumentation amplifier based on DVCC is presented which is also used for the circuit of sensor interface. The design aspect are verified with SPICE simulations.

A Transconductance-Mode Multifunction Filter with High Input and High Output Impedance Nodes Using Voltage Differencing Current Conveyors (VDCCs)

The design of transconductance-mode multifunction biquad filter containing three input voltage nodes and single-output current node is proposed. Its circuit principle is emphasized on employing Voltage Differencing Current Conveyor (VDCC) to be an active building block. The proposed filter description uses three VDCCs co-working with two grounded capacitors and three grounded resistors. The synthesis of the proposed multifunction filter is based on avoidance of using multiple-output active elements to achieve commercially available integrated circuits for practical implementation. Additionally, without multiple-output active element, it can alleviate current tracking error from the current mirrors used in output ports. It also decreases the amounts of the transistors inside the active elements. The proposed multifunction filter offers all 5 filter functions, which are non-inverting Low-Pass (LP), non-inverting High-Pass (HP), non-inverting Band-Pass (BP), non-inverting Band-Reject (BR) and also non-inverting All-Pass (AP) functions from same circuit topology under different circuit condition for input signals. Furthermore, the natural frequency for all filtering responses is independently achieved from the bandwidth or the quality factor of the proposed filter. For cascade-able connectivity, the output current port indeed provides a high impedance. In addition, the magnitude of the output current for all filtering functions can be resistively adjusted. The consideration for non-ideal case of the presented multifunction filter is also analyzed. The simulation and experimental results of the presented transconductance multifunction biquad filter based on VDCC practically implemented by the commercially available ICs, LM13700 and AD844 can validate the theoretical anticipation.

$$\alpha$$-order universal filter realization based on single input multi-output differential voltage current conveyor

Two voltage-mode topologies single input multi-output universal fractional filters with high input impedance are proposed. The proposed analog filters consist of three DVCC+ blocks, two grounded capacitors and two resistors targeting the minimum passive elements. The proposed topologies provide a realization for all standard fractional filter functions (HP, LP, BP, AP and notch filter). The effect of Fractional order on filter responses in the range of $$\alpha$$ from 0.7 to 1.2 was studied. Fractional order has been investigated for different filter responses in terms of cutoff, gain, phase and noise. The central frequency was designed to be 110 KHz for the first topology, while that of the second topology is around 100 KHz. The proposed filters are simulated using Cadence TSMC 130nm with dual supply voltages $$\pm \,0.75V$$ . A performance comparison between the proposed topologies and the topologies in the literature shows that the proposed architecture gives an acceptable performance.

Floating memristor and inverse memristor emulation configurations with electronic/resistance controllability

This study presents two configurations to realise the behaviour of a floating memristor and an inverse memristor. The modified version of VDCC (voltage differencing current conveyor) termed as MVDCC (modified VDCC) is used to develop the presented emulators. The floating memristor emulator uses a single MVDCC and two grounded passive elements while the configuration of floating inverse memristor emulator is based on two MVDCCs, two grounded resistances and single grounded capacitance. The behaviour of both the circuits can be controlled through applied bias voltage as well as the employed grounded resistances. Both the presented circuits do not employ any external analogue multiplier circuit/IC, which can be considered as the most notable feature of these circuits. This study also describes the mathematical properties of memristor and inverse memristor taking both symmetrical and non-symmetrical models into account. PSPICE simulation tool is used to verify the working of realised emulation circuits using 0.18 μm CMOS process technology. The implementations of realised emulators, employing commercial ICs like AD844, CA3080 and LM13700, have also been presented and validated.

Electronically tunable third-order dual-mode quadrature sinusoidal oscillators employing VDCCs and all grounded components

Two new configurations of third-order dual-mode (i.e. both voltage and current mode) quadrature sinusoidal oscillator using a newly reported active block, called the voltage differencing current conveyor (VDCC) have been presented in this manuscript. Both the proposed oscillators employ two VDCCs, three capacitors, and three resistors. The circuits are suitable for integrated circuit (IC) realization as all the passive components used in the circuits are grounded. In addition, the proposed configurations enjoy the following advantages: i) both the frequency of oscillation (FO) and the condition of oscillation (CO) are electronically tunable; ii) tuning of FO and CO are independent to each other; and iii) active and passive sensitivities are low. Non-ideal, parasitic and phase noise analysis of the circuits have been included to strengthen the design idea. PSPICE simulation results using TSMC 0.18 μm CMOS technology are given to verify the theoretical analysis. The operations of the proposed circuits are also verified experimentally wherein VDCC is realized using OPA860 ICs.