Dc-link Capacitor Voltage Balance Research Articles

A Virtual-Vector Pulsewidth Modulation for theFour-Level Diode-Clamped DC–AC Converter

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> Several pulsewidth modulation (PWM) strategies have been proposed for the three-level three-phase diode-clamped dc–ac converter. Among them, the nearest-three virtual-space-vector PWM guarantees the dc-link capacitor voltage balance under any operating condition, provided that the addition of the three phase currents equals zero. This paper extends this modulation concept to the four level converter. The new virtual vectors are presented and a simple modulation solution is defined. Conventional nearest-three space vector PWM cannot comprehensively achieve balanced and stable dc-link voltages. The proposed modulation solution enables the practical use of the four-level converter since it guarantees the dc-link capacitor voltage balance for any operating condition and load, provided that the addition of the three phase currents equals zero. Simulation and experimental results prove the goodness of the presented approach. </para>

A Dual Five-Level Inverter-Fed Induction Motor Drive With Common-Mode Voltage Elimination and DC-Link Capacitor Voltage Balancing Using Only the Switching-State Redundancy—Part II

The open-loop control scheme presented in part I of this paper for a dual five-level-inverter-fed induction motor (IM) drive with two dc power supplies maintains dc-link capacitorvoltage balancing and common-mode voltage (CMV) elimination throughout the operating range of the drive. The operating limitation of the proposed open-loop control scheme to take corrective action toward the existing unbalance in the dc-link-capacitor voltages is also pointed out in part I of this paper. As a solution to this, a simple closed-loop control scheme, which is based only on the switching-state redundancy, is proposed in this part of the paper. The proposed closed-loop control scheme not only prevents further unbalancing of capacitor voltages but also takes corrective actions to bring back the capacitor voltages in the balanced state. The proposed closed-loop scheme achieves dc-link capacitorvoltage balancing and elimination of CMV together in the complete modulation range, including overmodulation of up to the 24-step operation. The proposed control scheme does not affect the output fundamental voltage generated by the inverter, as it effectively utilizes only the availability of redundant switching states of the inverter, and does not call for additional power circuit hardware. The scheme is presented with the simulation studies and experimentally verified with a 1.5-kW open-end winding IM drive.

DC Link Capacitor Voltage Balancing in a Three-Phase Diode Clamped Inverter Controlled by a Direct Space Vector of Line-to-Line Voltages

In this paper, the direct modulation strategy of a three-level inverter with self stabilization of the dc link voltage is extended to a five-level inverter. Therefore, a new modeling and control strategy of a five-level three-phase diode-clamped inverter (DCI) is presented. The obtained modeling shows that modulated multilevel voltages are obtained by combination of eight different three-level functions, which are called modulation functions. Therefore, a space-vector scheme without using a Park transform is explained. Based on this algorithm, the location of the reference voltage vector can be easily determined. Then, the voltage vectors are selected to generate corresponding levels and simultaneously their durations are calculated. More over, the redundancies of different switch configurations for the generation of intermediate voltages are used to limit the deviation of capacitor voltages. Experimental results are given to illustrate the proposed control strategy of the three-phase three-level diode clamped inverter. Then, obtained results for a five-level three-phase DCI with the extended version of the control strategy are presented to show the good performances of the proposed balancing modulation.

Three-Level Inverter Scheme With Common Mode Voltage Elimination and DC Link Capacitor Voltage Balancing for an Open-End Winding Induction Motor Drive

A dc link capacitor voltage balancing scheme along with common mode voltage elimination is proposed for an induction motor drive, with open-end winding structure. The motor is fed from both the ends with three-level inverters generating a five level output voltage space phasor structure. If switching combinations, with zero common mode voltage in the pole voltage, are used, then the resultant voltage space vector combinations are equivalent to that of a three-level inverter. The proposed inverter vector locations exhibit greater multiplicity in the inverter switching combinations which is suitably exploited to arrive at a capacitor voltage balancing scheme. This allows the use of a single dc link power supply for the combined inverter structure. The simultaneous task of common mode voltage elimination with dc link capacitor voltage balancing, using only the switching state redundancies, is experimentally verified on a 1.5-kW induction motor drive