Vertical Devices Research Articles

(Invited) Development of Vertical Gallium Nitride Power Devices for Use in Electric Vehicle Drivetrains

The rapid acceleration of vehicle drivetrain electrification is expected to be a major driver for the widespread adoption of silicon carbide (SiC) power devices such as metal-oxide-semiconductor field-effect transistors (MOSFETs) and junction-barrier-Schottky (JBS) diodes (the latter needed as the freewheeling diode in parallel with the MOSFET switch), due to their ability to increase the efficiency and reduce the volume of the power electronic inverter that ties the vehicle’s battery to the electric motor(s). The move from traditional silicon-based power electronics to SiC-based power electronics is necessary to achieve the U.S. Department of Energy (DOE) power electronics density target of 100 kW/L. However, gallium nitride (GaN)-based inverters may offer additional benefits beyond what can be achieved with SiC. For example, genetic-algorithm-based system-level simulations of the Pareto front trade-off between power density and efficiency of the inverter indicate that GaN power devices offer solutions superior to those achievable with SiC. However, given that the drivetrain DC bus voltage in future electric vehicles is expected to be 800 V or higher, commercially-available GaN power switching high electron mobility transistors (HEMTs), which typically have voltage ratings of 650 V or less, are unsuitable for a two-level inverter design, which is preferred by automotive system designers due to its simplicity and associated reliability. As such, vertical GaN power devices with voltage ratings of 1.2 kV or greater are necessary. This talk will describe our team’s efforts to develop both vertical GaN MOSFETs and JBS diodes. Designs for both trench MOSFETs and double-well MOSFETs (DMOSFETs) will be discussed. Experimental work has focused on trench MOSFETs, chiefly due to the need for selective-area doping in the DMOSFET, which is generally challenging in GaN and is particularly so in this structure due to the double well. The trench MOSFET presents significant challenges as well, including the need for a high-quality gate dielectric on the etched sidewall of the trench as well as mitigation of high electric fields at the bottom of the trench. Vertical GaN trench MOSFETs utilizing drift layers grown by metal-organic chemical vapor deposition (MOCVD) on native GaN substrates have been fabricated. Devices with an atomic-layer-deposited SiO2 gate dielectric have demonstrated a positive threshold voltage of ~8 V, an on/off ratio of ~108, and a current density of ~400 mA/mm. Additionally, GaN JBS diodes are being developed concurrently, and in this case selective-area doping cannot be avoided as alternating regions of p- and n-doped material are inherent to the operation of the device. Our team has utilized an etch-and-regrowth approach to demonstrate vertical GaN JBS diodes with reverse hold-off voltage >1.5 kV and forward turn-on voltage <1 V, consistent with JBS operation, although the reverse leakage current is higher than is typically observed for a continuously-grown GaN PN junction. Prospects to further improve device performance will be discussed, including reducing the reverse leakage current though advances in the selective-area p-GaN regrowth process. This work was supported by the Electric Drivetrain Consortium managed by Susan Rogers of DOE’s Vehicle Technologies Office and by the ARPA-E PNDIODES program directed by Isik Kizilyalli. Sandia National Laboratories is a multi-mission laboratory managed and operated by National Technology & Engineering Solutions of Sandia, LLC, a wholly owned subsidiary of Honeywell International Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525. This paper describes objective technical results and analysis. Any subjective views or opinions that might be expressed in the paper do not necessarily represent the views of the U.S. Department of Energy or the United States Government.

Large Tunneling Magnetoresistance in van der Waals Ferromagnet/Semiconductor Heterojunctions.

2D layered chalcogenide semiconductors have been proposed as a promising class of materials for low-dimensional electronic, optoelectronic, and spintronic devices. Here, all-2D van der Waals vertical spin-valve devices, that combine the 2D layered semiconductor InSe as a spacer with the 2D layered ferromagnetic metal Fe3 GeTe2 as spin injection and detection electrodes, are reported. Two distinct transport behaviors are observed: tunneling and metallic, which are assigned to the formation of a pinhole-free tunnel barrier at the Fe3 GeTe2 /InSe interface and pinholes in the InSe spacer layer, respectively. For the tunneling device, a large magnetoresistance (MR) of 41% is obtained under an applied bias current of 0.1 µA at 10 K, which is about three times larger than that of the metallic device. Moreover, the tunneling device exhibits a lower operating bias current but a more sensitive bias current dependence than the metallic device. The MR and spin polarization of both the metallic and tunneling devices decrease with increasing temperature, which can be fitted well by Bloch's law. These findings reveal the critical role of pinholes in the MR of all-2D van der Waals ferromagnet/semiconductor heterojunction devices.

Vertical GaN p+-n junction diode with ideal avalanche capability grown by halide vapor phase epitaxy

A vertical GaN p+-n junction diode with an ideal breakdown voltage was grown by halide vapor phase epitaxy (HVPE). A steep p+-n interface was observed even with the use of the HVPE method. No Si-accumulating layer was formed at the p+-n interface because of the continuous HVPE growth from the n-type drift layer to the p-type layer. This method provides improved electrical properties compared with the regrowth of p-type GaN layers. The minimum ideality factor of approximately 1.6 was obtained. The breakdown voltage increased from 874 to 974 V with the increase in the temperature from 25 to 200 °C, which suggests that avalanche multiplication causes the breakdown. The temperature-dependent breakdown voltage was in good agreement with the breakdown voltage calculated using the ideal critical electric field. These results indicate that HVPE is promising for the fabrication of vertical GaN power devices.

Research into the Dynamic Characteristics of the Planetary Cob­Separating Device

Abstract. In the article, the authors propose a methodological approach to calculating the planetary cob-separating device used in corn harvesters and specialized headers. The dynamic characteristics of the planetary cob-separating device operation were investigated. The authors found out that the machine dynamics research problems are rather diverse due to the complexity of the dynamic processes occurring in them. The theoretical research methods prove to be of particular importance, since they make it possible to define the laws of machine unit motion, even at the stage of designing the planetary cob-separating device. (Research purpose) To propose a method for calculating the main kinematic and dynamic parameters of the vertical cob-separating device operation. (Materials and methods) The authors studied the methodological approaches and mathematical tools used to determine the main kinematic and dynamic parameters of the vertical cob-separating device operation; examined the scheme of a single-drum planetary cob-separating device in a corn harvester and built a differential equation of motion. (Results and discussion) After a step-by-step mathematical calculation with the use of the proposed methodological approach to studying the dynamic characteristics arising during the planetary cob-separating device operation, the following equations were obtained: starting the device at idle; starting the device with a load; feeding stems after starting the device; sudden interruption of the supply. When conducting the laboratory studies, it was determined that the cob-separating device showed the greatest effect at an angular speed of the drum within the range of 52.1-62.2 radians per second. (Conclusions) The authors considered four modes of the cob-separating device operation in a corn harvester and obtained the equations for them. The authors created a diagram of the vertical cob-separating device and proposed a methodological approach and an algorithm for calculating the main dynamic and kinematic indicators of its operation.

Surge Current and Avalanche Ruggedness of 1.2-kV Vertical GaN p-n Diodes

This letter reports the avalanche and surge current ruggedness of the industry's first 1.2-kV-class vertical GaN p-n diodes fabricated on 100-mm GaN substrates. The 1.2-kV vertical GaN p-n diodes with a 1.39-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> device area and an avalanche breakdown voltage of 1589 V show a critical avalanche energy density of 7.6 J/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> in unclamped inductive switching tests, as well as a critical surge current of 54 A and a critical surge energy density of 180 J/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> in 10-ms surge current tests. All these values are the highest reported in vertical GaN devices and comparable to those of commercial SiC p-n diodes and merged p-n Schottky diodes. These GaN p-n diodes show significantly smaller reverse recovery compared to SiC p-n diodes, revealing less conductivity modulation in n-GaN. The negative temperature coefficient of differential on-resistance and the anticlockwise surge <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I–V</i> locus are believed to be due to the increased acceptor ionization in p-GaN and the decreased contact resistance at high temperatures. These results suggest a high ruggedness of GaN p-n junctions with small bipolar currents and fast switching capabilities. As the first electrothermal ruggedness data for industry's vertical GaN devices, these results provide key new insights for the development of vertical GaN devices as well as their application spaces.

(Invited) Selective Area Doping in Gallium Nitride: A Retrospective of the ARPA-E PNDIODES Program

As silicon-based semiconductors are fast approaching their performance limits for high power requirements, wide-bandgap semiconductors such as gallium nitride (GaN) and silicon carbide (SiC) with their superior electrical properties are likely candidates to replace them. The DOE Advanced Research Projects Agency-Energy (ARPA-E) launched the Power Nitride Doping Innovation Offers Devices Enabling SWITCHES (PNDIODES) program in 2017 to address the lack of a viable selective area doping processes in GaN which is a major barrier to fabricating vertical GaN power electronic devices. The PNDIODES program focused on the mechanistic understanding and development of transformational selective area doping processes to demonstrate arbitrarily placed, contactable, and generally useable p-n junction regions in GaN. A retrospective of the PNDIODES program is provided discussing the origins of the program, the progress and challenges of the developed selective area doping processes, and a description of the advanced characterization techniques developed to investigate the selectively doped regions.

Planar and three-dimensional damage-free etching of β-Ga2O3 using atomic gallium flux

In situ etching using Ga flux in an ultra-high vacuum environment like molecular beam epitaxy is introduced as a method to make high aspect ratio three-dimensional (3D) structures in β-Ga2O3. Etching of β-Ga2O3 due to excess Ga adatoms on the epilayer surface had been viewed as non-ideal for epitaxial growth especially since it results in plateauing and lowering of the growth rate. In this study, we use this well-known reaction from epitaxial growth to intentionally etch β-Ga2O3. We demonstrate etch rate ranging from 2.9 to 30 nm/min with the highest reported etch rate being only limited by the highest Ga flux used. Patterned in situ etching is also demonstrated and used to study the effect of fin orientation on the sidewall profiles and dopant (Si) segregation on the etched surface. Using in situ Ga etching, we also demonstrate 150 nm wide fins and 200 nm wide nanopillars with high aspect ratio. This etching method could enable future development of highly scaled vertical and lateral 3D devices in β-Ga2O3.

Experimental Research on the Co-deflagration Characteristics of a Mixture of Coal Powder and Corn Starch in an Air/methane Atmosphere

ABSTRACT To investigate co-deflagration effect of a mixture of coal powder and corn starch, an air/methane atmosphere test was performed in a vertical explosion tube device and a 20-L spherical explosion device. Compared with pure coal powder and corn starch, the powder mixture undergoing deflagration in air was characterized by more uniform-distributed flame brightness, a more continuous flame structure, and less fluctuating flame propagation, approaching the fastest propagation velocity before mixing. Under the same mass concentration, the deflagration pressure of the powder mixture in methane atmosphere is related to the mixing proportion and is between the respective pressures of the two kinds of powder. P m and (dP/dt)m of the mixtures of methane and different powders show overall consistency with increasing equivalence ratios, however, different powders with the same equivalence ratio still differ in their characteristic deflagration parameters.

Epitaxial layered Sb2Te3 thin films for memory and neuromorphic applications

Two-dimensional layered materials have attracted a lot of attention as building block in memristive devices owing to their high downscaling potential, easy stacking due to van der Waals forces and mechanical flexibility. In this study, memristive switching is explored in vertical device structures based on layered Sb2Te3. For this, epitaxial 2D-like Sb2Te3 thin films with thicknesses of ∼20 nm were directly grown on conductive p-type Si (111) substrates by pulsed laser deposition. Analog programmability mimicking neuromorphic operation, stable multilevel retention and endurance performance with a memory window larger than one order of magnitude are achieved by utilizing Ag as electrode metal. However, Cu top electrodes lead to a memristive switching with generally smaller memory window and volatility of programmed states. Devices with both electrode metals offer forming-free operation and self-compliance. Structural and chemical characterization reveal a diffusion of Ag and Cu into the Sb2Te3. It is suggested that charge trapping is involved in the memristive switching mechanism. Overall, this work shows the high potential of thin layered Sb2Te3 for neuromorphic computing and offers a scalable method for integration into the existing Si platform.

A monolithic, back-gated diamond field-effect transistor for tunable color centers

We present an innovative design for a monolithic field effect transistor, where all components consist of the wide-bandgap material diamond. The back gate-electrode is realized by a buried, degenerately boron-doped diamond (resistivity < 10−2 Ω cm), while the dielectric material is made of lightly nitrogen-doped diamond. The 2DHG on the hydrogen-terminated surface serves as the conductive channel of the transistor. We discuss the band structure of this device, the function of each individual component and show the sample preparation routine. Furthermore, we investigate the electrical tunability of the 2DHG and the optical tunability of NV-centers in a first proof-of-principle sample. Additionally, we use the field effect to manipulate the charge state of color centers in the nitrogen-doped film. This vertical and monolithic device structure opens up a range of applications, not only in the diamond semiconductor and quantum information technology, but also for sensing applications where the back-gating is advantageous or where an all-diamond layer sequence is beneficial.

Thermal design of multi-fin Ga2O3 vertical transistors

Ultra-wide bandgap β-gallium oxide (Ga2O3) vertical device technologies are of significant interest in the context of the development of next-generation kV-range power switching devices. In this work, thermal analysis of vertical fin channel-based metal–oxide–semiconductor field-effect transistors (or fin field-effect transistors—FinFETs) was performed using infrared thermal microscopy and coupled electro-thermal modeling. FinFETs with different fin width and channel spacing were characterized to study the thermal design trade-off when attempting to minimize the footprint of multi-fin FinFET arrays. A 50 × 50 μm2 scaled FinFET cell array exhibited an ∼23× higher temperature rise as compared to a 5-fin device. Devices with different orientations were fabricated and characterized. By rotating the fin channel aligned along the [010] direction by 90º, the channel temperature rise reduced by 30%, due to the anisotropy of the Ga2O3 thermal conductivity (κ). Electro-thermal modeling shows that a 20% reduction in the temperature rise is possible by fabricating devices on a (010)-oriented substrate as compared to the tested devices built on a (001) substrate. These results indicate the importance of the electro-thermal co-design process for Ga2O3 vertical FinFET cell arrays.

Continuous mixing technology: Validation of a DEM model

Continuous powder mixing is an important technology used in the development and manufacturing of solid oral dosage forms. Since critical quality attributes of the final product greatly depend on the performance of the mixing step, an analysis of such a process using the Discrete Element Method (DEM) is of crucial importance. On one hand, the number of expensive experimental runs can be reduced dramatically. On the other hand, numerical simulations can provide information that is very difficult to obtain experimentally. In order to apply such a simulation technology in product development and to replace experimental runs, an intensive model validation step is required. This paper presents a DEM model of the vertical continuous mixing device termed CMT (continuous mixing technology) and an extensive validation workflow. First, a cohesive contact model was calibrated in two small-scale characterization experiments: a compression test with spring-back and a shear cell test. An improved, quicker calibration procedure utilizing the previously calibrated contact models is presented. The calibration procedure is able to differentiate between the blend properties caused by different API particle sizes in the same formulation. Second, DEM simulations of the CMT were carried out to determine the residence time distribution (RTD) of the material inside the mixer. After that, the predicted RTDs were compared with the results of tracer spike experiments conducted with two blend material properties at two mass throughputs of 15 kg/h and 30 kg/h. Additionally, three hold-up masses (500, 730 and 850 g) and three impeller speeds (400, 440 and 650 rpms) were considered. Finally, both RTD datasets from DEM and tracer experiments were used to predict the damping behavior of incoming feeder fluctuations and the funnel of maximum duration and magnitude of incoming deviations that do not require a control action. The results for both tools in terms of enabling a control strategy (the fluctuation damping and the funnel plot) are in excellent agreement, indicating that DEM simulations are well suited to replace process-scale tracer spike experiments to determine the RTD.

Corrections to “Electrical Characteristics of Vertical GaN Nanowire Vacuum Field Emitter Devices” [Jun 21 3034-3039

In the above article <xref ref-type="bibr" rid="ref1" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">[1]</xref> , the units of the y-axis in <xref ref-type="fig" rid="fig1" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Fig. 4(a)</xref> should be kA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> instead of A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The figure with the correct units is presented here.

Out‐of‐Plane Resistance Switching of 2D Bi2O2Se at the Nanoscale

AbstractTwo‐dimensional (2D) bismuth oxyselenide (Bi2O2Se) with high electron mobility shows great potential for nanoelectronics. Although the in‐plane properties of Bi2O2Se have been widely studied, its out‐of‐plane electrical transport behavior remains elusive, despite its importance in fabricating devices with new functionality and high integration density. Here, the out‐of‐plane electrical properties of 2D Bi2O2Se at nanoscale are revealed by conductive atomic force microscope. This work finds that hillocks with tunable heights and sizes are formed on Bi2O2Se after applying a vertical electric field. Intriguingly, such hillocks are conductive in the vertical direction, resulting in a previously unknown out‐of‐plane resistance switching in thick Bi2O2Se flakes while ohmic conductive characteristic in thin ones. Furthermore, the transformation is observed from bipolar to stable unipolar conduction in thick Bi2O2Se flake possessing such hillocks, suggesting its potential to function as a selector in vertical devices. This work reveals the unique out‐of‐plane transport behavior of 2D Bi2O2Se, providing the basis for fabricating vertical devices based on this emerging 2D material.

Floral design GaN crystals: low-resistive and low-dislocation-density growth by oxide vapor phase epitaxy

GaN crystal growth mode in the oxide vapor phase epitaxy (OVPE) method, which simultaneously provides low electrical resistance and low threading dislocation density (TDD), has been investigated in detail. The results clarified that these qualities can be achieved by the expression of numerous inverted pyramidal pits, called three-dimensional (3D) growth mode. This mode reduced TDD from 3.8 × 106 cm−2 to 2.0 × 104 cm−2 for 1 mm thick growth because the threading dislocations (TDs) converged to the center of each pit. Moreover, when the crystal surface after polishing was observed by photoluminescence measurement, peculiar floral designs reflecting the distribution of oxygen concentration were observed over the entire surface. In addition, the etch pits exhibited TDs in the center of each floral design. On the basis of our results, we proposed that the 3D-OVPE-GaN will serve as a key material for improving the performance of vertical GaN devices.

Method of assessing the reduction of solar heat on window surface shaded by continuous vertically slanted shading devices

The research discusses calibration of the method used to calculate solar heat transfer through shaded windows with continuous vertical slanted shading devices (below is abbreviated as "vertical slanted fins") with any slant angle Θ through a radiation reduction coefficient - Kbt. In order to evaluate the reduction of solar heat on window surface shaded by shading devices, a designated coefficient β of solar heat gain reduction through glazed windows should be established. It is the ratio of the transmitted amount of solar heat (including direct and diffuse radiation) through windows with shading device QK to those without solar shading device QKo. The study also introduces two in-house software programs. These programs help calculating solar heat gain and coefficient β for vertically slanted fins with any slant angle θ for 16 window orientations. The results of this study will be applied to the implementation of the Vietnamese national code QCVN 09:2017/BXD towards energy efficiency in buildings.

Impact of growth parameters on the background doping of GaN films grown by ammonia and plasma-assisted molecular beam epitaxy for high-voltage vertical power switches

We report on ammonia and plasma-assisted molecular beam epitaxy (NH3-MBE and PAMBE) grown GaN layers with a low net carrier concentration (Nnet). Growth parameters, such as growth rate, V–III ratio, and plasma power, were investigated on different substrates to study their impact on surface morphology and background doping levels using atomic force microscopy and capacitance–voltage (C–V) measurements, respectively. The elevated growth rates are especially interesting for vertical power switches, requiring very thick drift regions (over 10 μm) with low background concentrations. For our NH3-MBE-grown layers, Nnet shows an almost linear increase with the growth rate. Using a freestanding substrate and at a fast growth rate of 1.4 μm hr−1, a Nnet value as low as 1 × 1015 cm−3 was achieved. For samples grown via PAMBE, the lowest Nnet among samples grown under a Ga adlayer was 2 × 1016 cm−3 for a growth rate of 0.32 μm h−1 on a GaN-on-sapphire template. The results support the use of MBE for growing high-quality GaN material with reasonably fast growth rates maintaining low background doping levels for high-voltage vertical power electronic devices.

Material considerations for the design of 2D/3D hot electron transistors

Combining two- and three-dimensional (2D/3D) materials provides a unique route to enabling next-generation hot electron transistors (HETs)—a vertical ballistic device, promising for high-frequency applications since they are not limited by electron velocity saturation, fabrication limitations, or short channel effects. The early demonstrations of HETs suffered from poor material and interface qualities and thick device components. The revival of the HET, with a cut-off predicted frequency above 1 THz, can be correlated with the arrival of 2D materials. Here, we discuss HET operating principles, examine HET material architectures with and without tunneling barriers, and review heterostructure considerations. We discuss material and interface properties that control barrier and base performance and critically review recent 2D/3D HETs for tunneling efficiency, output current density, current gain, and output conductance. Finally, we provide an overview of 2D and 3D semiconductors that form Schottky barriers with graphene that may be utilized as a collector while considering the device physics and growth issues.

Systematic Characterization of Plasma-Etched Trenches on 4H-SiC Wafers.

Silicon carbide power semiconductors overcome some limitations of silicon chips, and therefore, SiC is an attractive candidate for next-generation power electronics. In addition, the number of possible vertical devices that can be obtained on a given surface using the trench technique is significantly larger than that attainable using a planar setup. Moreover, a SiC trench power metal oxide semiconductor field-effect transistor (power MOSFET) structure removes the junction field-effect transistor (JFET) region (that would decrease the current flow width) and improves the channel density, thus reducing the specific electrical resistance. Consequently, in the present study, we report on the chemical bonding state of elements and structural characterization of trenches, obtained using SF6-based plasma etching, on the 4H-SiC polytype substrate. An interferometric algorithm that finds the endpoint to stop etching governed the trench depth. Scanning electron microscopy, transmission electron microscopy, atomic force microscopy, and X-ray photoelectron spectroscopy analyses stated the high quality and uniformity of the trenches. These materials are particularly promising for the fabrication of the SiC MOSFET to be implemented in the manufacturing of power devices.

Large-Scale Uniform-Patterned Arrays of Ultrathin All-2D Vertical Stacked Photodetector Devices.

The key to unlocking the full potential of two-dimensional (2D) materials in ultrathin opto-electronics is their layer-by-layer integration and the ability to produce them on the wafer scale using traditional industry-compatible technology. Here, we demonstrate a novel stacking method for assembling uniform-patterned periodic 2D arrays into vertical-layered heterostructures. The fabricated heterostructure can serve as photodetectors, with graphene electrodes and transition-metal dichalcogenides as the photo-absorber. All 2D materials used are grown into continuous films with only mono- or bilayer thickness. Each layer is prepatterned into a specific shape on a substrate and then transferred to the device substrate with aligned precision. In order to achieve long-range alignment across the wafer, interlocking marker pairs are used to help guide the lateral accuracy and reduce rotational error. We show hundreds of identical devices produced with 2D periodic spacing on a 1 cm × 1 cm SiO2/Si substrate, a fundamental prerequisite for future pixelated detectors. Statistics of the photovoltaic performance of the devices are reported, with values that are comparable to devices made by chemical vapor deposition-grown materials. Our work provides pathways for the large-scale fabrication of ultrathin all-2D opto-electronics that form the basis of the future in 2D-pixelated cameras and displays.