We outlined a simple model to account for the surface roughness (SR)-induced enhanced threshold voltage (V/sub TH/) shifts that were recently observed in ultrathin-body MOSFETs fabricated on <100> Si surface. The phenomena of enhanced V/sub TH/ shifts can be modeled by accounting for the fluctuation of quantization energy in the ultrathin body (UTB) MOSFETs due to SR up to a second-order approximation. Our model is then used to examine the enhanced V/sub TH/ shift phenomena in other novel surface orientations for Si and Ge and its impact on gate workfunction design. We also performed a calculation of the SR-limited hole mobility (/spl mu//sub H,SR/) of p-MOSFETs with an ultrathin Si and Ge active layer thickness, T/sub Body/<10 nm. Calculation of the electronic band structures is done within the effective mass framework via the Luttinger Kohn Hamiltonian, and the mobility is calculated using an isotropic approximation for the relaxation time calculation, while retaining the full anisotropy of the valence subband structure. For both Si and Ge, the dependence of /spl mu//sub H,SR/ on the surface orientation, channel orientation, and T/sub Body/ are explored. It was found that a <110> surface yields the highest /spl mu//sub H,SR/. The increasing quantization mass m/sub z/ for <110> surface renders its /spl mu//sub H,SR/ less susceptible with the decrease of T/sub Body/. In contrast, <100> surface exhibits smallest /spl mu//sub H,SR/ due to its smallest m/sub z/. The SR parameters, i.e. autocorrelation length (L) and root-mean-square (/spl Delta//sub rms/) used in this paper is obtained from the available experimental result of Si<100> UTB MOSFETs, by adjusting these SR parameters to obtain a theoretical fit with experimental data on SR-limited mobility and V/sub TH/ shifts. This set of SR parameters is then employed for all orientations of both Si and Ge devices.