Two-dimensional (2D) materials have been extensively studied as one of the promising post-silicon materials for nano-sized field effect transistors to overcome physical limits of Si-based electronic devices. Semiconducting transition metal dichalcogenides (TMDs) have been studied as attractive candidates with sizeable band structure, in contrast to graphene with zero band gap limiting its implementation into electronics due to large off-currents and low drain-current modulation. Among all, tungsten diselenide (WSe2) has attracted attention as a p-type conducting material with its high current on/off ratio, hole mobility, and environmental stability. Despite the superior electrical properties of WSe2, difficulty in forming of a stable Ohmic contact with a low contact resistance has posed a significant limitation in fabricating WSe2-based devices. It creates van der Waals (vdW) gaps with contact metal and additional tunneling barrier, which increases contact resistance and affects device performance. Efforts have been made to reduce contact resistance such as by work function engineering and charge transfer methods employing various novel technical strategies. However, such approaches still need industrial fabrication compatibility and environmental stability. In this work, a simple one-step vacuum annealing was used to address vdW gaps and reduce contact resistance. Thermal annealing is extensively incorporated in conventional compound semiconductor fabrication process to facilitate alloying or inter-diffusion of metal to semiconductors and enhance contact properties. Plus, thermal annealing can eliminate interlayer residues originated from the repeated exfoliation and dry transfer processes, which would deteriorate electrical contact between metals and TMDs. Herein, few-layered WSe2 was transferred on to platinum (Pt) electrodes with high work function (>5 eV) to facilitate hole injection. Effects of vacuum annealing on the performance of WSe2 FETs were then investigated. With improved contact properties from the removal of interlayer residues, the device performance including on-current density, hole mobility, and current on/off ratio enhanced up to the temperature of 650 ℃. Especially, p-type conduction was greatly improved after vacuum-annealed at 600 ℃, confirmed by selenium vacancy-aided formation of interlayer PtxW1-x alloy. The alloyed contacts occupied between WSe2 and Pt played a role in improving contact properties and lowering contact resistance. The device performance started to deteriorate when vacuum-annealed above 650 ℃, which is attributed to thermal degradation of WSe2 channel from high annealing temperature. Our work would further pave the way for achieving methods in fabricating a reliable TMDs based devices. Details will be discussed at the presentation. Figure 1