Use Of Silicon Wafers Research Articles

A Novel Approach on Reusing Silicon Wafer Kerf Particle as Potential Filler Material in Polymer Composite

In solar panel production stage, it is unavoidable to neglect the huge amount of solar grade silicon particles displaced during the slicing of silicon ingot operation. A subject of the present study is to reuse the solar-grade silicon particles as a filler to enhance the mechanical properties of the epoxy-glass fiber polymer composite. Polymer composite was fabricated using a hand-layup method with constant hydraulic pressure by varying filler weight percentages of 0, 1, 3, 5, and 10 %. Particle size and mineralogical features of the recovered silicon particle were characterized by particle size analyser and X-ray diffraction analysis. A positive effect on the mechanical properties of the prepared composites is seen by the recovered silicon particle addition. Maximum tensile strength of 284 MPa has been achieved for the < 10 µm particle with a 5 % weight of silicon filler loaded composite. Both the flexural strength and the hardness of the composites were improved linearly by the addition of the filler material. The dielectric constant is considerably improved by incorporating recovered silicon filler into the epoxy polymer composite. There is a comparatively higher dielectric constant value of 5.96 in a fine silicon particle-filled composite than in a coarse silicon particle-filled composite of 4.8. The sustainable use of silicon wafer cutting particles in polymer composites would mitigate the problems of pollution and minimise the cost of silicon wafer waste disposal as well. This brings up the solution to recycling of silicon wafer cutting waste for a sustainable environment.

Effect of Current Collector and Pyrolysis Temperature on the Electrochemical Performance of Photoresist Derived Carbon Films

SU-8, an epoxy based negative photoresist has been demonstrated as a potential precursor to fabricate thin films and three-dimensional micropatterned arrays in glassy carbon. However, the use of silicon wafer as a substrate cum collector limits their use in real battery devices. In accordance with the commercial lithium ion battery architecture and also owing to enhanced conductivity, we have successfully demonstrated the use of stainless steel (SS) wafer as a current collector to prepare binder free SU-8 derived carbon thin films. Standard carbon microelectromechanical systems (C-MEMS) process parameters were tuned to obtain a uniform, crack-free carbon thin film on SS wafer upon pyrolysis. Further, we varied the final pyrolysis temperature to examine its effect on the microstructure and composition as characterized with X-ray diffraction, Small angle X-ray scattering, Raman spectroscopy and CHNS-O elemental analyzer respectively. The microstructural changes in the carbon films at different pyrolysis temperature were then correlated with their electrochemical performance as investigated using galvanostat charge/discharge experiments, impedance spectroscopy and cyclic voltammetry. Selection of an appropriate current collector and optimizing the pyrolysis temperature yielded excellent cyclic stability and coulombic efficiency with 400 mAh g−1 reversible capacity after 100 cycles, nearly double to as reported in the literature.

Core–Shell Heterojunction Solar Cells Based on Disordered Silicon Nanowire Arrays

Heterojunction with intrinsic thin layer (HIT) solar cells are still costly due to the use of silicon wafers that contribute to ∼30% of the final module cost. To reduce the costs, thinner wafers can be used but to the detriment of the optical absorption. This loss has to be compensated by an efficient light trapping scheme. In this paper we study HIT devices based on Si nanowire (SiNW) core–shell structures to enhance light absorption. The SiNWs are fabricated by a wet etching technique, and the heterojunction is formed using an optimized low-temperature plasma enhanced chemical vapor deposition (PECVD) process at 200 °C. The solar cells are characterized via carrier lifetime and electron beam induced current (EBIC) measurements to understand their electrical properties at nanoscale. The impact of the SiNW length on the cell performance is also investigated. The solar cells show a good performance reaching average fill factor of 81%, Voc of 0.525 V, and Jsc of 29.27 mA/cm2 giving rise to an average effici...

Low Temperature Nafion Bonding of Silicon Wafers

The practical use of silicon wafer bonding in fabricating sensors, actuators, and microelectromechanical structures has grown rapidly and is presently receiving increasing attention. Currently, direct silicon bonding is achieved at temperatures which generally are not feasible after metallization in microelectromechanical system (MEMS) processing. 1-4 High temperature anneals (usually in excess of 700°C) may cause doping profile broadening, defect formation, induction of thermal stress between dissimilar materials, and dissociation between materials. Therefore, the high annealing temperature of silicon fusion bonding, typically >1000°C, restricts its application in the field of MEMS. In contrast to the high temperature fusion bonding, low temperature fusion bonding is not strong enough to guarantee high yielding devices during subsequent pro

Large-scale MOVPE production systems

High-performance ICs and OEICs rely on complex epitaxial heterostructures with tight bandgap engineering. Related development and production require homogeneous material, manufacturing of batches of comparable wafers, in-situ multiwafer fabrication, reduced surface contamination and defect density along with proven heterostructure processes for many combinations of III—V materials. The application of substrate rotation always seemed to cause technical problems, such as particle generation, mechanical feed troughs etc., rather than to improve the process from a production point of view. This paper summarizes the breakthrough in III—V multiwafer MOVPE mass production applications using the planetary multiwafer reactor with gas foil rotation (5 × 3″/7 × 2″ or 5 × 4″/8 × 3″) which was originally developed and patented by Philips LEP for growth of GaAs/AlGaAs heterostructures and has been used successfully since then for HEMT production, laser fabrication, and GaInP deposition. In similar Planetary Reactors, GaAs- and InP-based materials for a wide range of optoelectronic applications have been produced. The use of low pressures is not only advantageous for the handling of phosphorus-containing compounds and reduction of overall gas consumption, but also allows to drastically reduce the amount of H 2 required for driving the wafer support. The variation of thickness in these multiwafer systems is reduced to the order of 1–2% for GaAs, AlGaAs, GaInP, InP, GaInAs and GaInAsP (1.55, 1.3, 1.05 μm). Thus, one major advantage in comparison to MBE is that these reactors are capable of handling both GaAs- and InP-based processes with high concentration of phosphorus. Processes for the production of visible lasers (AlGaInP), GaInP HBTs, or complex solar cell structures have also been developed. This finally makes this MOVPE technology by far superior over MBE for production application. The relatively simple realization of a variety of different wafer sizes emphasizes the efforts to create even larger reaction chambers capable for large-area epitaxial growth of different material systems. The use of silicon wafers as substrates for advanced device structures is no longer limited to 2″ or 3″ wafers, also 4″, 6″, and 8″ wafers can be used, and rectangular arrangements for solar cell production are being developed.