Use Of Lead-free Solders Research Articles

An Artificial Intelligence-Based Pick-and-Place Process Control for Quality Enhancement in Surface Mount Technology

This research proposes a novel AI-based framework that identifies the optimal placement position based on the solder paste offset’s information to minimize post-reflow misalignment of the mini-scale passive components in the pick-and-place (P&P) process. Inevitably, some depositions of solder paste are misaligned with existing technology. With the miniaturization trend in electronics and increased use of lead-free solder, the solder’s misalignment has caused component misalignment, especially, in the smaller size cases. Therefore, a novel placement strategy is desired to increase the first pass yield. We propose a mounter optimization model (MOM) to optimize the positional placement parameters by predicting the components’ positions after the reflow process. Our framework also adapts the placement positions while updating the model’s parameters along with the board-to-board manufacturing process. To the best of our knowledge, it is the first artificial intelligence-based closed-loop system to accommodate various solder paste printing locations based on inspection information. Various solder paste positions with different volumes are considered experimental study. As a result, our MOM shows the effectiveness of reducing the post-reflow misalignment while minimizing its deviation compared to the conventional placement strategy. Indeed, the proposed framework provides the solution to meet the needs of the electronics manufacturing evolution toward Industry 4.0, which is characterized by miniaturization, high-density, and lead-free assembly.

Methods for analyzing the reliability of mounting microelectronic radio components

According to modern standards of the radio-electronic industry, manufacturers have to use more and more lead-free technology for soldering nodal joints in produced electronic equipment for various purposes. But with the use of lead-free solders, the question arose about their reliability in comparison with their lead counterparts. It is just about the study of the reliability of lead-free solders that is described in this article. For these purposes, such brands of lead-free solders were investigated as SAC 0107, SAC 0307, SAC 0807, SAC 105, SAC 263, SAC 305, SAC 405, SAC 387, SAC 396. The main differences between linear regression analyses of the reliability of lead-free solder based on the characteristics of the solder and under the influence of thermal cycles based on the Weibull distribution are substantiated. The results of the research are presented at the end of the article in the form of graphical figures and tables.

In-air sintering of copper nanoparticle paste with pressure-assistance for die attachment in high power electronics

There is a high demand for the implementation of metallic nanoparticle (NP) sintering technology for die attach in high-power electronics. The performance of this technology is superior to that of the technology involving the use of lead-free solders. Although Cu NP paste is potentially a low-cost material, it faces the challenge of oxidation during sintering. This may result in a significant deterioration of the mechanical, thermal, and electrical properties. Therefore, there are limited studies on the in-air sintering of Cu NP pastes. The present study demonstrated the in-air pressure-assisted low-temperature sintering of a commercial Cu NP paste. Furthermore, the sintering was performed without using a protective atmosphere, unlike that in most of the previously reported investigations. The sintering behavior was investigated at three levels of temperatures (200–240 °C) and five levels of pressures (5–25 MPa). The joints that were sintered at high temperatures and pressures exhibited condensed microstructures and high bonding strengths. High sintering temperatures accelerated the diffusion between Cu NPs, while high sintering pressure facilitated the removal of evaporated organic compounds and the air between NPs. This not only facilitated sintering but also prevented the oxidation of Cu. The optimal sintering conditions promoted the formation of 3D connections between the Cu NPs, thereby increasing the shear strength of the sample. The samples that were sintered at 240 °C and 10 MPa experiences the highest increase in the shear strength, furthermore, the microstructures were optimized under this condition. The shear strength of 28.1 ± 8.47 MPa was achieved under this condition, which satisfied the requirements for die attach in high power electronics applications, moreover, the sintering process was moderate and cost-effective. Therefore, the optimal sintering temperature and pressure for the in-air sintering of the Cu NP paste was concluded to be 240 °C and 10 MPa, respectively. The results indicated that in-air sintering with pressure assistance can be applied for die attach in the high-power electronics.

Fatigue life of lead-free solder thermal interface materials at varying bond line thickness in microelectronics

Microelectronics failure during operation is commonly attributed to ineffective heat management within the system. Hence, reliability of such devices becomes a challenge area. The use of lead-free solders as thermal interface materials to improve the heat conduction between a chip level device and a heat sink is becoming popular due to their promising thermal and mechanical material properties. Finite element modelling was employed in the analysis of the fatigue life of three lead-free solders (SAC105, SAC305, and SAC405) under commercial thermal cycling load (between −40°C and 85°C). This paper presents the results of the simulation work focusing on the effect of varying the solder thermal interface thickness (or bond line thickness) on the reliability of the microelectronic device. The results obtained were based on stress, strain, deformation, and plastic work density. The results showed that the fatigue life of the three solders increases as the solder thermal interface thickness increases. Also, the stresses, strains, and deformation were highest around the edges and vertices of the solder interface. In addition, the optimal solder material of choice based on the criteria of this research is given as SAC405. It has higher operational life span and good reliability capabilities.

Modelling methodology for thermal analysis of hot solder dip process

The shift of electronics industry towards the use of lead-free solders in components manufacturing brought also the challenge of addressing the problem of tin whiskers. Manufacturers of high reliability and safety critical equipment in sectors such as defence and aerospace rely increasingly on the use of commercial-of-the-shelf (COTS) electronic components for their products and systems. The use of COTS components with lead-free solder plated terminations comes with the risks for their long term reliability associated with tin whisker growth related failures. In the case of leaded type electronic components such as Quad Flat Package (QFP) and Small Outline Package (SOP), one of the promising solutions to this problem is to “re-finish” the package terminations by replacing the lead-free solder coatings on the leads with conventional tin–lead solder. This involves subjecting the electronic components to a post-manufacturing process known as Hot Solder Dip (HSD). One of the main concerns for adopting HSD (refinishing) as a strategy to the tin whisker problem is the potential risk for thermally induced damage in the components when subjected to this process.This paper details a thermal modelling driven approach to the characterisation of the impact of hot solder dipping on electronic components. Main focus is on the evaluation of the re-finishing process effects on parts’ temperature gradients and heating/cooling rates, and on the advantages of applying an efficient model based process optimisation. Transient thermal finite element analysis is used to evaluate the temperature distribution in Quad Flat Package (QFP) variants during a double-dip hot solder dipping process developed by Micross Components Ltd. Full detailed three-dimensional (3D) models of the components are developed using comprehensive characterisation of the respective package structures and materials based on X-ray, SEM-EDX, cross-sectional metallurgy and 3D CT scan. The thermal modelling approach is validated using thermocouple measurement data for one of the studied parts and by comparing with model temperature predictions. Model results have informed the process optimisation strategy, and through experimentation key process parameters are alerted to provide optimal thermal characteristics. The optimised process settings result in temperature ramp rates at die level within recommended manufacture’s limit. A demonstration and discussion on the influence of the package internal structure and design on the thermal response to HSD is also provided.

The Resistance and Strength of Soft Solder Splices Between Conductors in MICE Coils

Two of the three types of MICE magnets will have splices within their coils. The MICE coupling coils may have as many as fifteen one-meter long splices within them. Each of the MICE focusing coils may have a couple of 0.25-meter long conductor splices. Equations for the calculation of resistance of soldered lap splices of various types are presented. This paper presents resistance measurements of soldered lap splices of various lengths. Measured splice resistance is shown for one-meter long splices as a function of the fabrication method. Another important consideration is the strength of the splices. The measured breaking stress of splices of various lengths is presented in this paper. Tin-lead solders and tin-silver solders were used for the splices that were tested. From the data given in this report, the authors recommend that the use of lead free solders be avoided for low temperature coils.

Formation and Mechanical Properties of Intermetallic Compounds in Sn-Cu High-Temperature Lead-Free Solder Joints

High-temperature lead-free solders are important materials for electrical and electronic devices due to increasing legislative requirements that aim at reducing the use of traditional lead-based solders. For the successful use of lead-free solders, a comprehensive understanding of the formation and mechanical properties of Intermetallic Compounds (IMCs) that form in the vicinity of the solder-substrate interface is essential. In this work, the effect of nickel addition on the formation and mechanical properties of Cu6Sn5 IMCs in Sn-Cu high-temperature lead-free solder joints was investigated using Scanning Electron Microscopy (SEM) and nanoindentation. It was found that the nickel addition increased the elastic modulus and hardness of the (Cu, Ni)6Sn5. The relationship between the nickel content and the mechanical properties of the IMCs was also established.

ALX Polymer for Wafer Level Packaging: Mechanical Property Evaluation After Multiple Lead-Free Solder Reflows

For bumping and wafer level packaging (WLP) applications, BCB and polyimide are the predominant spin-on dielectric materials used for re-passivation, redistribution, interlayer dielectric, and stress buffer layers. Each of these materials has their respective strengths and weaknesses. BCB has exceptionally low shrinkage on cure and moisture absorption, low curing temperature, and a low dielectric constant, but is a mechanically brittle material which limits its application in bump-on-polymer applications. Polyimides are superior mechanically to BCB and are utilized more in bump-on-polymer structures, but suffer from much higher shrinkage on cure and moisture absorption (which can lead to blistering if not carefully processed), have higher dielectric constants, and have much higher cure temperatures. ALX spin-on polymer dielectric was developed to combine low shrinkage, low moisture absorption, low dielectric constant, and excellent mechanical and stress buffering properties with a cure temperature between 190C to 250C, depending on the application(1-3). Previous papers have reported the mechanical properties at 190C and the application of ALX in eutectic SnPb solder bump structures. The use of lead-free solder requires reflow temperatures up to 260C. Although ALX polymer is curable at less than 200C, the influence of lead-free solder reflow wasnft investigated. In this presentation we evaluate mechanical property changes of ALX Polymer films after different cure schedules and multiple reflows at lead-free solder temperatures. The impact of these parameters on WLP will be discussed.

Thermal stress concentration factors for defects in plated-through-vias

Plated-through-vias (PTVs) are subject to thermal stress during soldering and in service. Plating and manufacturing defects in the PTV walls (barrels) can create stress concentrations that frequently become the sites of crack initiation during thermal fatigue. This is of growing concern as processing temperatures increase due to the use of lead-free solders, and boards become thicker generating increased stress as PTV aspect ratios rise, making it more difficult to achieve uniform plating thickness throughout the barrel. Finite element analysis (FEA) has been used to develop correlations that can be used to calculate the stress concentration factors (SCFs) for five typical defects as a function of various geometric parameters. In terms of their severity, the defects were ranked as: (1) rapid thickness reduction (SCF ⩽ 13), (2) occasional waviness (SCF ⩽ 4.6), (3) gradual thickness reduction (SCF ⩽ 4), (4) wicking (SCF ⩽ 4) and (5) waviness (SCF ⩽ 3.1). The SCF due to an internal pad and the influence of an external pad-barrel corner crack were also investigated. The maximum stress at the defect is found by multiplying the SCF by the von Mises stress at the mid-plane of the corresponding idealized PTV. The latter can be found using either an analytical model or correlations as a function of the aspect ratio and board-to-barrel thickness ratio that were developed using FEA.

A New Wafer Level Packaging Approach: Encapsulation, Metallization and Laser Structuring for Advanced System in Package Manufacturing

One of the general trends in microelectronics packaging is the constant miniaturization of devices. This has led to the development of maximum miniaturization of components on Si level, i.e., CSPs and Flip Chips. To further integrate more functionality into devices, and to further increase the degree of miniaturization, packaging development focus is switching from single chip packaging to the realization of systems in package, SiPs. Two main approaches do exist to realize this goal: one is to integrate all components into one dedicated package, yielding maximum miniaturization for a special application, but little flexibility as far as system design is concerned. The other is to create modular stackable components that can be assembled into a functional system. This integrates both flexibility in system design by exchangeable components and increased reliability potential, as single components can be tested separately. This last approach was considered a promising choice for the generation of SiPs. Within this paper a packaging process is introduced that allows the wafer level manufacturing of stackable, encapsulated devices. Using a transfer molded epoxy demonstrator, a proof-of-concept is performed showing the feasibility of the stackable package approach. This is achieved by combining wafer level encapsulation and molded interconnect device technology. An electroless process for metallization and laser techniques for structuring the metallization layer have been applied to generate structures for reliable interconnects capable for the use of lead-free solders. Summarized, this paper presents the process development and feasibility analysis of wafer level packaging technologies for modular SiP solutions based on a duromer MID approach.

Sn-Ag-Bi-Inはんだの接合特性

The lead-free soldering technology has been developed all over the world while IEEE RoHS prohibits the use of lead contained solder in 2006. Sn-Ag-Cu solder of which melting point is 219°C has the highest solder joints reliability of leadfree solder materials. This melting point is much higher than that of the conventional solder of 183°C. So reflow process for low heat-resistant components on Print Circuit Board needs lower melting point solder. Sn-Zn-Bi solder with low melting point of 197°C has a high barrier to apply to electric products due to lower reliability at high temperature, in high humidity and after reheating a joint comparing to conventional solder. Adding both bismuth and indium into Sn-Ag solder alloy is effective especially for decrease of melting point of Sn-Ag solder and Sn-Ag-Bi-In solder which had a melting point of 206°C was developed. In this paper, we mentioned design of the solder alloy and soldering properties of Sn-Ag-Bi-In to the point of appearance and microstructure of solder joints concerning about the influences of temperature, humidity and heat story on joints reliability. As the results a corrugated pattern appeared on the joint surface after 1000 cycles at -40°C/125°C and after 1000-hour at 85°C/85%RH. But the solder jont strength of Sn-Ag-Bi-In is comparable to that of Sn-Pb eutectic solder in each test. And no significant deterioration of Sn-Ag-Bi-In solder joint with heat story was also observed. Therefore we clarified the Sn-Ag-Bi-In solder had the same reliability as conventional solder and could be useful to expand the practical use of lead-free solder for a lot kinds of products.

Properties of Solder Joints Using Sn-Ag-Bi-In Solder

The lead-free soldering technology has been devoloped all over the world while IEEE ReHS prohibits the use of lead contained solder in 2006. Sn-Ag-Cu solder of which melting point is 219C has the highest solder joints reliability of leadfree solder materials. This melting point is much higher than that of the conventional solder of 183C. So reflow process for low heat-resistant components on Print Circuit Board needs lower melting point solder. Sn-Zn-Bi solder with low melting point of 197C has a high barrier to apply to electric products due to lower reliability at high tempereture, in high humidity and after reheating a joint comparing to conventional solder. Adding both bismuth and indium into Sn-Ag solder alloy is effective especially for decrease of melting point of Sn-Ag solder and Sn-Ag-Bi-In solder which had a melting point of 206C was devoloped. In this paper, we mentioned design of the solder alloy and soldering properties of Sn-Ag-Bi-In to the point of apearance and microsructure of solder joints concerning about the influences of temperature, humidity and heat story of joint surface after 1000 cycles at 40C/125C and after 1000 hours of 85C/85%RH. But the solder joint strength of Sn-Ag-Bi-In in comparable to that of Sn-Pb eutectic solder in each test. And no significant deterioration of Sn-Ag-Bi-In solder had the same reliability as conventional solder and could be useful to expand the practical use of lead-free solder for a lot kinds of products.

Ultrasonic soldering in electronics

Ultrasonic (US) soldering of electronic components, as an alternative to flux soldering, is environmentally friendly, improves the quality of soldered connections at the mounting elements after long-term storage, and allows the use of lead-free solders. Methods of US solder melt activation, lead-free solders in US soldering and glass–ceramic capacitor metallization processes have been investigated.

家電業界の環境負荷低減への取り組み

The efforts of electronic companies to minimize environmental impact of their products are reviewed, considering product life, facility of disassembly, recycability of materials, reduction of halogen content, eco-packaging, and use of lead free solder. Technical developments in the reclamation of optical disks, batteries and polystyrene resins are also reported. To enhance the eco-efficiency, cooperation between electronic industry and other industries should be encouraged.