Ultrathin Transistors Research Articles

Van der Waals 2D layered-material bipolar transistor

Ultrathin and light heterojunction bipolar transistors based on two-dimensional (2D) layered materials with flexible semiconducting properties have been considered for several electronic applications. In this paper, a van der Waals p-BP/n-MoS2/p-BP BJT is demonstrated. It is fabricated using mechanical exfoliation, where a dry transfer technique is used to stack a vertical double heterojunction. The device structure includes nanoflakes of black phosphorus (BP) and MoS2. The current–voltage characteristics of the common–emitter and common–base configurations are examined. These p-BP/n-MoS2/p-BP bipolar transistors exhibit current–voltage characteristics similar to those of conventional p-n-p bipolar transistors. Devices with thin MoS2 layers show good saturation current–voltage characteristics, and a maximum common–emitter current gain (β = IC/IB) of approximately 10.1 is obtained at room temperature (300 K). Furthermore, the thickness dependence of the base region (n-MoS2) is investigated for the common–emitter output electrical characteristics (VCE − IC) of a double heterojunction bipolar transistor in which the emitter is grounded. The collector current decreases as the thickness of n-MoS2 is increased. This study can pave the way for the application of 2D materials as controllable amplifiers in flexible electronics.

Interfacial water intercalation-induced metal-insulator transition in NbS2/BN heterostructure

Interfacial engineering, such as molecule intercalation, can modify properties and optimize performance of van der Waals heterostructures and their devices. Here, we investigated the pristine and water molecule intercalated heterointerface of niobium disulphide (NbS2) on hexagonal boron nitride (h-BN) (NbS2/BN) using advanced atomic force microscopy (AFM), and observed the metal-insulator transition (MIT) of first layer (1L-) of NbS2 induced by water molecule intercalation. In pristine sample, interfacial charge transfers were confirmed by the direct detection of trapped static charges at the post-exposed h-BN surface, produced by mechanically peeling off the 1L-NbS2 from the substrate. The interfacial charge transfers facilitate the intercalation of water molecules at the heterointerface. The intercalated water layers make a MIT of 1L-NbS2, while the pristine metallic state of the following NbS2 layers remains preserved. This work is of great significance to help understand the interfacial properties of 2D metal/insulator heterostructures and can pave the way for further preparation of an ultrathin transistor.

Spatially Uniform Shallow Trap Distribution in an Ultrathin Organic Transistor

In organic electronic materials, charge carrier transport is often limited by disorder‐induced trap states very close in energy to the ideal band transport states. We directly view the location and impact of these “shallow” traps on an ultrathin transistor active layer using Kelvin Probe Force Microscopy. As the transistor turns on, dramatic fluctuations in the surface potential of the active channel suddenly arise due to charge trapping and release processes. Importantly, the spatial distribution of rapid fluctuations in surface potential is uniform throughout the active channel. These facts strongly constrain the microscopic origin of shallow charge traps, and associated efforts to optimize the mobility and noise performance baseline in device applications.

Novel 10-nm Gate Length MoS2 Transistor Fabricated on Si Fin Substrate

To allow the use of molybdenum disulfide (MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) in mainstream Si CMOS manufacturing processes for improved future scaling, a novel MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> transistor with a 10-nm physical gate length created using a p-type doped Si fin as the back-gate electrode is presented. The fabrication technology of the ultra-small MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> device shows fully process compatibility with conventional Si-FinFET process flow and it is also the first time to realize the large-scale fabrication of the arrayed MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> transistors with 10-nm gate lengths. The fabricated ultrathin transistors, consisting of 10-nm gate length and 0.7-nm monolayer CVD MoS2, exhibit good switching characteristics and the average drain current on/off ratio reaches to over 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> . This technology provides a promising approach for future CMOS scaling with large scale new 2-D material transistors.

Spatially-Resolved Photoluminescence of Monolayer MoS2 under Controlled Environment for Ambient Optoelectronic Applications

Monolayer (ML) MoS2 has become a very promising two-dimensional material for photorelated applications, potentially serving as the basis for an ultrathin photodetector, switching device, or transistors because of its strong interaction with light in ambient conditions. Establishing the impact of individual ambient gas components on the optical properties of MoS2 is a necessary step toward application development. By using in situ Raman microspectroscopy with an environment-controlled reaction cell, the photoluminescence (PL) intensity of chemical vapor deposition (CVD)-grown MoS2 MLs is monitored at different intralayer locations under ambient and controlled gas environments, such as N2, O2, and H2O. This new approach enables us to monitor the optical properties of MoS2 at different locations on the flakes and separate the role of photoreaction of various gases during laser irradiation. Upon mild photoirradiation in ambient conditions, the PL intensity in the interior of the ML MoS2 flakes remains unchang...

(Keynote) Physics, Materials and Applications of High-Mobility Organic Transistor Circuits

Development of functional materials and understanding of the microscopic mechanisms mutually benefit through their close interaction. To accelerate development of organic semiconductor devices for industrial application to flexible and printed electronics, it has been essential to understand the mechanism of charge transport in conjunction with molecular-scale charge transfer. We examine the idea that high-mobility charge transport in newly developed solution-crystalized organic transistors is caused by band-like charge transport, using several different methods to probe coherence in the electronic charge. These materials, being essentially different from conventional organic semiconductors with basically incoherent hopping-like transport, often show high values of mobility exceeding 10 cm2/Vs so that high-speed organic transistor circuits are realized. We first employ Hall-effect measurement which differentiates the coherent band transport from site-to-site hopping. Rubrene single crystal transistors were the first to show the Hall voltage obviously indicating the band transport with the mobility exceeding 10 cm2/Vs, whereas the result of pentacene single crystal transistors with the mobility around 1 cm2/Vs suggested somewhat intermediate between coherent and incoherent charge transport. An interesting crossover from hopping-like to band-like transport is also found by gradually changing temperature and external pressure, clearly indicating involvement of intermolecular phonons. Stimulated by the experiments in the early stage, such materials as decyldinaphthobenzo-dithiophene derivatives (Cn-DNBDT) are newly synthesized to stabilize the molecular position in the crystal form by introducing steric hindrance in their p-conjugated cores. With the development of solution-crystallization method, arrays of the single crystal transistors are formed to the size of wafer scale on plastic substrates. The mobility is as high as 20 cm2/Vs for p-type compound and 4 cm2/Vs for an n-type compound. We measured spin relaxation time of the electric-field induced carriers down to 4.2 K using the large-area ultra-thin single-crystal transistors, so that electron-spin relaxiation is precisely investigated. We found that the spin-relaxation follows the Elliott-Yafet mechanism so that the spin life time is consistently elongated at low temperatures due to reduced phonon scattering via spin-orbit coupling. The result suggest that charge carrier mobility can as high as 650 cm2/Vs with minimized phonon scattering at the low temperature. This presentation also focuses on recent development of key technologies for printed LSIs which can provide future low-cost platforms for RFID tags, AD converters, data processors, and sensing circuitries. Such prospect bears increasing reality because of recent research innovations in the field of material chemistry, charge transport physics, and solution processes of printable organic semiconductors. With excellent chemical and thermal stability in recently developed new materials, we are developing simple integrated devices based on CMOS using p-type and n-type printed organic FETs. Particularly important are new processing technologies for continuous growth of the organic single-crystalline semiconductor “wafers” from solution and for lithographical patterning of semiconductors and metal electrodes. Successful rectification and identification are demonstrated at 13.56 MHz with printed organic CMOS circuits.

Ultrathin Piezotronic Transistors with 2 nm Channel Lengths.

Because silicon transistors are rapidly approaching their scaling limit due to short-channel effects, alternative technologies are urgently needed for next-generation electronics. Here, we demonstrate ultrathin ZnO piezotronic transistors with a ∼2 nm channel length using inner-crystal self-generated out-of-plane piezopotential as the gate voltage to control the carrier transport. This design removes the need for external gate electrodes that are challenging at nanometer scale. These ultrathin devices exhibit a strong piezotronic effect and excellent pressure-switching characteristics. By directly converting mechanical drives into electrical control signals, ultrathin piezotronic devices could be used as active nanodevices to construct the next generation of electromechanical devices for human-machine interfacing, energy harvesting, and self-powered nanosystems.

Enhanced electrical stability of nitrate ligand-based hexaaqua complexes solution-processed ultrathin a-IGZO transistors

We report solution-processed, amorphous indium–gallium–zinc-oxide-based (a-IGZO-based) thin-film transistors (TFTs). Our proposed solution-processed a-IGZO films, using a simple spin-coating method, were formed through nitrate ligand-based metal complexes, and they were annealed at low temperature (250 °C) to achieve high-quality oxide films and devices. We investigated solution-processed a-IGZO TFTs with various thicknesses, ranging from 4 to 16 nm. The 4 nm-thick TFT films had smooth morphology and high-density, and they exhibited excellent performance, i.e. a high saturation mobility of 7.73 ± 0.44 cm2 V−1 s−1, a sub-threshold swing of 0.27 V dec−1, an on/off ratio of ~108, and a low threshold voltage of 3.10 ± 0.30 V. However, the performance of the TFTs degraded as the film thickness was increased. We further performed positive and negative bias stress tests to examine their electrical stability, and it was noted that the operating behavior of the devices was highly stable. Despite a small number of free charges, the high performance of the ultrathin a-IGZO TFTs was attributed to the small effect of the thickness of the channel, low bulk resistance, the quality of the a-IGZO/SiO2 interface, and high film density.

Bulk β-Te to few layered β-tellurenes: indirect to direct band-Gap transitions showing semiconducting property

Herein we report a prediction of a highly kinetic stable layered structure of tellurium (namely, bulk β-Te), which is similar to these layered bulk materials such as graphite, black phosphorus, and gray arsenic. Bulk β-Te turns out to be a semiconductor that has a band gap of 0.325 eV (HSE06: 0.605 eV), based on first-principles calculations. Moreover, the single-layer form of the bulk β-Te, called β-tellurene, is predicted to have a high stability. When the bulk β-Te is thinned to one atomic layer, an indirect semiconductor of band gap is changed to 1.265 eV (HSE06: 1.932 eV) with a very high kinetic stability. Interestingly, an increase of the number of the β-tellurene layers from one to three is accompanied by a shift from an indirect to direct band gap. Furthermore, the effective carrier masses, the optical properties and phonon modes of few-layer β-tellurenes are characterized. Few-layer β-tellurenes strongly absorb the ultraviolet and blue-violet visible lights. The dramatic changes in the electronic structure and excellent photo absorptivities are expected to pave the way for high speed ultrathin transistors, as well as optoelectronic devices working in the UV or blue-green visible regions.

A new two-dimensional TeSe2 semiconductor: indirect to direct band-gap transitions

A novel two-dimensional (2D) TeSe2 structure with high stability is predicted based on the first-principles calculations. As a semiconductor, the results disclose that the monolayer TeSe2 has a wide-band gap of 2.392 eV. Interestingly, the indirect-band structure of the monolayer TeSe2 transforms into a direct-band structure under the wide biaxial strain (0.02–0.12). The lower hole effective mass than monolayer black phosphorus portends a high carrier mobility in TeSe2 sheet. The optical properties and phonon modes of the few-layered TeSe2 were characterized. The few-layer TeSe2 shows a strong optical anisotropy. Specially, the calculated results demonstrate that the multilayer TeSe2 has a wide range of absorption wavelength. Our result reveals that TeSe2 as a novel 2D crystal possesses great potential applications in nanoscale devices, such as high-speed ultrathin transistors, nanomechanics sensors, acousto-optic deflectors working in the UV-vis red region and optoelectronic devices.

Experimental Study of the Detection Limit in Dual-Gate Biosensors Using Ultrathin Silicon Transistors.

Dual-gate field-effect biosensors (bioFETs) with asymmetric gate capacitances were shown to surpass the Nernst limit of 59 mV/pH. However, previous studies have conflicting findings on the effect of the capacitive amplification scheme on the sensor detection limit, which is inversely proportional to the signal-to-noise ratio (SNR). Here, we present a systematic experimental investigation of the SNR using ultrathin silicon transistors. Our sensors operate at low voltage and feature asymmetric front and back oxide capacitances with asymmetry factors of 1.4 and 2.3. We demonstrate that in the dual-gate configuration, the response of our bioFETs to the pH change increases proportional to the asymmetry factor and indeed exceeds the Nernst limit. Further, our results reveal that the noise amplitude also increases in proportion to the asymmetry factor. We establish that the commensurate increase of the noise amplitude originates from the intrinsic low-frequency characteristic of the sensor noise, dominated by number fluctuation. These findings suggest that this capacitive signal amplification scheme does not improve the intrinsic detection limit of the dual-gate biosensors.

5‐2: Invited Paper: Ultrathin Stretchable Oxide Thin Film Transistor and Active Matrix Organic Light‐Emitting Diode Displays

We demonstrate ultrathin (2 µm thick) stretchable oxide thin film transistor and active matrix organic light‐emitting diode displays. They can be operated as free‐standing ultrathin films under 10% strain. Stretchable active matrix organic light‐emitting diode displays are becoming increasingly important the applications fields of large‐area stretchable displays, wearable displays, electronic skin devices.

Mixed-mode simulation and analysis of 3D double gate junctionless nanowire transistor for CMOS circuit applications

Circuit performance of an ultra-thin 3D double gate junctionless nanowire transistor, with an emphasis on digital applications, is investigated. Extensive analysis of inverter circuit and universal gates are performed using mixed mode simulation to understand the characteristics and circuit performance of the device. Different properties, like voltage transfer characteristics, transient response, DC gain, and noise margin of these circuits is studied. Furthermore, to explore the influence of high-K gate dielectrics, we examined circuit performance of the junctionless nanowire device with different gate dielectrics (SiO2, Si3N4, and HfO2). Results show that the devices with high-K gate dielectric (HfO2) have improved circuit performance.

Electric-field-induced superconductivity in electrochemically etched ultrathin FeSe films on SrTiO3 and MgO

Among the recently discovered iron-based superconductors, ultrathin films of FeSe grown on SrTiO3 substrates have uniquely evolved into a high superconducting-transition-temperature (TC) material. The mechanisms for the high-TC superconductivity are ongoing debate mainly with the superconducting gap characterized with in-situ analysis for FeSe films grown by bottom-up molecular-beam epitaxy. Here, we demonstrate the alternative access to investigate the high-TC superconductivity in ultrathin FeSe with top-down electrochemical etching technique in three-terminal transistor configuration. In addition to the high-TC FeSe on SrTiO3, the electrochemically etched ultrathin FeSe transistor on MgO also exhibits superconductivity around 40 K, implying that the application of electric-field effectively contributes to the high-TC superconductivity in ultrathin FeSe regardless of substrate material. Moreover, the observable critical thickness for the high-TC superconductivity is expanded up to 10-unit-cells under applying electric-field and the insulator-superconductor transition is electrostatically controlled. The present demonstration implies that the electric-field effect on both conduction and valence bands plays a crucial role for inducing high-TC superconductivity in FeSe.

Stretchable Si Logic Devices with Graphene Interconnects.

Stretchable integrated circuits consisting of ultrathin Si transistors connected by multilayer graphene are demonstrated. Graphene interconnects act as an effective countervailing component to maintain the electrical performance of Si integrated circuits against external strain. Concentration of the applied strain on the graphene interconnect parts can stably protect the Si active devices against applied strains over 10%.

Batches of ultra-thin transistors made from 2D materials

Batches of ultra-thin transistors made from 2D materials

Tin disulfide-an emerging layered metal dichalcogenide semiconductor: materials properties and device characteristics.

Layered metal dichalcogenides have attracted significant interest as a family of single- and few-layer materials that show new physics and are of interest for device applications. Here, we report a comprehensive characterization of the properties of tin disulfide (SnS2), an emerging semiconducting metal dichalcogenide, down to the monolayer limit. Using flakes exfoliated from layered bulk crystals, we establish the characteristics of single- and few-layer SnS2 in optical and atomic force microscopy, Raman spectroscopy and transmission electron microscopy. Band structure measurements in conjunction with ab initio calculations and photoluminescence spectroscopy show that SnS2 is an indirect bandgap semiconductor over the entire thickness range from bulk to single-layer. Field effect transport in SnS2 supported by SiO2/Si suggests predominant scattering by centers at the support interface. Ultrathin transistors show on-off current ratios >10(6), as well as carrier mobilities up to 230 cm(2)/(V s), minimal hysteresis, and near-ideal subthreshold swing for devices screened by a high-k (deionized water) top gate. SnS2 transistors are efficient photodetectors but, similar to other metal dichalcogenides, show a relatively slow response to pulsed irradiation, likely due to adsorbate-induced long-lived extrinsic trap states.

Phase-engineered low-resistance contacts for ultrathin MoS2 transistors.

Ultrathin molybdenum disulphide (MoS2) has emerged as an interesting layered semiconductor because of its finite energy bandgap and the absence of dangling bonds. However, metals deposited on the semiconducting 2H phase usually form high-resistance (0.7 kΩ μm-10 kΩ μm) contacts, leading to Schottky-limited transport. In this study, we demonstrate that the metallic 1T phase of MoS2 can be locally induced on semiconducting 2H phase nanosheets, thus decreasing contact resistances to 200-300 Ω μm at zero gate bias. Field-effect transistors (FETs) with 1T phase electrodes fabricated and tested in air exhibit mobility values of ~50 cm(2) V(-1) s(-1), subthreshold swing values below 100 mV per decade, on/off ratios of >10(7), drive currents approaching ~100 μA μm(-1), and excellent current saturation. The deposition of different metals has limited influence on the FET performance, suggesting that the 1T/2H interface controls carrier injection into the channel. An increased reproducibility of the electrical characteristics is also obtained with our strategy based on phase engineering of MoS2.

Layer-Dependent Electrical Properties of Graphene: An Atomic Force Microscopy (AFM) Study

Graphene has attracted much attention recently due to their exotic electronic properties. Potential applications of graphene sheets as ultrathin transistors, sensors and other nanoelectronic devices require them supported on an insulating substrate. Therefore, a quantitative understanding of charge exchange at the interface and spatial distribution of the charge carriers is critical for the device design. Here, we demonstrate that atomic force microscopy (AFM)-based technique Kelvin force microscopy (KFM) can be applied as an experimental means to quantitatively investigate the local electrical properties of both single-layer and few-layer graphene films on silicon dioxide. The effect of film thickness on the surface potential of few-layer graphene is observed. For example, a 66 mV increase in the surface potential is detected for a ten-layered film with respect to an eight-layered one. Furthermore, with the introduction of multiple lock-in amplifiers (LIAs) in the electronics for scanning probe microscopes, single-pass kelvin force microcopy and probing of the other electric property such as local dielectric permittivity via the capacitance gradient dC/dZ measurements are allowed by the simultaneous use of the probe flexural resonance frequency ωmech in the first LIA targeting the mechanical tip-sample interactions for surface profiling, and a much lower frequency ωelec (both in the second LIA and its second harmonic in the third LIA) for sample surface potential and dC/dZ measurements, respectively. In contrast to surface potentials, the dC/dZ measurements show that local dielectric permittivity of few-layer graphene films maintain at the same level regardless of the film thickness. Such simultaneous monitoring of multiple electronic properties that exhibit different behaviors in response to the graphene layers provides us a technique to achieve both a comprehensive characterization and a better understanding of graphene materials.

MD simulations of low energy Clx+ ions interaction with ultrathin silicon layers for advanced etch processes

Molecular dynamics simulations of low-energy (5–100 eV) Cl+ and Cl2+ bombardment on (100) Si surfaces are performed to investigate the impact of plasma dissociation and very low-energy ions (5–10 eV) in chlorine pulsed plasmas used for silicon etch applications. Ion bombardment leads to an initial rapid chlorination of the Si surface followed by the formation of a stable SiClx mixed layer and a constant etch yield at steady state. The SiClx layer thickness increases with ion energy (from 0.7 ± 0.2 nm at 5 eV to 4 ± 0.5 nm at 100 eV) but decreases for Cl2+ bombardment (compared to Cl+), due to the fragmentation of Cl2+ molecular ions into atomic Cl species with reduced energies [one X eV Cl + &amp;lt;−&amp;gt; two 2X eV Cl2+]. The Si etch yield is larger for Cl2+ than Cl+ bombardment at high-energy (Ei &amp;gt; 25 eV) but larger for Cl+ than Cl2+ bombardment at low-energy (Ei &amp;lt; 25 eV) due to threshold effects. And the higher the ion energy, the less saturated the etch products. Results suggest that weakly dissociated chlorine plasmas (containing more Cl2+ than Cl+ ions) should lead to thinner SiClx mixed layers and lower Si etch yields if ion energies remains below 25 eV, which confirms the potential of pulsed plasmas to address etching challenges of ultrathin films transistors, in which slow etch rates and very controlled processes are required.