Ultrathin SiO2 Research Articles

Atomic Layer Deposition for Membranes, Metamaterials, and Mechanisms.

Bending and folding techniques such as origami and kirigami enable the scale-invariant design of 3D structures, metamaterials, and robots from 2D starting materials. These design principles are especially valuable for small systems because most micro- and nanofabrication involves lithographic patterning of planar materials. Ultrathin films of inorganic materials serve as an ideal substrate for the fabrication of flexible microsystems because they possess high intrinsic strength, are not susceptible to plasticity, and are easily integrated into microfabrication processes. Here, atomic layer deposition (ALD) is employed to synthesize films down to 2 nm thickness to create membranes, metamaterials, and machines with micrometer-scale dimensions. Two materials are studied as model systems: ultrathin SiO2 and Pt. In this thickness limit, ALD films of these materials behave elastically and can be fabricated with fJ-scale bending stiffnesses. Further, ALD membranes are utilized to design micrometer-scale mechanical metamaterials and magnetically actuated 3D devices. These results establish thin ALD films as a scalable basis for micrometer-scale actuators and robotics.

Thermoelectric power factor enhancement based on carrier transport physics in ultimately phonon-controlled Si nanostructures

We thoroughly investigated carrier and phonon transports related to thermoelectric properties using absolutely-controlled Si nanostructures, namely Si films containing epitaxial nanodots (NDs). In the Si nanostructure, various ND materials were introduced selectively such as Ge and β-FeSi2. This brings the ND/Si hetero-interface control; interface energy band offset and lattice mismatch strain in Si films. Ultrahigh density stacking faults can also be intentionally introduced using ultrathin SiO2 films. We reduced thermal conductivity (<2 Wm−1K−1) close to amorphous Si due to phonon transport control in absolutely-controlled Si nanostructures: scattering both by NDs and intentionally-doped atomic-scale impurities, namely wide-scale length phonon scattering. The electron transport related to Seebeck coefficient and electrical conductivity was manipulated by intentionally-introduced nanostructures: ND/Si hetero-interfaces and stacking faults. In the epitaxial Si thin films containing β-FeSi2 NDs, energetic carrier transports through stacking faults with several tens of meV barrier height enhanced the power factor. In the strained epitaxial Si thin films containing Ge NDs, it was found that strain-induced band splitting leading to high electron mobility enhanced the power factor. These results demonstrated that thermoelectric performance determined by electron and phonon transports were strongly dependent on the crystal characters (strain, crystal defects and the interfaces) relating to intentionally-introduced nanostructures. This suggests that it is important to design nanostructured materials on nanoscale and atomic-scale for enhancement of thermoelectric performance: introduction of stacking faults with proper energy barriers, NDs and dopants scattering phonons, and the less point defects. This also demonstrates that its nanostructuring methodology opens a load to realization of thermoelectric Si thin films.

Dual-Function Electron-Conductive, Hole-Blocking Titanium Nitride Contacts for Efficient Silicon Solar Cells

Summary High-performance passivating contact is a prerequisite for high-efficiency crystalline silicon (c-Si) solar cells. In this work, an electron-conductive, hole-blocking contact based on titanium nitride (TiN) deposited by reactive magnetron sputtering is presented. Quasi-metallic TiN combined with an ultrathin SiO2 passivation layer (SiO2/TiN) is demonstrated to be an effective electron-selective contact on c-Si, featuring a low-contact resistivity of 16.4 mΩ.cm2 and a tolerable recombination current parameter of ∼500 fA/cm2. By implementing the dual-function SiO2/TiN contact, which acts simultaneously as a surface passivating layer and metal electrode, an efficiency of 20% is achieved by an n-type c-Si solar cell with a simple structure. This work not only demonstrates a way to develop efficient n-type c-Si solar cells with dual-function metal nitride contacts at a low cost but also expands the pool of available carrier transport materials, from metal oxides to metal nitrides, for photovoltaic devices.

Development of Interfacial Nanoassembly Techniques in Functional Nanomaterials

The precise integration of functional materials, such as organic–inorganic hybrid building blocks or π-conjugated units, is a key issue in the development of bio- and nanoelectronic devices. This focus review highlights the author’s recent study of the nanoscale assembly of polymer materials based on the Langmuir–Blodgett (LB) technique, which allows high-density integration of functional units. (1) The nanoassembly of silsesquioxane-containing polymers can be used to produce uniform monolayers, which are precursors of ultrathin SiO2 films with controlled porosity. The SiO2 films were used as resistive switching devices with low set/reset voltages. (2) The nanoassembly of inorganic nanoparticles and metal-organic framework films on polymer films demonstrates the importance of the spatial alignment of anchoring units in the polymer films depending on adsorption mechanisms. (3) The nanoassembly of π-conjugated units can be used for high-density and low-dimensional assembly, using newly proposed amphiphilic homopolymers with π-conjugated units in the side chains. These examples demonstrate the potential of LB-based fabrication as a candidate strategy for functional device fabrication. The nanoscale assembly strategies based on the Langmuir–Blodgett (LB) technique were highlighted to demonstrate the potential for functional device fabrication. (1) The assembly of silsesquioxane-containing polymers can be used to produce uniform monolayers, which are precursors of ultrathin SiO2 films with controlled porosity. (2) The assembly of inorganic nanoparticles and metal-organic framework films on polymer films demonstrates the importance of the spatial alignment of anchoring units. (3) The assembly of π-conjugated units can be used for high-density and low-dimensional assembly.

Indepth Studies on Working Mechanism of Plasmon-Enhanced Inverted Perovskite Solar Cells Incorporated with Ag@SiO2 Core–Shell Nanocubes

Noble metal nanoparticles-induced localized surface plasmon resonance as a useful approach has been widely used in solar cells including perovskite solar cells (PSCs) to improve their light-harvesting. Herein, we synthesize Ag@SiO2 core–shell nanocubes and investigate their application in CH3NH3PbI3-based PSCs due to both the large local EM field induced by the nanocube with sharp corners and the effective avoidance of exciton/carrier recombination at the surfaces of Ag nanocubes via covering a ∼5 nm ultrathin SiO2 shell. Incorporating an appropriate concentration of Ag@SiO2 nanocubes into the CH3NH3PbI3 PSCs realizes a best-performing efficiency of 17.22% with an enhancement factor of 18.1%. Indepth studies on the plasmon-enhanced working mechanism of Ag@SiO2 nanocubes with UV–vis absorption spectra, steady-state and time-resolved transient photoluminescence, and electrochemical impedance spectroscopy characterizations eventually demonstrate both the increasing light harvesting and the improving charge transportation and extraction contribute to better performances of PSCs.

Silicon surface passivation by transparent conductive zinc oxide

Surface passivation is essential for high-efficiency crystalline silicon (c-Si) solar cells. Despite the common use of transparent conductive oxides (TCOs) in the field of solar cells, obtaining surface passivation by TCOs has thus far proven to be particularly challenging. In this work, we demonstrate outstanding passivation of c-Si surfaces by highly transparent conductive ZnO films prepared by atomic layer deposition. Effective surface recombination velocities as low as 4.8 cm/s and 11 cm/s are obtained on 3 Ω cm n- and p-type (100) c-Si, respectively. The high levels of surface passivation are achieved by a novel approach by using (i) an ultrathin SiO2 interface layer between ZnO and c-Si, (ii) a sacrificial Al2O3 capping layer on top of the ZnO film during forming gas annealing, and (iii) the extrinsic doping of the ZnO film by Al, B, or H. A combination of isotope labeling, secondary-ion mass spectrometry, and thermal effusion measurements showed that the sacrificial Al2O3 capping layer prevents the effusion of hydrogen from the crystalline ZnO and the underlying Si/SiO2 interface during annealing, which is critical in achieving surface passivation. After annealing, the Al2O3 capping layer can be removed from the ZnO film without impairing the high levels of surface passivation. The surface passivation levels increase with increased doping levels in ZnO, which can be attributed to field-effect passivation by a reduction in the surface hole concentration. The ZnO films of this work are suitable as a transparent conductor, an anti-reflection coating, and a surface passivation layer, which makes them particularly promising for simplifications in future solar cell manufacturing.

Understanding the charge transport mechanisms through ultrathin SiOx layers in passivated contacts for high-efficiency silicon solar cells

We report on the microscopic structure of the SiOx layer and the transport mechanism in polycrystalline Si (poly-Si) passivated contacts, which enable high-efficiency crystalline Si (c-Si) solar cells. Using electron beam induced current (EBIC) measurements, we accurately map nanoscale conduction-enabling pinholes in 2.2 nm thick SiOx layers in a poly-Si/SiOx/c-Si stack. These conduction enabling pinholes appear as bright spots in EBIC maps due to carrier transport and collection limitations introduced by the insulating 2.2 nm SiOx layer. Performing high-resolution transmission electron microscopy at a bright spot identified with EBIC reveals that conduction pinholes in SiOx can be regions of thin tunneling SiOx rather than a geometric pinhole. Additionally, selectively etching the underlying poly-Si layer in contacts with 1.5 and 2.2 nm thick SiOx layers using tetramethylammonium hydroxide results in pinhole-like etch features in both contacts. However, EBIC measurements for a contact with a thinner, 1.5 nm SiOx layer do not reveal pinholes, which is consistent with uniform tunneling transport through the 1.5 nm SiOx layer. Finally, we theoretically show that reducing the metal to the c-Si contact size from microns, like in the p-type passivated emitter rear contact, to tens of nanometers, like in poly-Si contacts, allows lowering of the unpassivated contact area by several orders of magnitude, thus resulting in excellent passivation, as has been demonstrated for these contacts.

Deactivation of silicon surface states by Al-induced acceptor states from Al–O monolayers in SiO2

Al–O monolayers embedded in ultrathin SiO2 were shown previously to contain Al-induced acceptor states, which capture electrons from adjacent silicon wafers and generate a negative fixed charge that enables efficient Si-surface passivation. Here, we show that this surface passivation is just in part attributed to field-effect passivation, since the electrically active interface trap density Dit itself at the Si/SiO2 interface is reduced by the presence of the acceptor states. For sufficiently thin tunnel-SiO2 films between the Si-surface and the Al–O monolayers, Dit is reduced by more than one order of magnitude. This is attributed to an interface defect deactivation mechanism that involves the discharge of the singly-occupied dangling bonds (Pb0 defects) into the acceptor states, so that Shockley-Read-Hall-recombination is drastically reduced. We demonstrate that the combined electronic and field-effect passivation allows for minority carrier lifetimes in excess of 1 ms on n-type Si and that additional H2-passivation is not able to improve that lifetime significantly.

Improved Interface and Electrical Properties by Inserting an Ultrathin SiO2 Buffer Layer in the Al2O3/Si Heterojunction

AbstractAn ultrathin SiO2 interfacial buffer layer is formed using the nitric acid oxidation of Si (NAOS) method to improve the interface and electrical properties of Al2O3/Si, and its effect on the leakage current and interfacial states is analyzed. The leakage current density of the Al2O3/Si sample (8.1 × 10−9 A cm−2) due to the formation of low‐density SiOx layer during the atomic layer deposition (ALD) process, decreases by approximately two orders of magnitude when SiO2 buffer layer is inserted using the NAOS method (1.1 × 10−11 A cm−2), and further decreases after post‐metallization annealing (PMA) (1.4 × 10−12 A cm−2). Based on these results, the influence of interfacial defect states is analyzed. The equilibrium density of defect sites (Nd) and fixed charge density (Nf) are both reduced after NAOS and then further decreased by PMA treatment. The interface state density (Dit) at 0.11 eV decreases about one order of magnitude from 2.5 × 1012 to 7.3 × 1011 atoms eV−1 cm−2 after NAOS, and to 3.0 × 1010 atoms eV−1 cm−2 after PMA. Consequently, it is demonstrated that the high defect density of the Al2O3/Si interface is drastically reduced by fabricating ultrathin high density SiO2 buffer layer, and the insulating properties are improved.

Reliability studies on biaxially tensile strained-Si channel p-MOSFETs

An integrated technology computer aided simulation framework is used for the first time to predict the reliability (degradation) of substrate-induced strained-Si channel heterojunction field effect transistors on relaxed Silicon-Germanium buffer layer with ultra-thin SiO2 and high-k gate stacks. State-of-the-art four-state nonradiative multiphonon model is used for the degradation studies. Single defects and trap studies have been taken up on devices subjected to negative voltage stressing at an elevated temperature. Threshold voltage shift (due to charge capture and emission processes) in virtually fabricated devices has been studied in detail. For the first time, non radiative multiphonon model is used to explain the degradation mechanisms (oxide defects dominating the partial recovery of threshold voltage after stressing) in strained-Si channel heterojunction field effect transistors. It is shown that degradation in strained-Si channel device on relaxed-SiGe buffer is more compared to its Si-channel counterpart.

Evaluation of the potential distribution in a multiple stacked Si quantum dots structure by hard X-ray photoelectron spectroscopy

Six-fold stacked Si quantum dots (Si-QDs) structures with ultrathin SiO2 interlayers were formed on ultrathin SiO2 layer/n-Si substrates by low-pressure chemical vapor deposition using a SiH4 gas and their vertical electric potential distributions were evaluated using hard X-ray photoelectron spectroscopy under a DC bias application to the semitransparent electrodes formed on the stacked Si-QDs structure. The Si1s photoelectron spectra due to Si–Si bonding units can be deconvoluted into seven components corresponding to the six Si-QDs layers and Si substrate. Obviously, the energy shift between the components for two adjacent dots layers becomes larger towards the upper side of the stacked dots structure. This result indicates that the electric field concentrates on the upper side and is consistent with the proposed model that can explain the ballistic electron emission characteristics from multiple stacked Si-QDs structures.

Reliability improvement of pad-extended on chip light-emitting diodes using an ultra-thin passivation layer

The pad-extended on chip (PEC) light-emitting diodes (LEDs) were fabricated and characterized by using an ultra-thin silicon oxide (SiO2) film as a passivation layer. The SiO2 thin film was deposited on the GaN mesa edge using plasma-enhanced chemical vapor deposition (PECVD) by varying deposition temperature from 150 to 350 °C. Atomic force microscopy (AFM), a scanning electron microscope (SEM) and leakage current were employed to analyze the influence of deposition temperature on the structural properties of SiO2 films. AFM measurements demonstrate that the SiO2 surface roughness was larger at a lower deposition temperature than a higher temperature. Forward voltage (Vf) characteristics of these PEC LEDs were detected and recorded for continuous ten thousand probe times. The curve of Vf remained stable at temperatures of 150, 200 and 250 °C. A metal-insulator-metal structure using 250 °C-deposited SiO2 as the dielectric indicates the leakage current density was close to 10−8 A cm−2 with the minimum one lower than 10−12 A cm−2. The relative dielectric constant of the SiO2 (20 nm) was 3.65. The ultra-thin SiO2 film efficiently passivated the GaN mesa edge and prevented charge accumulation at the surface. Reliability has been improved for PEC LEDs using the ultra-thin SiO2 film as a passivation layer.

Modeling of TiO2-Based Electron-Selective Contacts for Crystalline Silicon Solar Cells

Contact selectivity is one of the key requirements for maximizing the efficiency of solar cells. Here, we computationally explore the electron-selective contact for crystalline silicon (c-Si) solar cells based on TiO2 and its stacked combinations with amorphous silicon or SiO2 passivation layers. The relative effectiveness of these contact schemes is quantified under practical concerns of Fermi-level pinning (FLP) and interfacial defects. For a standard TiO2/Al contact stack on c-Si, a relatively high Schottky barrier (~0.5 eV) typically exists due to FLP which can increase the series resistance and degrades fill factor (FF) at low-to-moderate doping in TiO2. With the insertion of an ultrathin SiO2 layer, the SiO2/TiO2/Al stack can mitigate the parasitic Schottky effect on series resistance through its better pinning factor, resulting in ~5% absolute increase in the FF. Moreover, by introducing a field-effect passivation through the SiO2 layer, the surface concentration of the minority carriers can be suppressed and the associated surface recombination losses can be minimized for interfacial defect density up to ~ $1 \times {10}^{12}$ cm−2eV−1. In contrast, the cell performance for TiO2/Al stack degrades due to surface recombination losses for interfacial defect density above ~ $1 \times {10}^{10}$ cm−2eV−1. These quantitative insights provide valuable understanding of the published experimental data and provide useful guidelines for the design of TiO2-based contact stacks.

Structural Properties of Al-O Monolayers in SiO2 on Silicon and the Maximization of Their Negative Fixed Charge Density.

Al2O3 on Si is known to form an ultrathin interfacial SiO2 during deposition and subsequent annealing, which creates a negative fixed charge ( Qfix) that enables field-effect passivation and low surface recombination velocities in Si solar cells. Various concepts were suggested to explain the origin of this negative Qfix. In this study, we investigate Al-O monolayers (MLs) from atomic layer deposition (ALD) sandwiched between deliberately grown/deposited SiO2 films. We show that the Al atoms have an ultralow diffusion coefficient (∼4 × 10-18 cm2/s at 1000 °C), are deposited at a constant rate of ∼5 × 1014 Al atoms/(cm2 cycle) from the first ALD cycle, and are tetrahedral O-coordinated because the adjacent SiO2 imprints its tetrahedral near-order and bond length into the Al-O MLs. By variation in the tunnel-SiO2 thickness and the number of Al-O MLs, we demonstrate that the tetrahedral coordination alone is not sufficient for the formation of Qfix but that a SiO2/Al2O3 interface within a tunneling distance from the substrate must be present. The Al-induced acceptor states at these interfaces have energy levels slightly below the Si valence band edge and require charging by electrons from either the Si substrate or from Si/SiO2 dangling bonds to create a negative Qfix. Hence, tunneling imposes limitations for the SiO2 and Al2O3 layer thicknesses. In addition, Coulomb repulsion between the charged acceptor states results in an optimum number of Al-O MLs, i.e., separation of both interfaces. We achieve maximum negative Qfix of ∼5 × 1012 cm-2 (comparable to thick ALD-Al2O3 on Si) with ∼1.7 nm tunnel-SiO2 and just seven ALD-Al2O3 cycles (∼8 Å) after optimized annealing at 850 °C for 30 s. The findings are discussed in the context of a passivating, hole-selective tunnel contact for high-efficiency Si solar cells.

Impact of interfacial layer using ultra-thin SiO2 on electrical and structural characteristics of Gd2O3 MOS capacitor

The aim of present study is to improve the quality of Gd2O3/p-Si MOS structure by reducing interface trap charge density. Therefore, the ultra-thin SiO2 layer was grown to high-k/Si interface. The effect of the post deposition annealing on the structural properties of the Gd2O3/SiO2 films and electrical characteristics of the Al/Gd2O3/SiO2/p-Si/Al were investigated for three different temperature. Besides, the effect of the series resistance and measurement frequency on the electrical characteristics of the p-MOS capacitors was examined in detail. 118 nm-thick Gd2O3 films were grown by RF magnetron sputtering following the 5 nm-thick SiO2 deposition on p type Si wafer by dry oxidation method. While the Gd2O3 monoclinic characteristic peaks were observed in the Gd2O3/SiO2/Si structures annealed at 600 °C and 800 °C, the XRD spectra of as-deposited and annealed at 400 °C sample pointed out Gd silicate formation. –Si, –O, –Gd, and –H bonds were defined in the FTIR spectra of all samples. The frequency dependent capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of Gd2O3/SiO2 MOS capacitor were measured. Strong accumulation capacitance values in these devices did not change significantly depending on frequency. Unlike from the MOS capacitor with as-deposited and annealed Gd2O3/SiO2 at 400 °C, the interface trap charge density $$({N_{it}})$$ increased with increasing voltage frequency for the samples annealed at 600 °C and 800 °C. No significant change in the border trap density $$({N_{bt}})$$ with increasing frequency was observed in the MOS capacitor except for as-deposited device. The barrier height $$({\Phi _B})$$ increased with increasing frequency for all Gd2O3/SiO2 MOS capacitors.

High Density Formation and Magnetoelectronic Transport Properties of Fe3Si Nanodots

We fabricated DO3-orderd Fe3Si-nanodots (NDs) on ultrathin SiO2 and evaluated local I-V characteristics through individual dots under magnetic field application by using atomic force microscopy (AFM) with a magnetic cantilever. High-density Fe-silicide NDs with an areal density as high as ~1011 cm-2 were formed on thermally grown SiO2 by exposing ultrathin Fe/amorphous-Si/Fe tri-layer stacked structures to a remote H2 plasma without external heating. The formation of DO3-orderd NDs was confirmed by X-ray diffraction and magnetization measurements. From local electron transport properties, a clear change in resistance depending on the magnetization direction of Fe3Si-NDs with respect to the CoPtCr-coated AFM tip was confirmed at room temperature.

Growth of epitaxial FeGeγ nanocrystals with incommensurate Nowotny chimney-ladder phase on Si substrate

We developed the growth technique of epitaxial nanocrystals of FeGeγ (γ ∼ 1.52), a recently-found new crystal with incommensurate Nowotny chimney-ladder phase, on Si(001) substrates. This bulk material is promising for thermoelectric application, and now their films and nanostructures are expected to be fabricated. However, it was difficult to grow single phase epitaxial FeGeγ directly on Si substrates by conventional growth method. On the other hand, we successfully formed almost single phase epitaxial FeGeγ nanocrystals on Si substrates covered with ultrathin SiO2 films with nanowindows. Reflection high energy electron diffraction indicated that the nanocrystals had the Nowotny chimney-ladder structure, the lattice constants of which were approximately consistent with those of FeGeγ bulk. This indicated strain relaxation in nanocrystals due to the hemispherical shape. This will open a road to realize high performance thermoelectric nanomaterials on Si substrates.

Assisted passivation by a chemically grown SiO2 layer for p-type selective emitter-passivated emitter and rear cells

This paper presents the development of industrial-sized p-type passivated emitter and rear cells (PERCs) with a selective emitter (SE) structure. We focus on different assisted passivation schemes and use nitric acid oxidation of silicon (NAOS) to form an ultrathin SiO2 layer. The results show that all I–V parameters of the PERCs are significantly modified when SiO2 is present on the front and/or rear sides of the cell. For front-emitter passivation by NAOS-SiO2, we observe an increase in the open-circuit voltage (Voc) and short-circuit current density (Jsc) and strong enhancement of the internal quantum efficiency (IQE) for short-wavelength photons. This can be attributed to the high level of chemical passivation, as indicated by the reduced interface trap density (Dit), due to the reduced Shockley–Read–Hall recombination. By contrast, all I–V parameters associated with SiO2 rear passivation decrease due to the increased Dit, which results in enhanced surface recombination. The different types of surface passivation for n-type (front) and p-type (rear) surfaces are presumably due to different doping surface concentrations. These results suggest that NAOS surface pretreatment is a very promising technique to improve the level of surface passivation and thereby enhance the performance of industrial-sized PERCs.

Reliability factors of ultrathin dielectric films based on highly controlled SiO2 films

Two main factors determine the reliability of ultrathin SiO2 films thermally grown on Si when subjected to long-term electrical stress. One of them is two-dimensional thickness uniformity for suppressing the decrease in Weibull slope. The other is film density distribution, which affects the degradation rate during application of high electric stress. The importance of thermal process optimization in inhibiting density fluctuation is demonstrated.

Reliable peripheral anchor-assisted transfer printing of ultrathin SiO2 for a transparent and flexible IGZO-based inverter

This study demonstrates the utility of a printable ultrathin silicon dioxide (SiO2) substrate for developing highly transparent and flexible electronic devices. SiO2 provides a wider thermal process window than that of plastics, which is necessary for producing various electronics. To manipulate this fragile material, we employed a supportive handling substrate and transfer printing process using a sacrificial layer and protruding SU-8 anchors. In particular, we characterized the interfacial stress level and mechanics between the SiO2 substrate and the anchors during the retrieval process. We also manipulated the configuration of the corner of the SiO2 substrate to develop a reliable transfer printing process, which resulted in a high transfer yield with no distortion or fracture of the SiO2 patterns. As an example to demonstrate the utility of this method, we successfully developed a transparent and flexible thin-film inverter based on amorphous indium gallium zinc oxide (IGZO) with an 84.7% average optical transmittance on a polyethylene terephthalate (PET) film with an adhesive layer.