Typical Printed Circuit Board Research Articles

Nonlinear Dynamic Response of a Printed Circuit Board to Shock Loads Applied to Its Support Contour

We evaluate the nonlinear dynamic response of a flexible printed circuit board (PCB) to the following two types of shock loads acting on its support contour: 1) suddenly applied constant acceleration and 2) periodic instantaneous impacts. The purpose of the analysis is to determine the maximum accelerations experienced by the electronic components and devices surface mounted on the board. We show that when the support contour is immovable (nondeformable) and the deflections are large, it is important to account for the nonlinear effects. These are due to the in-plane (“membrane”) forces in the PCB and can possibly result in substantially higher accelerations than those predicted by a linear theory. The obtained formulas are easy-to-use and enable one to evaluate the maximum displacements (amplitudes), velocities, and accelerations of the surface-mounted devices, as well as the maximum dynamic stresses in the board. These formulas can be helpful when choosing the appropriate PCB type and dimensions, and the most rational lay-out of the components on the board.

PCB Trace Thermal Analysis and Effective Conductivity

The electrical current carrying capability of a surface or buried trace located within a fiberglass printed circuit board (PCB), is of important interest in the microelectronics industry. The maximum allowable trace power, hence local integrity and maximum allowable operating temperature, will depend on several parameters including the circuit board thermal conductivity, thickness, trace size and location. A two-dimensional, steady-state thermal conduction analysis is made on a finite, plane homogeneous medium (PCB), to examine the trace behavior. The trace is modeled as a zero-thickness, strip heat source with specified uniform temperature, and it’s position in the medium is varied. A two-dimensional thermal analysis is also performed on a multilayered cell model with finite heat source, to establish an accurate, effective thermal conductivity for a typical PCB. Results are tabulated and presented graphically for both the two-dimensional trace and effective conductivity models.

Nonlinear dynamic response of a flexible thin plate to constant acceleration applied to its support contour, with application to printed circuit boards, used in avionic packaging

We evaluate the dynamic response of a flexible rectangular thin plate to a constant acceleration applied to its support contour. The study is carried out in application to printed circuit boards (PCBs) used in avionic packaging and is based on a simple and easy-to-use analytical model, clearly indicating the role of various factors affecting the mechanical behavior of the board. The main goal of the study is to determine the maximum accelerations experienced by the board. We showed that in the case of large deflections of a board with a nondeformable contour it is important to account for nonlinear effects, which are due to the membrane forces and lead to substantially higher accelerations and stresses. The developed theory can be helpful in evaluating the accelerations acting on surface-mounted components, and choosing the appropriate PCB type, dimensions and support conditions. It can also be used when choosing the most feasible layout of the electronic devices on the board.

Microstructure and Mechanical Properties of Electroless Copper Deposits

The plated through-hole (PTH) represents an important structural element of today's multilayer printed circuit boards (PCBs). It connects the circuit layers to provide a continuous electrical path, and a typical PCB contains thousands of PTHs. The electrical conduction in the PTH is provided by either electroplated or electroless copper. Because of the small diameters and high aspect ratios (the term aspect ratio refers to the ratio of the board thickness to the hole diameter) required in today's PCBs, it is becoming increasingly difficult to produce copper with a uniform thickness within the through-hole through the electrolytic method. The so-called full-build electro less methodi is more attractive, in principle, because it does not require the use of an external source of electric current. One serious concern about the integrity of PTHs arises from the fact that PTHs can be exposed to a thermal shock and/or a thermal cycle during and after manufacture of PCBs. At the elevated assembly temperature, the laminate materials expand more than the copper in the PTHs. This differential thermal expansion in the direction of the board' s thickness causes the copper to deform plastically and sometimes to crack (2). The cracking is believed to occur by the thermally-induced tensile stress. Solder-

Partial discharge. VI: PD testing of printed circuit boards

For pt.V see ibid., vol.7, no.2, p.28 et seq. (1991). The results of a research program concerned with applying partial-discharge (PD) testing to the nondestructive evaluation of the dielectric characteristics of coated printed circuit board (PCB) systems that must meet the high-voltage dielectric test requirements of low-voltage equipment are reported. To insure that the resulting data were applicable to typical PCBs a standardized test board layout was used, and the various coatings applied to the board were subjected to a range of conditioning treatments. The measurement and test specimens are described. The PD inception voltage and extinction voltage data for seven coatings and four conditioning regimes are presented, for either parallel conductor traces or pads adjacent to conductor traces, as measured from either the component or the solder side of the board. The data indicate that PD measurements, in combination with suitable conditioning, provide a good tool for determining the quality of coated PCBs. If applied correctly, the PD test is nondestructive. >

A Just-In-Time simulation model of a PCB assembly line

In this paper, a simulation model of an existing printed circuit board (PCB) assembly line is developed in an attempt to identity strategies which tend to improve the system performance. The model is based on the concept of the JIT (Just-In-Time) production approach. Parameters investigated include sequencing rule, lot size, number of Kanbans used, and number of PCB types.

A design for parts storage/feeding in PC board assembly

Abstract The flexible, automated, high speed assembly of printed circuit (PC) boards offers productivity gains over hard automation. While significant progress has been made to automate the component insertion on PC boards, there still remains a class of components, commonly referred to as ‘odd-form’ components, whose handling has posed significant constraints on the flexibility of automation designs. This paper presents conceptual designs for the storage and feeding of such odd-form components to facilitate their automated assembly. Moreover, the problem is made more difficult because the component storage and feeding system technology has lagged behind the development of flexible assembly systems that it supports. In this paper, different design alternatives for the component storage/feeding system and its integration into an overall flexible assembly workstation are presented and quantitatively analysed. With appropriate software control and sensing techniques, these designs will enable a large variety of components to be assembled on a number of different types of PC boards, facilitating flexible, automated assembly at high speeds.

Simulation of a PCB assembly line: A modified JIT approach

In this paper, a simulation model of an existing printed circuit board (PCB) assembly line is developed in an attempt to identify strategies which tend to improve the system performance. The model is based on the concept of the JIT (Just-In-Time) production approach. Parameters investigated includes sequencing rules, lot sizes, number of Kanbans used, and number of PCB types.

4771236 Multilayered printed circuit board type resistor isolated tray for stress testing integrated circuits and method of making same

An improved apparatus for stress testing a plurality of electronic circuits each formed on a wafer-like chip along at least one edge thereof and comprising a separate socket (60 of FIG. 1) having a set of contacts for receiving and holding one of the wafers with the set of contacts making contact with the edge contacts of the wafer it is holding and a plurality of terminal pins which are connected to the wafer edge contacts through the set of contacts and with the terminal pins of each socket being arranged in identical patterns. The apparatus comprises a multilayered printed circuit board (FIG. 4) having a plurality of identical groups of conductively plated holes (PTHs) (FIG. 15) formed therein for each socket and with each group of PTH's comprising the plurality of pin terminal holes (FIG. 15) arranged to receive the terminal pins of one of the sockets and a plurality of via holes (FIG. 15) formed therein around each socket to provide conduction between layers of said multilayered board for each socket and further with the via holes of each group of PTHs being of identical patterns, a plurality of printed circuit resistors (154 of FIG. 15) formed in one or more layers of the multilayered printed circuit board with each resistor being connected between a pin terminal hole and a via hole of the group of holes of each socket and exclusive of any other pin terminal hole or via hole with respect to connecting a resistor therebetween. Also provided is a plurality of conductive leads (lead 172 of FIG. 19 and lead 208 of FIG. 20) for connecting together the corresponding via holes of each of the sockets, and the corresponding via holes of each of the sockets, a plurality of signal sources (signal sources 1, 2, and 8 of FIG. 12) for supplying a unique signal to each group of corresponding via holes via a unique one of the conductive means, and a voltage source (+VCC and PGA of FIG. 12) for providing a common voltage source on a selected layer of the multilayered printed circuit board between selected ones of the plated through holes of each socket.

Surface mounting of leadless chip carriers on various printed circuit board type substrates : I. G. Lang. Electrocomponent Sci. Technol.10, 13 (1982)

Surface mounting of leadless chip carriers on various printed circuit board type substrates : I. G. Lang. Electrocomponent Sci. Technol.10, 13 (1982)

The Use of Polymer Thick Film for Making Printed Circuit Boards

The electronics industry is facing a situation in which the cost of electronic functions is dropping continuously while the cost of interconnecting the functions by traditional means, especially through the use of printed circuit boards, continues to rise. Polymer thick film is one proven approach to reversing the trend of rising interconnection costs. It is relatively easy for the typical printed circuit board manufacturer to convert to or adapt polymer thick film because he has most of the necessary equipment, technical knowledge and personnel.

Surface Mounting of Leadless Chip Carriers on Various Printed Circuit Board Type Substrates

The effect of extended thermal cycling on the reliability of joints between ceramic leadless chip carriers and various printed circuit board type substrates is examined. Test results indicate success in using ceramic leadless chip carriers on some styles of PCB.

Computerised automatic circuit-board testing—the right approach to meeting market requirements

A printed-circuit board can be tested with a dedicated test rig for every type of board or by comparing the board with a known good baord. However, the idea of a single piece of test equipment that can be adapted to test a wide range of different types of printed-circuit board is now an accepted and economically proven testing technique

Nanosecond Pulse Circuit Board Interconnections

The difficulties involved in using mating connectors to interconnect nanosecond pulse circuit boards are discussed. The effects of such connectors on pulse characteristics may be predicted by the techniques presented in this article. Experimental verification of predicted performance is presented in the form of photographs through the use of time domain reflectometry. The connector used to illustrate these techniques is a miniature printed circuit board type. An equivalent circuit for this connector is arrived at through an experimental procedure. Additional experimental justification of this circuit is presented. This equivalent circuit is used to derive an expression for the waveform of the pulse reflected from a connector contact pair. The risetime degradation of the pulse transmitted through the connector contact is evaluated by use of the equivalent circuit. The expression for the waveform coupled into a set of contacts by a pulse driving an adjacent pair is derived with the aid of the equivalent circuit. These expressions are presented and illustrated in the text. The mathematical derivations are presented in a set of appendices. Experimental verification of the analysis in the form of photographs of pulse reflection and pulse crosscoupling waveforms is offered. Methods of improving performance of the connector with regard to pulse risetime degradation, pulse reflection, and crosscoupling are demonstrated. Various arrangements of contact connectors and their relative merits are discussed.