Surface mounting of leadless chip carriers on various printed circuit board type substrates : I. G. Lang. Electrocomponent Sci. Technol.10, 13 (1982)

doi:10.1016/0026-2714(83)90766-7

Abstract

Highlights

It is increasingly well accepted that the chip packaging revolution from dual in line to chip carrier (CC), tape automated bonding (TAB) and bare chip (BC) is under way, brought about by integration at chip level
Some previous work has indicated that PCB technology is capable of meeting the challenge of the new interconnection requirement at typically printed wiring board type costs
One area where there has been debate is the use of components with a particular coefficient of expansion on a substrate which has a different value for the coefficient

Summary

Introduction

It is increasingly well accepted that the chip packaging revolution from dual in line to chip carrier (CC), tape automated bonding (TAB) and bare chip (BC) is under way, brought about by integration at chip level. This change prompts the need for change, in turn, on the level of interconnection. Some previous work has indicated that PCB technology is capable of meeting the challenge of the new interconnection requirement at typically printed wiring board type costs. Conventional high volume technology will produce the following:-. Ratio Board Thickness to Hole size (max) Number of layers Size (max).

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Discussion

Conclusion