Two-dimensional Numerical Simulation Study Research Articles

Numerical Simulation of n-Heptane Spray Combustion in a Porous Medium Burner

ABSTRACT A two-dimensional numerical simulation study is conducted to investigate the combustion process of n-heptane spray in a porous medium burner (PMB) based on the previous experimental work performed by this research group. In order to adapt the model for the conditions of different wall temperatures and different splash Mach numbers, the wall-impingement model in this study is based on the model by O’Rourke and Amsden and the interaction mechanism between the spray droplets and the wall is optimized through user-defined functions (UDFs). The effects of air inlet velocity, injected fuel quantity and preheating temperature on spray combustion are analyzed. The results show that the downstream velocity of the combustion flame increases when the inlet air velocity increases or the fuel injection rate decreases or the preheating temperature decreases. Under the same equivalence ratios, the flame propagation velocity increases as the increase of the dimensionless gas-oil joint effect parameter. The flame area also increases with the increase of inlet air velocity, but the rate of increase in the flame area gradually decreases as the reaction proceeds. An initial preheating temperature of 1060 K is conducive to the stable combustion of n-heptane spray for flame lengths less than 0.060 m.

Device Performance Optimization of Organic Thin-Film Transistors at Short-Channel Lengths Using Vertical Channel Engineering Techniques

This paper presents a finite-element-based two-dimensional numerical simulation study of the vertical channel engineering approaches for controlling the short-channel effects (SCEs) in organic transistors based on thin-film transistor technology (OTFTs). The impact of gate-oxide thickness TOx scaling and usage of high-permittivity gate dielectric material has been analyzed for a bottom-contact organic thin-film transistors at channel length of 0.7 μm. The techniques have been used to investigate the impact on drain-induced barrier lowering (DIBL), sub-threshold slope, and IOn/IOff ratio. The results have shown a significant reduction in values of DIBL and sub-threshold slope in short-channel OTFTs when either of the channel engineering techniques are employed. A high IOn/IOff ratio of the order of ~107 has been achieved using a high-permittivity gate-oxide material. It has been observed that using a high-permittivity gate dielectric material, a peak value of IOn/IOff ratio can be achieved for an equivalent oxide thickness of 5 nm. The results suggest that the desirable transistor performance can be achieved through proper selection of gate-oxide material and thickness.

Two-Dimensional Numerical Simulation Study on Bed-Load Transport in the Fluctuating Backwater Area: A Case-Study Reservoir in China

Numerical modeling of sedimentation and erosion in reservoirs is an active field of reservoir research. However, simulation of the bed-load transport phenomena has rarely been applied to other water bodies, in particular, the fluctuating backwater area. This is because the complex morphological processes interacting between hydrodynamics and sediment transport are generally challenging to accurately predict. Most researchers assert that the shape of a river channel is mainly determined by the upstream water and sediment, and the physical boundary conditions of the river channel, rather than random events. In this study, the refinement and application of a two-dimensional shallow-water and bed-load transport model to the fluctuating backwater area is described. The model employs the finite volume method of the Godunov scheme and equilibrium sediment transport equations. The model was verified using experimental data produced by a scaled physical model, and the results indicated that the numerical model is believable. The numerical model was then applied to actual reservoir operations, including reservoir storage, reservoir drawdown, and the continuous flood process, to predict the morphology of reservoir sedimentation and sediment transport rates, and the changes in bed level in the fluctuating backwater area. It was found that the location and morphology of sedimentation affected by the downstream water level result in random evolution of the river bed, and bed-load sedimentation is moved from upstream to downstream as the slope of the longitudinal section of the river bed is reduced. Moreover, the research shows that the river channel sedimentation morphology is changed by the change water level of the downstream reach, causing the dislocation of the beach and channel and random events that will affect the river, which is of certain reference value for waterway regulation.

Two-dimensional numerical simulation study of the effective thermal conductivity statistics for binary composite materials

Two-dimensional numerical simulation study of the effective thermal conductivity statistics for binary composite materials

A super beta bipolar transistor using SiGe-base surface accumulation layer transistor(SALTran) concept: a simulation study

Current gain is an important design parameter of bipolar transistors. While a SiGe base is commonly used to increase the current gain, the recently reported surface accumulation layer transistor (SALTran) concept has been shown to give a similar current gain enhancement. Using two-dimensional numerical simulation studies, we show for the first time that a combination of the SiGe base and the SALTran concept can be used to realize super beta bipolar transistors with peak current gains more than 12000.

CFD modeling of an ion-drag micropump

A two-dimensional numerical simulation study has been performed to model an electrohydrodynamic (EHD) micropump. The micropump consists of an array of interdigitated electrodes along the top and bottom of the micropump channel. The focus of the simulations was to study the effects of electrode gap, stage gap, channel height, and applied voltage. The numerical results were first validated with experimental data and then applied to obtain optimum electrode design and pump characteristics curves for geometries of interest. Additionally, the simulation results provide details about the flow behavior of the micropump and clearly capture local flow induced by EHD forces.

Enhanced breakdown voltage and reduced self-heating effects in thin-film lateral bipolar transistors: Design and analysis using 2-D simulation

In this work, we present our two-dimensional numerical simulation studies and analysis of the enhanced breakdown and self-heating characteristics of a new collector-tub three-zone step doped thin-film lateral bipolar transistor (CT-SLBT) on silicon-on-insulator (SOI), which shows enhanced breakdown voltage as high as 80% when compared with that of the conventional uniformly doped lateral bipolar transistor (LBT) on SOI. The design issues and the reasons for the improved performance are discussed in detail.

Investigation of the Novel Attributes of a Fully Depleted Dual-Material Gate SOI MOSFET

The novel features of a fully depleted (FD) dual-material gate (DMG) silicon-on-insulator (SOI) MOSFET are explored theoretically and compared with those of a compatible SOI MOSFET. The two-dimensional numerical simulation studies demonstrate the novel features as threshold voltage roll-up and simultaneous transconductance enhancement and suppression of short-channel effects offered by the FD DMG SOI MOSFET. Moreover, these unique features can be controlled by engineering the workfunction and length of the gate material. This work illustrates the benefits of high-performance FD DMG SOI MOS devices over their single material gate counterparts and provides an incentive for further experimental exploration.

Investigation of the novel attributes of a single-halo double gate SOI MOSFET: 2D simulation study

The novel features of an asymmetric double gate single halo (DG-SH) doped SOI MOSFET are explored theoretically and compared with a conventional asymmetric DG SOI MOSFET. The two-dimensional numerical simulation studies demonstrate that the application of single halo to the double gate structure results in threshold voltage roll-up, reduced DIBL, high drain output resistance, kink free output characteristics and increase in the breakdown voltage when compared with a conventional DG structure. For the first time, we show that the presence of single halo on the source side results in a step function in the surface potential, which screens the source side of the structure from the drain voltage variations. This work illustrates the benefits of high performance DG-SH SOI MOS devices over conventional DG MOSFET and provides an incentive for further experimental exploration.

Two-dimensional analysis of a BiNMOS transistor operating at 77 K using a modified PISCES program

The authors present a detailed two-dimensional numerical simulation study on the steady-state and turn-on transient behavior of a BiNMOS device operating at 77 K using PISCES-2B with modified low-temperature models. It is shown that the switching speed of the BiNMOS device, which is designed for operation at room temperature, is degraded for low-temperature operation. The BiNMOS device structure and the low-temperature device models for the two-dimensional (2D) device simulator are described, following by the steady-state and the transient analysis of the BiNMOS device. The turn-on transient performance of the BiNMOS device shows that, at 77 K, the switching time, which is determined by the load-related delay and the intrinsic delay of the bipolar device, increases about 45% from its 300 K value for an output load of 0.1 pF/ mu m.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Latch up in physically merged bipolar-MOS BICMOS structures

A two-dimensional numerical simulation study of latch up in merged bipolar-MOS structures for BICMOS applications is presented. The results of the simulations indicate that special precautions must be exercised in designing merged transistor structures for these applications.

Pull-down transient-imposed extrinsic base consideration in BiNMOS transistors

A detailed two-dimensional numerical simulation study of the bipolar devices in the BiCMOS circuit environment during pull-down transients is presented. The charge buildup and removal phenomenon in the bipolar device determines the switching speed of the BiNMOS devices. The tradeoffs in designing the extrinsic base in terms of the switching behavior are also described. It is shown that the structure with the extrinsic base p/sup +/ area farthest from the intrinsic base area has the best switching speed owing to the largest initial overshoot in the base voltage and the lateral base effects. >

On the punchthrough characteristics of advanced self-aligned bipolar transistors

This paper presents a detailed two-dimensional numerical simulation study on the punchthrough characteristics of advanced self-aligned bipolar transistors utilizing a sidewall spacer technology. Particular emphasis is placed on the effect of the sidewall spacer thickness. Perimeter punchthrough due to insufficient extrinsic-intrinsic base overlap is shown to be a major concern. The tradeoff between the punchthrough current and the maximum surface electric field in the depletion region of the extrinsic base-emitter junction, which relates closely to the perimeter tunneling current, is discussed.