Two-dimensional Discrete Wavelet Research Articles

Synthesis of minimum-area folded architectures for rectangular multidimensional multirate DSP systems

In this paper, we formalize a novel multirate multidimensional folding (MMF) transformation, which is a tool used to systematically synthesize control circuits for pipelined very large scale integrated (VLSI) architectures that implement a restricted but immensely practical class, namely, rectangular decimators/expandors with line-by-line scan, of multirate multidimensional algorithms. Although multirate multidimensional algorithms contain decimators and expanders that change the effective sample rate of a discrete-time signal, it is possible using MMF to time multiplex the algorithm to hardware in such a manner that the resulting synchronous architecture requires only a single-clock signal. MMF constraints are derived, and these constraints are used to address two related issues. The first issue is memory requirements in the folded architectures. We derive expressions for the minimum number of memory units required by a folded architecture that implements a multirate multidimensional algorithm. The second issue is retiming. Based on the noble identities of multirate signal processing, we derive retiming for folding constraints that indicate how a multirate multidimensional data flow graph must be retimed for a given schedule to be feasible. The techniques introduced in this paper can be used to synthesize architectures for a wide variety of DSP applications that are based on multirate multidimensional algorithms, such as signal analysis and coding based on subband decompositions and wavelet transforms. Many design examples are considered to demonstrate the viability of MMF. It is shown that MMF is able to save 18-25% area for 1-4 level two-dimensional (2-D) discrete wavelet transforms (DWTs). A tradeoff between computational and storage area is highlighted by our study of a 2064/spl times/2064 4-level 2-D DWT. We also present a few 2-D IIR filter designs, where we are able to exploit the throughput bottleneck of these filters to derive extremely low area designs.

Wavelet-based texture analysis and synthesis using hidden Markov models

Wavelet-domain hidden Markov models (HMMs), in particular, hidden Markov tree (HMT), were recently proposed and applied to image processing, where it was usually assumed that three subbands of the two-dimensional discrete wavelet transform (DWT), i.e., HL, LH, and HH, are independent. In this paper, we study wavelet-based texture analysis and synthesis using HMMs. Particularly, we develop a new HMM, called HMT-3S, for statistical texture characterization in the wavelet domain. In addition to the joint statistics captured by HMT, the new HMT-3S can also exploit the cross correlation across DWT subbands. Meanwhile, HMT-3S can be characterized by using the graphical grouping technique, and has the same tree structure as HMT. The proposed HMT-3S is applied to texture analysis, including classification and segmentation, and texture synthesis with improved performance over HMT. Specifically, for texture classification, we study four wavelet-based methods, and experimental results show that HMT-3S provides the highest percentage of correct classification of over 95% upon a set of 55 Brodatz textures. For texture segmentation, we demonstrate that more accurate texture characterization from HMT-3S allows the significant improvements in terms of both classification accuracy and boundary localization. For texture synthesis, we develop an iterative maximum likelihood-based texture synthesis algorithm which adopts HMT or HMT-3S to impose the joint statistics of the texture DWT, and it is shown that the new RMT-3S enables more visually similar results than HMT does.

Visualization of Shear Stress With Micro Imaging Chip and Discrete Wavelet Transform

The two-dimensional low-speed structure of a turbulent boundary layer has been clearly visualized by a combination of a shear stress sensor using micro electro mechanical systems and the discrete wavelet transform. The application of two-dimensional discrete wavelet transforms to the visualization of wall shear stress data obtained using the micro shear stress imaging chip is described. The experiment was carried out under various Reynolds number conditions. It is shown that it is possible to visualize the low-speed streak structure as contours of two-dimensional wavelet level corresponding to spanwise wave number as a function of Reynolds number.

Analysis of Seidel aberration by use of the discrete wavelet transform.

Seidel aberration coefficients can be expressed by Zernike coefficients. The least-squares matrix-inversion method of determining Zernike coefficients from a sampled wave front with measurement noise has been found to be numerically unstable. We present a method of estimating the Seidel aberration coefficients by using a two-dimensional discrete wavelet transform. This method is applied to analyze the wave front of an optical system, and we obtain not only more-accurate Seidel aberration coefficients, but we also speed the computation. Three simulated wave fronts are fitted, and simulation results are shown for spherical aberration, coma, astigmatism, and defocus.

VLSI architectures of the 1-D and 2-D discrete wavelet transforms for JPEG 2000

This paper proposes efficient VLSI architectures for computation of the one-dimensional (1-D) and two-dimensional (2-D) discrete wavelet transforms (DWTs) for joint photographic experts group 2000. The proposed 1-D DWT architecture computes the wavelet lowpass and highpass output sequences using the lowpass filter architecture alone, whereas the conventional architectures compute the lowpass and highpass output sequences using both lowpass and highpass filter architectures. The proposed architecture is effectively applied to computation of the Daubechies 4-tap wavelet transform using the relationships between the Daubechies wavelet filter coefficients. The proposed architecture does not need memory and control units whereas conventional architectures need a complex control unit, memory unit, and so on. The two proposed VLSI architectures for the 2-D DWT are constructed based on block-based computation. Each M×N (N×M) block DWT is performed along the row and column directions simultaneously, where M and N denote the number of filter taps and the number of columns (rows), respectively, thus the required extra processing units of the proposed architectures are much smaller than those of the conventional architectures.

Image wavelet denoising using the robust local threshold

This paper suggests a scheme of image denoising based on two-dimensional discrete wavelet transform. The denoising algorithm is described with some operators. By thresholding the wavelet transform coefficients of noisy images, the original image can be reconstructed correctly. Different threshold selections and thresholding methods are discussed. A new robust local threshold scheme is proposed. Quantifying the performance of image denoising schemes by using the mean square error, the performance of the robust local threshold scheme is demonstrated and is compared with the universal threshold scheme. The experiment shows that image denoising using the robust local threshold performs better than that using the universal threshold.

Data scheduling scheme for power reduction in DWT-based image coders

A new memory data scheduling scheme is used for designing a two-dimensional discrete wavelet transform (2D-DWT) core for ASIC implementation. This scheme reduces by 20 to 30% the overall switching activity in the 2D-DWT core and hence leads to lower power consumption at the expense of a slight reduction in the quality of reconstructed images and a slight increase in the chip area. This scheme is particularly useful in applications such as wireless Internet and laptop computers, in which picture quality can be traded-off for reduced power consumption.

A nonseparable VLSI architecture for two-dimensional discrete periodized wavelet transform

A modified two-dimensional (2-D) discrete periodized wavelet transform (DPWT) based on the homeomorphic high-pass filter and the 2-D operator correlation algorithm is developed in this paper. The advantages of this modified 2-D DPWT are that it can reduce the multiplication counts and the complexity of boundary data processing in comparison to other conventional 2-D DPWT for perfect reconstruction. In addition, a parallel-pipeline architecture of the nonseparable computation algorithm is also proposed to implement this modified 2-D DPWT. This architecture has properties of noninterleaving input data, short bus width request, and short latency. The analysis of the finite precision performance shows that nearly half of the bit length can be saved by using this nonseparable computation algorithm. The operation of the boundary data processing is also described in detail. In the three-stage decomposition of an N/spl times/N image, the latency is found to be N/sup 2/+2N+18.

Visualization of a turbulent jet using wavelets

An application of multiresolution image analysis to turbulence was investigated in this paper, in order to visualize the coherent structure and the most essential scales governing turbulence. The digital imaging photograph of jet slice was decomposed by two-dimensional discrete wavelet transform based on Daubechies, Coifman and Baylkin bases. The best choice of orthogonal wavelet basis for analyzing the image of the turbulent structures was first discussed. It is found that these orthonormal wavelet families with index N<10 were inappropriate for multiresolution image analysis of turbulent flow. The multiresolution images of turbulent structures were very similar when using the wavelet basis with the higher index number, even though wavelet bases are different functions. From the image components in orthogonal wavelet spaces with different scales, the further evident of the multi-scale structures in jet can be observed, and the edges of the vortices at different resolutions or scales and the coherent structure can be easily extracted.

Two fast architectures for the direct 2-D discrete wavelet transform

We propose two architectures for the direct two-dimensional (2-D) discrete wavelet transform (DWT). The first one is based on a modified recursive pyramid algorithm (MRPA) and performs a nonstandard decomposition (i.e., Mallat's (1989) tree) of an N/spl times/N image in approximately 2N/sup 2//3 clock cycles (ccs). This result consistently speeds up other known architectures that commonly need approximately N/sup 2/ ccs. Furthermore, the proposed architecture is simpler than others in terms of hardware complexity. Subsequently, we show how symmetric/anti-symmetric properties of linear-phase wavelet filter bases can be exploited in order to further reduce the VLSI area. This is used to design a second architecture that provides one processing unit for each level of decomposition (pipelined approach) and performs a decomposition in approximately N/sup 2//2 ccs. In many practical cases, even this architecture is simpler than general MRPA-based devices (having only one processing unit).

An efficient architecture for two-dimensional discrete wavelet transform

This paper proposes an efficient architecture for the two-dimensional discrete wavelet transform (2-D DWT). The proposed architecture includes a transform module, a RAM module, and a multiplexer. In the transform module, we employ the polyphase decomposition technique and the coefficient folding technique to the decimation filters of stages 1 and 2, respectively. In comparison with other 2-D DWT architectures, the advantages of the proposed architecture are 100% hardware utilization, fast computing time (0.5-0.67 times of the parallel filters'), regular data flow, and low control complexity, making this architecture suitable for next generation image compression systems, e.g., JPEG-2000.

Scalability of 2-D wavelet transform algorithms: analytical and experimental results on MPPs

This paper studies the scalability of two-dimensional (2-D) discrete wavelet transform (DWT) algorithms on massively parallel processors (MPPs). The principal operation in the 2-D DWT is the filtering operation used to implement the filter banks of the 2-D subband decomposition. This filtering operation can be implemented as a convolution in the time domain or as a multiplication in the frequency domain. We demonstrate that there exist combinations of machine size, image size, and wavelet kernel size for which the time-domain algorithms outperform the frequency domain algorithms and vice-versa. We therefore demonstrate that a hybrid approach that combines time- and frequency-domain approaches can yield linear scalability for a broad range of problem and machine sizes. Furthermore, we show the effect of processor speed versus communication overhead and the use of separable versus nonseparable wavelets on the crossover points between the algorithm approaches.

Efficient high-speed/low-power pipelined architecture for the direct 2-D discrete wavelet transform

In this paper the author presents a proposed architecture (PA) for the two-dimensional discrete wavelet transform (DWT), which performs a complete dyadic (i.e., nonstandard) decomposition of an N/sub 0//spl times/N/sub 0/ image in approximately N/sub 0//sup 2//4 clock cycles (ccs). Therefore, it consistently speeds up the performance of other known architectures, which commonly need approximately N/sub 0//sup 2/ ccs. Also, it has an AT/sup 2/ complexity, which is notably lower than that of other devices based on the direct approach. This result has been achieved by means of carefully balanced pipelining and has two faces. First, PA can be employed for performing processing four times faster than allowed by other architectures working at the same clock frequency (high-speed utilization), Second, it can be employed even using a four times lower clock frequency but reaching the same performance as other architectures, This second possibility allows one to reduce the supply voltage and the power dissipation respectively by four and by 16 with respect to other architectures (low-power utilization).

Covariance Structure of Wavelet Coefficients: Theory and Models in a Bayesian Perspective

Summary We present theoretical results on the random wavelet coefficients covariance structure. We use simple properties of the coefficients to derive a recursive way to compute the within- and across-scale covariances. We point out a useful link between the algorithm proposed and the two-dimensional discrete wavelet transform. We then focus on Bayesian wavelet shrinkage for estimating a function from noisy data. A prior distribution is imposed on the coefficients of the unknown function. We show how our findings on the covariance structure make it possible to specify priors that take into account the full correlation between coefficients through a parsimonious number of hyperparameters. We use Markov chain Monte Carlo methods to estimate the parameters and illustrate our method on bench-mark simulated signals.

Efficient realizations of encoders and decoders based on the 2-D discrete wavelet transform

In this paper, we present architectures and scheduling algorithms for encoders and decoders that are based on the two-dimensional discrete wavelet transform. We consider the design of encoders and decoders individually, as well as in an integrated encoder-decoder system. We propose architectures ranging from a single-instruction multiple-data processor arrays to folded architectures that are suitable for single-chip implementations. The scheduling algorithms for the folded architectures range from those that try to minimize the latency to those that try to minimize the storage and keep the data flow regular. We include a comparison of the performance of these algorithms to aid the designer in choosing one that is best suited for a specific application.

An efficient VLSI architecture for 2-D wavelet image coding with novel image scan

A folded very large scale integration (VLSI) architecture is presented for the implementation of the two-dimensional discrete wavelet transform, without constraints on the choice of the wavelet-filter bank. The proposed architecture is dedicated to flexible block-oriented image processing, such as adaptive vector quantization used in wavelet image coding. We show that reading the image along a two-dimensional (2-D) pseudo-fractal scan creates a very modular and regular data flow and, therefore, considerably reduces the folding complexity and memory requirements for VLSI implementation. This leads to significant area savings for on-chip storage (up to a factor of two) and reduces the power consumption. Furthermore, data scheduling and memory management remain very simple. The end result is an efficient VLSI implementation with a reduced area cost compared to the conventional approaches, reading the input data line by line.

A parallel implementation of the 2-D discrete wavelet transform without interprocessor communications

The discrete wavelet transform is currently attracting much interest among researchers and practitioners as a powerful tool for a wide variety of digital signal and imaging processing applications. This article presents an efficient approach to compute the two-dimensional (2-D) discrete wavelet transform in standard form on parallel general-purpose computers. This approach does not require transposition of intermediate results and avoids interprocessor communication. Since it is based on matrix-vector multiplication, our technique does not introduce any restriction on the size of the input data or on the transform parameters. Complete use of the available processor parallelism, modularity, and scalability are achieved. Theoretical and experimental evaluations and comparisons are given with respect to traditional parallelization.

Design of an efficient VLSI architecture for 2-D discrete wavelet transforms

We present a VLSI architecture for the separable two-dimensional discrete wavelet transform (DWT) decomposition. Using a computation-schedule table, we show how the proposed separable architecture uses only a minimal number of filters to generate all levels of DWT computations in real time. For the computation of an N/spl times/N 2-D DWT with a filter length L, this architecture spends around N/sup 2/ clock cycles, and requires 2NL-2N storage units, 3L multipliers, as well as 3(L-1) adders.

5. Visualization of the turbulent jet with two-dimensional discrete wavelet transform

5. Visualization of the turbulent jet with two-dimensional discrete wavelet transform

Motion estimation using a complex-valued wavelet transform

This paper describes a new motion estimation algorithm that is potentially useful for both computer vision and video compression applications. It is hierarchical in structure, using a separable two-dimensional (2-D) discrete wavelet transform (DWT) on each frame to efficiently construct a multiresolution pyramid of subimages. The DWT is based on a complex-valued pair of four-tap FIR filters with Gabor-like characteristics. The resulting complex DWT (CDWT) effectively implements an analysis by an ensemble of Gabor-like filters with a variety of orientations and scales. The phase difference between the subband coefficients of each frame at a given subpel bears a predictable relation to a local translation in the region of the reference frame subtended by that subpel. That relation is used to estimate the displacement field at the coarsest scale of the multiresolution pyramid. Each estimate is accompanied by a directional confidence measure in the form of the parameters of a quadratic matching surface. The initial estimate field is progressively refined by a coarse-to fine strategy in which finer scale information is appropriately incorporated at each stage. The accuracy, efficiency, and robustness of the new algorithm are demonstrated in comparison testing against hierarchical implementations of intensity gradient-based and fractional-precision block matching motion estimators.