Tunneling Electroresistance Ratio Research Articles

Performance comparison of planar and cylindrical ferroelectric tunnel junctions

A comprehensive comparison of the electrical characteristics between the planar (P-FTJ) and cylindrical ferroelectric tunnel junction (C-FTJ) is conducted based on physical modeling and simulation. The FTJ architecture consists of metal-ferroelectric–dielectric-metal stacks. Two configurations of C-FTJ are considered depending on whether the position of the ferroelectric (FE) layer is close or away from the inner electrode. The differences between the P-FTJ and C-FTJs in the distributions of the electric field and FE polarization are analyzed. The resultant tunneling electroresistance (TER) is explored as a function of the inner radius, FE thickness, dielectric thickness, and remnant polarization. These simulation results offer physical insights into achieving highly integrated three-dimensional storage structures by improving the TER ratio.

High Tunneling Electro-Resistance Due to Resonant-Type Tunneling in a Ferroelectric Tunnel Junction (FTJ) with a Composite Barrier

Recently, ferroelectric tunnel junctions (FTJs) have emerged as potential devices for memory sector wherein the tunneling current is used to sense the direction of polarization with a nondestructive reading operation. The tunneling electro-resistance ratio (TER) is the figure of merit of this device. A composite ferroelectric-dielectric barrier is expected to achieve a high TER with enhanced performance. A theoretical modeling of a FTJ with a composite barrier (CB) consisting of a dielectric (SrTiO3) and ferroelectric (BaTiO3) layers is proposed. The potential energy profile and the transmission characteristics of a typical (20Å) SrRuO3/(20Å) SrTiO3/(20Å) BaTiO3/(12Å) Pt FTJ system were extensively studied, for both OFF and ON states. The tunneling current density and TER were computed with the variation of bias as well as with varying ferroelectric layer width. Under electric bias, an asymmetric triangular well develops at the dielectric-ferroelectric interface in its ON state whose effect in producing a resonant-type tunneling and a high tunneling current density in its ON state is explained.

Magnetic-ferroelectric synergic control of multilevel conducting states in van der Waals multiferroic tunnel junctions towards in-memory computing.

van der Waals (vdW) multiferroic tunnel junctions (MFTJs) based on two-dimensional materials have gained significant interest due to their potential applications in next-generation data storage and in-memory computing devices. In this study, we construct vdW MFTJs by employing monolayer Mn2Se3 as the spin-filter tunnel barrier, TiTe2 as the electrodes and In2S3 as the tunnel barrier to investigate the spin transport properties based on first-principles quantum transport calculations. It is highlighted that apparent tunneling magnetoresistance (TMR) and tunneling electroresistance (TER) effects with a maximum TMR ratio of 6237% and TER ratio of 1771% can be realized by using bilayer In2S3 as the tunnel barrier under finite bias. Furthermore, the physical origin of the distinguished TMR and TER effects is unraveled from the k||-resolved transmission spectra and spin-dependent projected local density of states analysis. Interestingly, four distinguishable conductance states reveal the implementation of four-state nonvolatile data storage using one MFTJ unit. More importantly, in-memory logic computing and multilevel data storage can be achieved at the same time by magnetic switching and electrical control, respectively. These results shed light on vdW MFTJs in the applications of in-memory computing as well as multilevel data storage devices.

Nanotube ferroelectric tunnel junctions with an ultrahigh tunneling electroresistance ratio.

Low-dimensional ferroelectric tunnel junctions are appealing for the realization of nanoscale nonvolatile memory devices due to their inherent advantages of device miniaturization. Those based on current mechanisms have limitations, including low tunneling electroresistance (TER) effects and complex heterostructures. Here, we introduce an entirely new TER mechanism to construct a nanotube ferroelectric tunnel junction with ferroelectric nanotubes as the tunneling region. When rolling a ferroelectric monolayer into a nanotube, due to the coexistence of its intrinsic ferroelectric polarization with the flexoelectric polarization induced by bending, a metal-insulator transition occurs depending on the radiative polarization states. For the pristine monolayer, its out-of-plane polarization is tunable by an in-plane electric field, and the conducting states of the ferroelectric nanotube can thus be tuned between metallic and insulating states via axial electric means. Using α-In2Se3 as an example, our first-principles density functional theory calculations and nonequilibrium Green's function formalism confirm the feasibility of the TER mechanism and indicate an ultrahigh TER ratio that exceeds 9.9 × 1010% of the proposed nanotube ferroelectric tunnel junctions. Our findings provide a promising approach based on simple homogeneous structures for high density ferroelectric microelectric devices with excellent ON/OFF performance.

Enhanced tunneling electroresistance through interfacial charge-modulated barrier in α-In2Se3-based ferroelectric tunnel junction

The manipulation of tunneling resistance is critical for ferroelectric tunnel junction (FTJ) devices. In this work, we propose a mechanism to manipulate tunneling resistance through interfacial charge-modulated barrier in two-dimensional (2D) n-type semiconductor/ferroelectric FTJs. Driven by ferroelectric reversal, different effective tunneling barriers are realized by the depletion or accumulation of electrons near the n-type semiconductor surface in such devices. Thus, the tunneling resistance in FTJs undergoes significant changes for different polarization orientations, resulting in a giant tunneling electroresistance (TER) effect. To illustrate this idea, we construct 2D FTJs based on n-InSe/α-In2Se3 van der Waals (vdW) heterostructures. Based on the electronic transport calculations, it is found that TER ratio can reach 4.20 × 103% in the designed FTJs. The physical origin of the giant TER effect is verified through analysis of the effective potential energy of the n-InSe/α-In2Se3 vdW heterostructures and the real-space transmission eigenstates of the designed FTJs. This work contributes to the knowledge of carrier tunneling mechanisms at the interface of semiconductor/In2Se3 vdW heterostructures, and providing a significant insight into the TER effect of this FTJ systems, also presenting an alternative approach for the design of FTJ-based devices.

Realizing tunneling electroresistance effect in the Au/h-BN/In2Se3/Au vertical ferroelectric tunnel junction.

Two-dimensional (2D) ferroelectric tunnel junctions (FTJs) have great potential in the design of non-volatile memory devices due to the tunneling electroresistance (TER) effect and the fact that it is not constrained by critical thickness. Incorporation of 2D ferroelectric materials in realistic FTJs inevitably involves the contacts to the traditional three-dimensional (3D) metals. However, how to design the FTJs by combining the 2D ferroelectric materials with the 3D metals still needs to be studied. In this work, we design a vertical 3D FTJ by adopting the 3D metal Au as the left and right electrodes and the 2D ferroelectric material In2Se3 together with h-BN as the central scattering region. By density functional theory combined with the non-equilibrium Green's function (NEGF) method, we demonstrate that the h-BN intercalation with a large bandgap plays the role of good "insulator," which breaks the symmetry of the left and right electrodes. As a result, we obtain the TER ratio of about 170%, and it can be further improved to about 1200% if two layers of In2Se3 (2L-In2Se3) are adopted as the tunneling barrier layer. Our results provide another way for the design and application of ferroelectric memory devices based on 2D ferroelectric materials.

Electrodes as the protagonists in composite barrier Ferroelectric Tunnel Junctions

The role of electrodes in composite barrier Ferroelectric Tunnel Junctions (FTJs) is investigated for the systems (//Pt/STO/BTO/SRO, //Pt/STO/BTO/Pt, //SRO/STO/BTO/SRO and //SRO/STO/BTO/Pt). The tunneling current is controlled by the potential drop in the accumulation and depletion region in the electrodes which depends on the ratio of their screening length to permittivity (δ/). The Tunneling electro resistance ratio (TER) becomes significant for bias potential wherein the screening charge density remains negative causing the pull-down of the barrier towards the Fermi level and an increase in the tunneling current. Among the studied systems //Pt/20Å STO/24Ǻ BTO/SRO system with an active device length of 7.6 nm is found to have a current density of 3.38 × 104 A cm−2 and 0.22 A cm−2 in the ON and OFF state and an absolute TER of around 1.52 × 105% at the bias of 0.77 V conform to the necessary conditions of efficient application in memory devices.

Greatly enhanced tunneling electroresistance in ferroelectric tunnel junctions with a double barrier design

We propose that the double barrier effect is expected to enhance the tunneling electroresistance (TER) in the ferroelectric tunnel junctions (FTJs). To demonstrate the feasibility of this mechanism, we design a model structure of Pt/BaTiO3/LaAlO3/Pt/BaTiO3/LaAlO3/Pt double barrier ferroelectric tunnel junction (DB-FTJ), which can be considered as two identical Pt/BaTiO3/LaAlO3/Pt single barrier ferroelectric tunnel junctions (SB-FTJs) connected in series. Based on density functional calculation, we obtain the giant TER ratio of 2.210 × 108% in the DB-FTJ, which is at least three orders of magnitude larger than that of the SB-FTJs of Pt/BaTiO3/LaAlO3/Pt, together with an ultra-low resistance area product (0.093 KΩμm2) in the high conductance state of the DB-FTJ. Moreover, it is possible to control the direction of polarization of the two single ferroelectric barriers separately and thus four resistance states can be achieved, making DB-FTJs promising as multi-state memory devices.

Parametric simulations of composite barrier FTJs under external bias at room temperature

A study on a parametrized model of a composite barrier ferroelectric tunneling junction (FTJ), three-interface system with a non-polar dielectric layer, under an external bias voltage, Va, and at room temperature, using Finite Element Method-based simulations, has been performed. The approach involves the Thomas–Fermi model assuming incomplete screening of polarization charges for building the energy barrier profile, and numerically simulates the electron transport through the barrier by bias-voltage-dependent tunneling, using Tsu-Esaki formulation. That naturally includes the temperature dependent contributions to the total current density. The tunneling electroresistance ratio (TER) and current densities are computed considering variations of a large set of parameters that describe the composite barrier system in realistic physical range of values with respect to a reference (prototypical) system. In this study, the parametric simulations were performed starting from selected data reported on the SrRuO3/SrTiO3/BaTiO3/SrRuO3 heterostructure. The most important results of our work can be stated as follows: (i) The simulations prove to be a reliable approach when we are interested in the prediction of FTJ characteristics at temperatures close to 300 K, and (ii) We show that several configurations with large TER values can be predicted, but at the expense of low current densities in the ON state. We suggest that the results may be useful for assessing the FTJ performances at ambient temperature, as well as to design preoptimized FTJs by using different combinations of materials to comply with a set of properties of a specific model.

Enhanced tunneling electroresistance effect in Pt/BiAlO3/Pt ferroelectric tunnel junctions by a graphene interlayer

Realizing a large tunneling electroresistance (TER) effect with a low ON-state resistance-area product (RAP) is essential for the applications of ferroelectric tunnel junctions (FTJs) in information storage. Herein, taking Pt/BiAlO3/Pt (Pt/BAO/Pt) FTJs as examples, we theoretically demonstrate that a giant TER ratio of about 1458%, which is comparable to most van der Waals tunnel junctions, can be achieved by switching the electric polarization of ferroelectric BAO(0001) barrier due to the reversible metallization of ferroelectric in conjunction with the Schottky barrier. More interestingly, with the effective modulation on barrier height and width via polarization reversal, an enhanced TER effect close to 104% can be obtained by inserting a graphene monolayer into right (or left) Pt/BAO interface of the FTJs and the writing endurance of the FTJ memories is expected to be significantly improved. Furthermore, the calculated ON-state RAPs in all three FTJ devices are not more than 100 Ω μm2. These fascinating findings suggest that the proposed BAO-based FTJs hold great potential for designing next-generation nanoscale high-density and low-power nonvolatile memories with excellent performance.

Implementation of high-performance and high-yield nanoscale hafnium zirconium oxide based ferroelectric tunnel junction devices on 300 mm wafer platform

In this work, hafnium zirconium oxide (HZO)-based 100 × 100 nm2 ferroelectric tunnel junction (FTJ) devices were implemented on a 300 mm wafer platform, using a baseline 65 nm CMOS process technology. FTJs consisting of TiN/HZO/TiN were integrated in between metal 1 (M1) and via 1 (V1) layers. Cross-sectional transmission electron microscopy and energy dispersive x-ray spectroscopy analysis confirmed the targeted thickness and composition of the FTJ film stack, while grazing incidence, in-plane x-ray diffraction analysis demonstrated the presence of orthorhombic phase Pca21 responsible for ferroelectric polarization observed in HZO films. Current measurement, as a function of voltage for both up- and down-polarization states, yielded a tunneling electroresistance (TER) ratio of 2.28. The device TER ratio and endurance behavior were further optimized by insertion of thin Al2O3 tunnel barrier layer between the bottom electrode (TiN) and ferroelectric switching layer (HZO) by tuning the band offset between HZO and TiN, facilitating on-state tunneling conduction and creating an additional barrier layer in off-state current conduction path. Investigation of current transport mechanism showed that the current in these FTJ devices is dominated by direct tunneling at low electric field (E < 0.4 MV/cm) and by Fowler–Nordheim (F–N) tunneling at high electric field (E > 0.4 MV/cm). The modified FTJ device stack (TiN/Al2O3/HZO/TiN) demonstrated an enhanced TER ratio of ∼5 (2.2× improvement) and endurance up to 106 switching cycles. Write voltage and pulse width dependent trade-off characteristics between TER ratio and maximum endurance cycles (Nc) were established that enabled optimal balance of FTJ switching metrics. The FTJ memory cells also showed multi-level-cell characteristics, i.e., 2 bits/cell storage capability. Based on full 300 mm wafer statistics, a switching yield of >80% was achieved for fabricated FTJ devices demonstrating robustness of fabrication and programming approach used for FTJ performance optimization. The realization of CMOS-compatible nanoscale FTJ devices on 300 mm wafer platform demonstrates the promising potential of high-volume large-scale industrial implementation of FTJ devices for various nonvolatile memory applications.

Evaluation of HfO-Based Ferroelectric Resonant Tunnel Junction by Band Engineering

The HfO2-based ferroelectric (FE) tunnel junction (FTJ) and its crossbar array are promising for energy-efficient computing. However, its limited ON- current (JON) and ON/OFF tunneling electroresistance (TER) ratio become a bottleneck for large array circuits. We theoretically propose using a low-barrier Ta2O5 dielectric to enhance the device asymmetry, instead of SiO2 or Al2O3. Through resonant band engineering by inserting Ta2O5 between two FE HfO2 barriers, both JON and TER ratio are enhanced by several orders of magnitude, while a good retention is maintained benefiting from high permittivity of Ta2O5; besides, high current rectification ratio and negative differential resistance are observed. These abundant physical effects in HfO2/Ta2O5/HfO2 based MFIFM resonant FTJ may enable selector-less crossbar.

Enhanced tunneling electroresistance effect by designing interfacial ferroelectric polarization in multiferroic tunnel junctions

Due to the long electrical screening length of an insulator, changes in local ferroelectric (FE) polarization can cause significant electrostatic potential drops or rises across the whole insulating region, which can be designed to enhance the tunneling electroresistance (TER) effect. First-principles calculations of ${\mathrm{Co}}_{2}\mathrm{MnSi}/{\mathrm{BaTiO}}_{3}/{\mathrm{SrRuO}}_{3}$ multiferroic tunnel junctions predict a unique local FE polarization at the MnSi-${\mathrm{TiO}}_{2}$ interface, which is giant (tiny) in the right-polarized (left-polarized) state. For the right-polarized state, the large interfacial FE polarization greatly lowers the FE barrier height, making it close to zero. However, for the left-polarized state, because its band edges near the MnSi-${\mathrm{TiO}}_{2}$ interface are usually below the Fermi level, the tiny interfacial FE polarization has a weak effect on the electrostatic potential, maintaining a sizable barrier height. This FE-controlled barrier height produces an optimistic TER ratio of up to $1.1\ifmmode\times\else\texttimes\fi{}{10}^{3}$. Even if the large interface polarization is unexpectedly fixed, the TER ratio remains ultrahigh, increasing the fault tolerance of the interface-enhanced TER effect in applications.

Giant Tunneling Electroresistance Induced by Interfacial Doping in Pt/BaTiO3/Pt Ferroelectric Tunnel Junctions

Ferroelectric tunnel junctions (FTJs) are very promising candidates for nonvolatile memory devices and a large tunneling electroresistance (TER) ratio is essential for their high performance. This work intends to achieve large TER ratio by interfacial doping in FTJs by taking ${\mathrm{Pt}/\mathrm{Ba}\mathrm{Ti}\mathrm{O}}_{3}/\mathrm{Pt}$ tunnel junctions as an example. By introducing Na (or $\mathrm{Li}$) substitutions for $\mathrm{Ti}$ atoms at the right interface, the resultant strong Coulomb repulsion from the negatively charged ${\mathrm{Na}\mathrm{O}}_{2}$ interface pushes the electrons to higher energy in an increasing manner from left to right in the whole ${\mathrm{Ba}\mathrm{Ti}\mathrm{O}}_{3}$ barrier, which leads to rapidly increasing potential energy profile and partial metallization close to the right interface in the left polarization state. However, in the right polarization state, since the right ferroelectric polarization produces a decreasing potential energy profile from left to right, although the ${\mathrm{Na}\mathrm{O}}_{2}$ interface also pushes the electrons to much higher energy and the slope of the potential energy profile changes from negative to positive, the final slope of the potential energy profile is much less steeper and the Fermi level is always inside the band gap, leading to a completely insulating state. The substantially different distributions of the electrostatic potential energy profile in the two polarization states lead to great differences in the transport properties. Based on density-functional-theory calculations, a TER ratio up to ${10}^{5}$% is achieved. The results indicate that a negatively charged interface based on interfacial substitution is a promising method for obtaining a large TER ratio in FTJs, and thus will have implications for the further understanding and design of high-performance FTJs.

Giant tunneling magnetoresistance and electroresistance in α−In2Se3 -based van der Waals multiferroic tunnel junctions

In the multiferroic tunnel junction (MFTJ) composed of ferromagnetic and ferroelectric materials, the tunneling electroresistance (TER) coexists with the tunneling magnetoresistance (TMR), making it an ideal platform for designing multifunctional electronic devices. Recently, the rapid development of van der Waals (vdW) materials opened up a new avenue of MFTJ due to their atomic thickness and significance in miniaturizing device sizes. Here by employing the nonequilibrium Green's function combined with density-functional theory, we systemically study the spin-dependent electronic transport properties of ${\mathrm{Fe}}_{3}{\mathrm{GeTe}}_{2}$ (FGT)/bilayer $\ensuremath{\alpha}\ensuremath{-}{\mathrm{In}}_{2}{\mathrm{Se}}_{3}$ (BIS)/FGT vdW MFTJs. We find that the MFTJ can form multiple nonvolatile resistance states by altering the polarization orientation of the ferroelectric barrier BIS and the magnetization alignment of the two ferromagnetic FGT electrodes, with a maximum TMR (TER) ratio up to $1.1\ifmmode\times\else\texttimes\fi{}{10}^{7}$% (744%). The TER ratio can be further increased to 1868% by using left and right symmetrical copper electrodes. More interestingly, the perfect spin filtering effect can be realized in our MFTJs and the spin current can be controlled by the sign of bias voltages, suggesting a promising route for spin valves that can flexibly manipulate spin currents. Our results demonstrate that giant TMR, large TER, as well as a tunable spin filter can coexist in one system, and that the feasible tunability of such kind of vdW MFTJs is beneficial in designing next-generation logic and memory devices.

Strain-tunable in-plane ferroelectricity and lateral tunnel junction in monolayer group-IV monochalcogenides

2D ferroelectric materials are promising for designing low-dimensional memory devices. Here, we explore strain-tunable ferroelectric properties of group-IV monochalcogenides MX (M=Ge, Sn; X=S, Se) and their potential application in lateral field tunnel junction devices. We find that these monolayers have in-plane ferroelectricity, with their ferroelectric parameters being on par with other known 2D ferroelectric materials. Among SnSe, SnS, GeSe, and GeS, we find that GeS has the best ferroelectric parameters for device applications, which can be improved further by applying uniaxial tensile strain. We use the calculated ferroelectric properties of these materials to study the tunneling electroresistance (TER) of a 4 nm device based on a lateral ferroelectric tunnel junction. We find a substantial TER ratio of 103–105 in the devices based on these materials, which can be further improved up to a factor of 40 on the application of tensile strain.

Domain-wall induced giant tunneling electroresistance effect in two-dimensional Graphene/In2Se3 ferroelectric tunnel junctions

Ferroelectric tunnel junctions (FTJs) are very promising as a new type of nonvolatile memory devices due to the tunneling electroresistance (TER) effect. In recent years, with the rise of two-dimensional (2D) materials, 2D ferroelectrics and their application in FTJs have attracted intensive attention, with the advantage of greatly reducing the FTJ based memory device sizes, as demanded by the ongoing device minituriazation in modern electronic circuits. However, all present schemes for realizing giant TER ratio with 2D FTJs are based on the polarization reversal of the whole ferroelectric layer upon an electrical field. In this work, we explore the quantum transport properties of the 2D FTJs with the partial reversal of polarization, namely, the formation of domain walls (DWs) by constructing two kinds of FTJs. One is in a uniform-polarization state and the other one is a state with domain walls. Structural relaxation confirms the stability of the domain-wall state. By quantum transport calculation, we obtain a TER ratio as high as 2.75 × 10 4 % . Further analysis of the electronic structure shows that there is charge accumulation or charge depletion at the two DWs. Such asymmetric interface polarization charges result in a built-in electrical field and thus affect the distribution of the effective potential along the transport direction. This leads to partial metal-insulator transition around the DWs and finally the giant TER ratio. Our results indicate that DWs may greatly affect the quantum transport and provide a new mechanism for realizing giant TER effect in 2D FTJs.

Amorphous ZrO2 Tunnel Junction Memristor With a Tunneling Electroresistance Ratio Above 400

An amorphous ZrO2 based tunneling junction memristor (TJM) with a tunneling electroresistance (TER) ratio above 400 is demonstrated. It is attributed to the modulation of tunneling barrier width induced by the accumulation of oxygen vacancies ( $V_{O}^{+}$ ) and negative charges near the ZrO2/semiconductor interface. The ferroelectric-like behaviors attributed to the voltage-modulated switching of the dipoles consisting of $V_{O}^{+}$ and negative charges in ZrO2 are characterized by a polarization-voltage test. The ZrO2 TJM achieves a TER ratio above 400 under 2.5/–1.5 V at 100 ns write/erase pulse condition, over 104 cycles program/erase endurance, and >104 s data retention.

Effect of Insertion of Dielectric Layer on the Performance of Hafnia Ferroelectric Devices

Hafnia-based ferroelectric (FE) devices have attracted significant attention as nonvolatile memory devices due to their compatibility with complementary metal–oxide–semiconductor processes. Among them, the FE tunnel junction (FTJ) has been considered as the next-generation of nonvolatile memory devices owing to its neuromorphic characteristics and nondestructive read operation as well as the high-density integration. However, degradation of ferroelectricity in a thin hafnia film causes a reduced tunneling electroresistance (TER) ratio. In this work, we inserted a TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> layer into the metal–FE–metal capacitor to provide an asymmetric structure for FTJ operations and recorded the enhanced remnant polarization with enhanced ferroelectricity. In this study, a high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2{P}_{r}$ </tex-math></inline-formula> value of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$44.4~\mu \text{C}$ </tex-math></inline-formula> /cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and a notable TER ratio of 11.6 were observed for 6-nm thick hafnia films with 1-nm thick TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> films.

Hafnia-Based Double-Layer Ferroelectric Tunnel Junctions as Artificial Synapses for Neuromorphic Computing

Ferroelectric tunnel junctions (FTJ) based on hafnium zirconium oxide (Hf1-xZrxO2; HZO) are a promising candidate for future applications, such as low-power memories and neuromorphic computing. The tunneling electroresistance (TER) is tunable through the polarization state of the HZO film. To circumvent the challenge of fabricating thin ferroelectric HZO layers in the tunneling range of 1-3 nm range, ferroelectric/dielectric double layer sandwiched between two symmetric metal electrodes are used. Due to the decoupling of the ferroelectric polarization storage layer and a dielectric tunneling layer with a higher bandgap, a significant TER ratio between the two polarization states is obtained. By exploiting previously reported switching behaviour and the gradual tunability of the resistance, FTJs can be used as potential candidates for the emulation of synapses for neuromorphic computing in spiking neural networks. The implementation of two major components of a synapse are shown: long term depression/potentiation by varying the amplitude/width/number of voltage pulses applied to the artificial FTJ synapse, and spike-timing-dependent-plasticity curves by applying time-delayed voltages at each electrode. These experimental findings show the potential of spiking neural networks and neuromorphic computing that can be implemented with hafnia-based FTJs.