Varactor Tuning Research Articles

Compact frequency‐reconfigurable circular patch antenna with varactor diode: Design, tuning, and compactness optimization

AbstractIn this study, a frequency‐reconfigurable circular patch antenna with a varactor diode has been presented. The proposed antenna has been designed and investigated in four steps: circular patch antenna (Antenna 1), antenna with double slots (Antenna 2), antenna with quad slots (Antenna 3), and antenna with varactor diode (Antenna 4). The proposed antenna has been made compact with rectangular slots and a hyperabrupt junction tuning varactor diode (SMV1249‐079LF). The proposed antenna has been designed and produced in 32 × 32 × 0.64 mm3 dimensions, approximately 80% minimized compared to a microstrip circular patch antenna operating at 850 MHZ resonance frequency. This frequency‐reconfigurable antenna can perform between the range of 0.85–1.3 GHz frequency with 0–3 V DC voltage tuning of the varactor diode. So, using with the varactor diode, the proposed antenna has obtained a 53% tuning range between 0.85 and 1.3 GHz frequencies. This study offers a different antenna design, compactness, and high tuning ratio compared to previous studies. This frequency reconfigurable antenna can be preferred with its wideband structure in different communications areas and wireless energy transfer systems.

Design of low power and low phase noise LC-VCO for Bluetooth/WLAN applications

The proposed Inductor-Capacitor Voltage-Controlled Oscillator (LC-VCO) prototype design generates 2.45 GHz to 4.58 GHz of frequency using the Cadence UMC 180 nm process with a 1.8V supply. This architecture carried a new viewpoint on tank design put forth by enhancing the varactor tuning. Here, the circuit employs a CMOS differential cross-coupled pair, and rail-to-rail DC biasing achieves a higher voltage swing. Simulation analysis parameters are measured at 2.45 GHz frequency, phase noise is −123.5 dBc/1 MHz offset, power is 3.5 mW, jitter is 0.232 fsec, and it occupies 0.118 μm2 layout area. Additionally, the simulations have been extended for analysis under Process Voltage and Temperature Corners, Monte-Carlo, and Worst-Case Corners. This study obtained a better FoM of -200.94 dBc/Hz. The simulation results and FoM of the proposed design show a considerably improved than state-of-the-art framework. This LC-VCO circuit study will be suitable for implementing the sub-6 GHz charge pump phase-locked loops (CP-PLLs) system for 5G applications.

A 2.2–3.6 GHz CMOS Reconfigurable Fourth-Order Bandpass Filter With Compact Size and High Selectivity Using Transformer-Type Resonators

A compact reconfigurable CMOS bandpass filter (BPF) with high selectivity is proposed using transformer-type resonators in this article. The transformer-type resonator is constructed by a transformer loaded with parallel varactors for frequency tuning, and two varactors are then added across primary wind and secondary wind for coupling tuning. With the transformer-type structure, one resonator is formed inside another resonator, thus fully utilizing the chip area and resulting in a miniaturized structure. Magnetic and electrical couplings are formed within the transformer-type resonator and facilitate the bandwidth (BW) tuning. The quality factor ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$Q$ </tex-math></inline-formula> ) of each resonator is improved by cross-coupled negative resistance structure. Meanwhile, two pairs of transformer-type resonators are placed side-by-side and naturally form a quadruplet structure; as a result, two transmission zeros (TZs) are introduced at each side of the passband thus significantly improving the selectivity and stopband rejection of the BPF. The proposed tunable on-chip BPF is manufactured by a commercial 55 nm bulk CMOS technology with a core area of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.48 \times 0.54$ </tex-math></inline-formula> mm2. The filter center frequency (CF) can be tuned from 2.2 to 3.6 GHz, while the 3 dB fractional BW (FBW) can be tuned from 14% to 33%. The shape factor of the proposed filter is 1.4–1.9.

Left-Handed Characteristics Tunable C-Shaped Varactor Loaded Textile Metamaterial for Microwave Applications

This paper presents a textile-based C-shaped split-ring resonators (SRR) metamaterial (MTM) unit cells with an electrical tunability function. The proposed MTM was composed of two symmetrical C-shaped SRR combined with a central diagonal metal bar, whereas the RF varactor diode is placed on the backside of the splitted ground plane. Stopband behavior of single and array MTM unit cells were analyzed while the achieved negative index physical characteristics were widely studies. Though four different MTM arrays (i.e., 1 × 1, 1 × 2, 2 × 1, and 2 × 2) were analyzed in simulation, a 2 × 2-unit cell array was chosen to fabricate, and it was further undergone experimental validation. This proposed tunable MTM exhibits double negative (DNG)/left-handed properties with an average bandwidth of more than 2.8 GHz. Furthermore, attainable negative permittivity and negative permeability are within 2.66 to 9.59 GHz and within 2.77 to 15 GHz, respectively, at the frequency of interest (between 1 and 15 GHz). Moreover, the proposed tunable MTM also showed tunable transmission coefficient characteristics. The proposed electrically tunable textile MTM might function in a dynamic mode, making it suitable for a variety of microwave-wearable applications. A satisfactory agreement between simulations and experiments were achieved, demonstrating that the proposed MTM can operate over a wide bandwidth.

4.2\xa0K sensitivity-tunable radio frequency reflectometry of a physically defined p-channel silicon quantum dot

We demonstrate the measurement of p-channel silicon-on-insulator quantum dots at liquid helium temperatures by using a radio frequency (rf) reflectometry circuit comprising of two independently tunable GaAs varactors. This arrangement allows observing Coulomb diamonds at 4.2 K under nearly best matching condition and optimal signal-to-noise ratio. We also discuss the rf leakage induced by the presence of the large top gate in MOS nanostructures and its consequence on the efficiency of rf-reflectometry. These results open the way to fast and sensitive readout in multi-gate architectures, including multi qubit platforms.

A Frequency-Reconfigurable Microstrip Antenna with Constant Dipole-Like Radiation Patterns Using Single Bias, Triple Varactor Tuning with Reduced Complexity

This work proposes a novel frequency-reconfigurable circular patch antenna incorporated with a rectangular slot and a narrow slot capable of producing constant dipole-like radiation patterns. The antenna compactness is achieved with the integration of the rectangular slot defected ground structure (DGS) on the ground. The proposed antenna is able to perform continuous frequency tuning between 1.91 and 2.77 GHz with a frequency ratio of 1.5:1, in addition to stable dipole-like radiation patterns. The resonant frequency of the antenna is controlled by tuning a simple DC biasing network that consists of three RF varactor diodes located on the narrow slot DGS. Implementing the DC biasing network at the narrow slot DGS while maintaining the large slot DGS helps the antenna miniaturization and maintains the constant dipole-like radiation pattern over all frequency tuning range. The results are validated via simulations and experimental validations in terms of reflection coefficients and the radiation patterns. Measurements indicated that an impedance bandwidth of 85 MHz is featured for each tuned frequency band, with dipole-like patterns and an average gain of 1.57 dBi.

Reconfigurable Parametric Amplifications of Spoof Surface Plasmons.

Next‐generation inter‐chip communication requires ultrafast ultra‐compact interconnects. Designer plasmonics offers a possible route towards this goal. Further development of the plasmonic technique to circuit applications requires the direct amplification of plasmonic signals on a compact platform. However, significant signal distortions and limited operational speeds prevent the application of traditional MOS‐based amplifiers to plasmonics. Up to day, the amplification of surface plasmons without phase distortion has remained a scientific challenge. In this work, the concept of parametric amplification (PA) is transplanted to the plasmonics and is realized experimentally an ultrathin reconfigurable PA using a spoof surface plasmon polariton (SSPP) waveguide integrated with tunable and nonlinear varactors. The measured parametric gain in the experiment can reach up to 9.14 dB within a short nonlinear propagation length, for example, six SSPP wavelengths, in excellent agreement with the theoretical prediction. By tuning the bias voltage of varactors, the phase‐matching condition can be precisely controlled over a broad frequency band, enabling the authors to realize the multi‐frequency PA of plasmonic signals. Measured phase responses confirm that the plasmonic parametric amplifier can significantly suppress the signal distortions as compared with the traditional MOS‐based amplifier, which is a property highly desired for ultrafast wireless communication systems and integrated circuits.

Design of Dual-Delay-Path Low-Power VCRO with I-MOS Varactor Tuning

This paper presents a novel low-power four-stage voltage controlled ring oscillator (VCRO) designed in the TSMC 180 nm CMOS technology. Each stage in the proposed VCRO consists of a differential delay cell. Output frequency tuning is controlled by the I-MOS varactor connected at the output of each delay stage. Different performance parameters, including tuning range, power consumption, phase noise and figure of merit, have been obtained in the TSMC 180 nm CMOS technology. Results show that the output oscillation frequency of VCRO is tunable from 0.545 to 1.195 GHz by varying the drain/source voltage (Vids ) from 0.6 to 1.8 V with a supply voltage (Vdd ) of 1.8 V. Furthermore, it provides a wide tuning range from 0.152 to 1.903 GHz with the variation in Vdd from 1 to 3 V with different I-MOS widths of 0.5, 1, 2 and 4 µm. Furthermore, effects of change in Vids from 0.8 to 1.8 V with Vdd variations from 1 to 3 V have been evaluated with I-MOS varactor width (W) of 2 µm. Frequency range from 0.170 to 1.451 GHz has been achieved for this tuning method. The proposed VCRO exhibits the phase noise of −100.45 dBc/Hz @1 MHz and −96.01 dBc/Hz @0.6 MHz from the centre frequency with power consumption 0.003 to 3.165 mW with a change in Vdd from 1.8 to 3.0 V. The figure of merit (FoM) of the proposed VCRO is 161.77dBc/Hz.

Design of power-efficient CMOS based oscillator circuit with varactor tuning control

This paper presents a low-power, wide tuning range CMOS voltage-controlled oscillator with MCML (MOS current mode logic) differential delay cell. Voltage controlled oscillator (VCO) circuit is designed in TSMC 0.25 μm CMOS process. To achieve the broad frequency range concept of variable capacitance is employed in the proposed VCO circuit. Source/drain tuning voltage (Vtune) and body bias voltage (Vb) of I-MOS varactor are used to achieve variable capacitance at different I-MOS varactor widths (W). The dual control voltage of I-MOS varactor results in a tuning range from 0.528 GHz to 2.014 GHz. VCO's figure of merit (FoM) is 152.13 dBc/Hz with phase noise of −93.77 dBc/Hz at 1 MHz offset from the oscillation frequency. The proposed VCO dissipates maximum power of 3.127 mW.

Frequency‐tunable circularly polarized twin dual folded inverted‐L antenna with varactor‐loaded split‐ring resonator structures

SummaryThe design of a miniaturized frequency‐tunable circularly polarized twin dual folded inverted‐L antenna with varactor‐loaded split‐sing resonator structure is proposed in the paper. The design integrates two linearly polarized inverted‐L antenna elements with double‐folded arms and with a split‐ring resonator (SRR) structures on both sides. To improve the impedance matching and radiation characteristics the double‐folded structure plays a significant role. Although the use of SRRs to the dual inverted‐L antenna elements achieves compact volume, the antenna's radiation efficiency rapidly decreases around the SRR's resonant frequency. The decrease is avoided by employing a variable capacitance diode loaded on both SRR structures (dual folded inverted‐L antenna, VLSRR). The antenna structure is minimized to be about 66 mm in length, 10 mm width, and 1 mm in height (66 × 10 × 1 mm3). The configuration is simplified by using wave feeding. The better values are obtained between the theoretical calculations and simulated results, which validate the design concept and have a wide varactor tuning bandwidth. The simulated and measured results show that the proposed antennas resonate at multiband frequencies: Band 1 (3.28–3.70 GHz) with varactor tuning of 425 MHz; Band 2 (6.42–6.75GHz) with varactor tuning of 331 MHz; and Band 3 (13.75–14.21 GHz) with varactor tuning of 463 MHz, with the impedance bandwidth of 6%, VSWR &lt; 2, and 3‐dB axial ratio (AR) &lt; 3 across the entire operating bands.

A 0.35 μm CMOS mixed controlled crystal oscillator with low phase noise and wide tuning range

This paper presents a high-performance mixed controlled crystal oscillator. The digital-controlled part is based on a Pierce topology with switched-capacitor bank. Wide tuning range and high linearity are simultaneously achieved by combining discrete capacitors and a continuous voltage tuning varactor. The pull ability is around 99 ppm output frequency variation range. For noise reduction, the supply voltage of the mixed controlled crystal oscillator is regulated at 2.5 V by using on-chip low-drop regulators. The measured phase noise is −145 dBc/Hz at 1 kHz offset frequency by using a 40 MHz fundamental AT–cut crystal. The chip area is 3.6 mm2 for a 0.35 μm standard CMOS process with 3.3 V supply voltage and the power dissipation is 7 mW.

A Package Aware QLMVF Receiver Front End

This brief presents a 2.4 GHz receiver front end in the form of architecture of quadrature LNA-Mixer-VCO-filter (QLMVF) cell in 180 nm CMOS with split-transconductance amplifiers (TCAs). Instead of a single stack-current-reusing QLMV scheme, the proposed design employs two separate current reuse stages with a passive mixer to provide better flicker noise and linearity performance. A shunt-inductive input-match single-ended low noise amplifier (LNA) proposed with an improved package parasitic compensation through a simple varactor tuning. The quad-flat-no-leads (QFN) packaged receiver provides a measured maximum conversion gain of 40 dB, a noise figure (NF) of 10 dB, and a third-order input intercept point (IIP3) of -5 dBm with a spurious-free dynamic range (SFDR) of 60 dB. The front end consuming 2.7 mW of power from a 1.8 V supply and occupies an area of 1.5 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

Varactor를 이용한 60 GHz self-healing 영상 제거 수신기

본 논문에서는 varactor를 이용한 60 GHz self-healing 영상 제거 수신기를 제안한다. 기존 방식은 varactor 바이어스에 따라 이득 감소가 불가피하게 일어났고 이득 및 위상 불일치를 개선하고자 varactor 바이어스도 불규칙한 경향을 보여 self-healing으로 구현하기 어려웠다. 본 논문에서는 혼합기를 저항성 혼합기로 대체하여 주파수에 따른 입력 임피던스 변화를 줄였고 varactor tuning 회로의 위상 보상에 초점을 두어 설계를 수행하였다. 제안된 수신기는 상용 0.15 μm GaAs pHEMT 공정을 이용하여 MMIC로 제작되었으며 제안된 구조는 varator tuning시 이득 감소를 0.3 dB 이내로 최소화 하면서 56-66 GHz에서 변환이득 7.1-13.9 dB 및 20 dB 이상의 영상 제거비를 나타내었다. 주파수에 따른 varactor tuning 바이어스도 주파수 구간에 따라 총 3개의 바이어스로 조절 가능하게 되어 self-healing 구현이 보다 용이해졌다.

A 17.6-to-24.3 GHz −193.3 dB figure-of-merit LC voltage-controlled oscillator using layout floorplan optimization technique for Q-factor enhancement

This paper presents a 20 GHz low-phase-noise low-power LC voltage-controlled oscillator (VCO). It adopts a fully differential tuning varactor, a coarse and a fine capacitor array to cover wide tuning range with a small tuning gain to reduce the amplitude-to-phase noise conversion. A layout floorplan is proposed to reduce the impact of the parasitic resistance of the interconnect and thus improve the Q of the LC tank in the VCO. Hence, the phase noise can be reduced without increasing power consumption. Post-layout simulation results show that the VCO with the proposed layout floorplan can get the phase noise reduction from 1.6 to 3.3 dB compared to the VCO with other layout floorplans in the case of the same power consumption. Implemented in a 65 nm CMOS process, the prototype achieves 17.6–24.3 GHz frequency range, −124 dBc/Hz@10 MHz phase noise at 20.1 GHz carrier frequency, 4.9 mW DC power, and −193.3 dB figure-of-merit.

Novel Tunable Isolation Network Used in Ring-Type Single-to-Balanced, Power-Dividing, and Single-Ended Filter With Arbitrary Power-Division Ratios

In this article, a novel tunable isolation network and a novel ring-type reconfigurable single-to-balanced (SE-BAL), power-dividing (PD), and single-to-single-ended (SE) bandpass filter is proposed. The tunable isolation network consists of a simple $\pi $ -type resistive network with tunable varactors, while the proposed filter consists of three ring-type stepped impedance resonators (SIRs) connected by varactors in between. By simply combining the proposed tunable isolation network and the proposed ring-type reconfigurable filter, it can achieve multiple reconfigurable functions among SE-BAL filtering, PD filtering, and conventional SE filtering with fully matched three ports, arbitrary power-division ratios (PDRs), high output isolations, and excellent amplitude and phase balance, in addition to continuous frequency and independent bandwidth tuning. The proposed filter is demonstrated using the microstrip line technology. The measured results show that the SE-BAL, PD, and two SE filtering functions can continuously cover the frequency ranges of 1.03–1.61, 1.01–1.53, 1.03–1.56, and 1.06–1.48 GHz with −1-dB bandwidth tuning of 35–80, 50–140, 60–130, and 70–140 MHz, respectively; the 1-, 3-, and 5-dB PDRs have been demonstrated for both SE-BAL and PD filtering modes. The measured output return losses and isolation are better than 19 and 18 dB, respectively, for SE-BAL filtering mode and 20 and 16 dB, respectively, for PD filtering mode. Good agreement is obtained between the simulated and measured results.

Design of a SIW Variable Phase Shifter for Beam Steering Antenna Systems

This paper proposes a new beam steering antenna system consisting of two variable reflection-type phase shifters, a 3 dB coupler, and a 90° phase transition. The entire structure is designed and fabricated on a single layer of substrate integrated waveguide (SIW), which makes it a low loss and low-profile antenna system. Surface mount tuning varactor diodes are chosen as electrical phase control elements. By changing the biasing voltage of the varactor diodes in the phase shifter circuits, the far-field radiation pattern of the antenna steers from −25° to 25°. The system has a reflection coefficient better than −10 dB for a 2 GHz bandwidth centered at 17 GHz, a directive radiation pattern with a maximum of 10.7 dB gain at the mid-band frequency, and cross polarization better than 20 dB. A prototype is fabricated and measured for design verification. The measured far-field radiation patterns, co and cross polarization, and the reflection coefficient of the antenna system agree with simulated results.

Design of Reconfigurable Inductorless RF VCO in 130 nm CMOS

The need for low-power and low-cost connected devices supporting several communication standards continues to increase with the rising demand in Internet of Things (IoT) applications. This paper presents a reconfigurable inductorless radiofrequency (RF) voltage-controlled oscillator (VCO) capable to work across various frequency bands with a low area. This VCO has an inductor-capacitor (LC) topology though using an active inductor based on a gyrator-C structure. It uses n-bits controlled CMOS inverters for coarse frequency tuning and diode varactor for fine frequency tuning. Implemented in 130-nm CMOS technology, the VCO can cover a frequency tuning of 1.22–2.6 GHz. It achieves a phase noise of – 87 dBc/Hz at 1 MHz with a power consumption of 4 mW from 1.1-V supply. The active die area is only 54 × 59 μm2.

A dual‐mode tunable bandpass filter for GSM, UMTS, WiFi, and WiMAX standards applications

SummaryThis paper presents a dual‐mode tunable bandpass filter (BPF) for global system for mobile communication, universal mobile telecommunications system, wireless fidelity, and worldwide interoperability for microwave access standard applications. The proposed filter consists of a stepped‐impedance resonator, single resonator, and coupled line, which are loaded with varactors. The center frequency and bandwidth of the proposed filter can be tuned with tuning varactors. Furthermore, the measurement results show that the BPF can be tuned over the frequency range of 1.8 to 2.5 GHz. Moreover, the bandwidth can be changed at each certain frequency. Furthermore, using PIN diodes, a bandstop filter is added to the tunable BPF to reduce the out‐of‐band frequencies around the desired frequencies. The values of LC equivalent circuits are calculated, and the results are compared with those obtained from the layout of the proposed structure. Finally, the measurement results justify the simulation results.

Design of a Tunable Anti-Aliasing Filter for Multistandard RF Subsampling GNSS Receivers

A novel reconfigurable dual-bandpass filter with independently controlled center frequencies and fixed bandwidths is presented. It was designed to be integrated as a radio frequency anti-aliasing filter in a reconfigurable multi-bandpass sampling global navigation satellite system (GNSS) receiver. The center frequency tuning ranges are 1190–1210 MHz and 1560–1590 MHz in the lower and the upper L-bands, respectively, with a fixed bandwidths of 35 MHz. Varactor tuning technology associated with open loop stub loaded resonator microstrip topology were investigated to achieve these goals. The proposed dual-bandpass filter design showed the agility to independently control the center frequencies in the two L-bands and to deactivate one of the passbands. Furthermore, it shows enough flexibility to adapt to the deployment of new GNSS standards specifications. It exhibits on all the tuning ranges an insertion and a return losses of less than 4.5 dB and more than 10 dB, respectively.

Real-Time Amplifier Load-Impedance Optimization for Adaptive Radar Transmitters Using a Nonlinear Tunable Varactor Matching Network

Future radar transmitters will need to be able to quickly reconfigure their radio-frequency circuitry to change operating frequency and spectral output while maintaining high power-added efficiency (PAE). In this paper, fast tuning of a tunable-varactor matching network is demonstrated to optimize the PAE while meeting requirements on the adjacent-channel power ratio. The tunable varactor network, a first-level prototype of a tunable radar amplifier matching network, incurs nonlinear performance, providing possible challenges to measurement accuracy. To address the issue of nonlinearities while maintaining ability to quickly reconfigure, the tunable-varactor network is characterized at different input power levels to allow useful performance in its nonlinear regime. The power-dependent characterization is used in an algorithm for optimization of an amplifier's PAE, by looking up the matching network characterization performed at the power estimated to be output by the amplifier. Measurement results show that this characterization enhances the consistency of the optimized PAE. Using the tunable varactor network reduces the optimization time to one-fourth of the time required when using the algorithm with a traditional mechanical load-pull tuner.