Tung's Model Research Articles

Annealing effect on the barrier characteristics and interface properties of Au/Pt/Ti/n-InAlAs Schottky contacts

A comprehensive study of the annealing effect (300–400 °С) on the electrical properties, morphology and chemical composition of the Au/Pt/Ti/n-InAlAs interface (Schottky contact) is carried out. It is shown that the Schottky contact pre-annealing during the formation or primary short (∼1 min) annealing significantly increases the barrier height to the standard 0.68–0.7 eV with an ideality factor close to 1.1 due to the formation of a homogeneous amorphous TiAs layer with a small metallic (elemental) indium content. A further annealing at temperatures 300–350 °С for up to 20 min does not lead to significant changes in the morphology and electrical parameters of the Schottky contact. The annealing at the temperature of 400 °С (∼10 min) leads to an increase in the barrier height and the ideality factor to the values of 0.73 and 1.3, respectively. In this case, the formation of an about 20 nm thick TiAs layer and indium clusters shaped as a pyramids at the Ti/InAlAs interface is also observed. Analysis of the temperature dependences of Schottky barrier parameters within the Tung model showed that only structural changes at the interface after the 400 °С annealing lead to a significant increase in the Ti/InAlAs Schottky contact homogeneity, reducing the density of local regions with a lowered barrier height.

Image Force Corrections to Tung’s Inhomogeneous Schottky Barrier Model

The popular Tung model for Schottky barrier inhomogeneity considers how low-barrier patches (embedded in a high barrier background) impact the diode current. However, Tung's model fails to account for the image-force effect. We analyze how the image force alters the current through an inhomogeneous barrier and find that, in some circumstances, it will smooth the barrier, such that the current will effectively be that of a homogeneous diode. We also show that for a distribution of defect barriers and/or sizes, the diode current can be intermediate between that of a homogeneous diode and a diode dominated by the low-barrier patches. We calculate the parameter values associated with this transitional region. A survey of existing literature applications of Tung's model shows that many diodes are actually operating in this transition region, where Tung's equations are in error. We provide the corrected equations for this case and demonstrate their ability to model practical diode characteristics.

Theoretical and experimental investigations of barrier height inhomogeneities in poly-Si/4H-SiC heterojunction diodes

p-Si/4H-SiC heterojunction diodes are realized by sputter-deposition of the Si top contact and subsequent post-deposition annealing at either 900 °C or 1000 °C. The high Schottky barrier height (SBH) of this junction architecture of around 1.65 V is ideal to analyze SBH inhomogeneities present in most Schottky- and heterojunctions. Current-voltage-temperature (IVT) and capacitance-voltage-temperature (CVT) measurements are conducted in a wide temperature range from 60 K up to 460 K while applying standard techniques for SBH extraction. Strong deviations from ideal IV characteristics are present especially at lowest temperatures when assuming a homogenous SBH. Additionally, the extracted SBHs at low temperatures differ a lot between the two methods, indicating the presence of low barrier conduction paths. The presence of at least two distinct SBH inhomogeneities is found, which are labeled as ‘intrinsic’ and ‘extrinsic’. Next, the Tung model was applied to fit the measured IVT data using a discretized Gaussian distribution of patch parameters to account for spreading resistance effects. By using multiple Gaussian distributions, excellent fitting results were achieved, giving the density values of the different patches and a background barrier height from the IVT data, which are in excellent agreement with the CVT data over a wide temperature range of 400 K.

About the nature of the barrier inhomogeneities at Au/Ti/n-InAlAs(001) Schottky contacts

A correlation study of InAlAs surface morphology by atomic force microscopy and a study on the temperature (78–380 K) dependence of Au/Ti/InAlAs(001) Schottky barriers' current-voltage characteristics were performed. It is shown that a change in the growth structural defect (pit) density on the InAlAs surface from 106 to 107 cm−2 practically does not affect the current-voltage dependence at temperatures above 200 K that is well described by the thermionic emission theory with the ideality factor and the barrier height close to 1.1 and 0.69 eV, respectively. At the same time, change in the pit density has a significant effect on the Schottky barrier parameters at temperatures below 200 K, which can be explained by the Tung model suggesting the presence of local inhomogeneities with a lower barrier height and different total occupied areas. Also, the areas at the pit defect periphery that can lead to effective barrier height lowering after the Schottky contact formation were revealed by Kelvin probe force microscopy. Based on the obtained data, it can be concluded that the growth defects on the InAlAs surface shaped as pits cause areas in Schottky contact with a lower barrier height.

Barrier inhomogeneity in vertical Schottky diodes on free standing gallium nitride

In this paper, the electrical behavior of a Ni/Au Schottky barrier on free standing GaN has been studied employing a variety of techniques and correlated with the material and interface quality. The temperature dependence of the ideality factor (n) and of the Schottky barrier height (ΦB) revealed a spatial inhomogeneity of the barrier. This behavior has been described by means of the Tung's model on inhomogeneous Schottky barriers. The origin of the barrier inhomogeneity can be likely associated to the surface quality of the GaN epilayer or to microstructure of the Ni/GaN interface.

Research on the growth of β-(AlGa)2O3 film and the analysis of electrical characteristics of Ni/Au Schottky contact using Tung's model

Single crystalline β-(AlGa)2O3 epilayer was grown on β-Ga2O3 (010) substrate using pulsed laser deposition. By high resolution X-ray diffraction and X-ray photoelectron spectroscopy measurements, the Al composition was determined to be 11%–13%, somewhat larger than that of target. In addition, Schottky diodes were fabricated on epitaxial β-(Al0.11Ga0.89)2O3 film using Ni/Au as the anode contacts and the electrical characteristics were performed in the temperature range from 300 K to 573 K. From the forward I-V curves, the Φb and n were obtained and they are both strongly dependent on the temperature, which was attributed to the inhomogeneous Schottky barrier height distribution. According to the Tung's model, the mean barrier height of 1.38 eV and A* of 46.52 Acm−2K−2 are extracted by the modified Richardson plot.

(Invited) Current-Induced Degradation in Bulk GaN Vertical Schottky Diodes

The recent availability of high quality bulk GaN substrates with low threading dislocation density has made vertical power device structures an attractive possibility. Due to the low probability of a threading dislocation occurring within the active area of devices grown upon bulk GaN, reliability is driven by bulk or surface effects. Past work upon the reliability of Ni-GaN Schottky interfaces has suggested that interdiffusion of the Ni into the GaN can occur under thermal stress, adversely affecting the effective energy height of the barrier and increasing the ohmic nature of the interface. Conditions similar to such thermal stressing can be found at typical operating points in high current power devices used in power electronic applications. Our work examines the influence of high current density stress upon the reliability of vertical bulk GaN Schottky diodes. The vertical diodes studied were fabricated with Pd Schottky metallization with an Au ohmic overlayer. To study the effects of surface chemistry, reliability is compared between devices fabricated with different acidic and basic surface preparations, using HCl and KOH respectively. The fabricated devices were subject to life testing under varying levels of constant current density, up to 10 kA/cm^2. The lifetesting system was designed as a stress-measure-stress system, allowing for the evaluation of device parameters in-situ during testing. Electrical parameters indicating the state of the Schottky barrier were evaluated continuously during the measurement points of testing. In addition, a measurement of barrier inhomogeneity, evaluated using the Tung model, was also used as an indication of the condition of the Schottky interface. The microstructure of the interface before and after stress was examined using S/TEM imaging of representative lamellae samples of the stressed and unstressed devices. EDS imaging was used to determine the degree of diffusion between the Schottky metallization and the GaN substrate. Results of microstructure imaging are correlated with the electrical measurements taken to determine the responsible mechanisms for device degradation.

Barrier characteristics and interface properties of Au/Ti/n-InAlAs Schottky contacts

The InAlAs surface morphology (AFM), chemical composition (XPS) and the Ti/InAlAs interface structure (HREM), during the Au/Ti/n-In0.52Al0.48As/InP(001) mesa-structure Schottky barrier formation, were studied. The current-voltage (I-V) dependences analysis of the formed Schottky barrier in the temperature range of 100–380K was carried out. It was shown that the I-V dependences are well described by the thermionic emission theory at temperatures above 200K with the ideality factor and the barrier height close to 1.09 and 0.7eV, respectively. At temperatures below 200K, the I-V behavior is attributed to the Schottky barrier anomalies, which are explained by the existence of nanometer-sized patches with a low barrier height having a Gaussian distribution (Tung model). According to this model, the temperature dependences of the barrier height and ideality factor were described with the following parameters: the homogeneous barrier height of 0.88eV and standard deviation of 10−4cm2/3V1/3. In the analysis of the modified Richardson plot, the Richardson constant (10.7Acm−2K−2) and the area fraction (24%), occupied by the patches with a low barrier height and diameter ~80nm, were calculated. The patches appearance is explained by the presence of the spikes detected on the InAlAs surface by the AFM method.

Features of current flow in structures based on Au/Ti/n-InAlAs Schottky barriers

Current–voltage (I–V) characteristics of Au/Ti/n-InAlAs/InP Shottky barriers have been studied in a temperature range of 100–380 K. It is established that, as the temperature increases from 100 to 200 K, the ideality factor drops from 1.58 to 1.1, while the barrier height grows from 0.55 to 0.69 eV. With a subsequent temperature increase from 200 to 380 K, both the ideality factor and barrier height vary, but only weakly. This behavior agrees well with the model of lateral inhomogeneity of the barrier height (Tung model), which is confirmed by the linear dependence of the barrier height on the ideality factor at temperatures within 100–200 K. Calculations according to this model yielded the value of 0.88 eV for the homogeneous-junction barrier height, 10–4 cm2/3 V1/3 for the mean-square deviation of the Gaussian distribution of barrier heights, 3.7 × 10–11 cm2 for the effective area of regions with reduced barrier heights, and 10.7 A cm–2 K–2 for the Richardson constant.

Investigation of the possibilities of the ‘saddle points’ model for an explanation of anomalies in the characteristics of Schottky-barrier contacts

Numerical and experimental analyses of a model of a Schottky-barrier (SB) contact with barrier-height inhomogeneity in the form of ‘saddle points’ (the Tung model) [1] are carried out. On the basis of the known data for the contacts with Si, InP, and GaN and the experimental data obtained in this work for the Au–GaAs, Ni–GaAs, Ir–GaAs, and Pt–Rh–GaAs contacts, it is shown that the approximation widely used in the literature for the ideality factor of the I–V characteristics (IVCs) in the Tung model does not correspond to an exact solution, which, in turn, does not correspond to the real IVCs of contacts, at least at room temperature. The density of patches is demonstrated to have significant influence on the ideality factor under certain conditions, which is ignored by the Tung approximation. For the first time, on the basis of the known data on the distribution of the parameter the spread of the barrier height is simulated for a set of similar contacts. The results obtained indicate that the standard deviation estimated on the basis of this model for the typical values of parameters significantly differs from the real values of σφ.

Annealing temperature influence on the degree of inhomogeneity of the Schottky barrier in Ti/4H—SiC contacts

Tung's model was used to analyze anomalies observed in Ti/SiC Schottky contacts. The degree of the inhomogeneous Schottky barrier after annealing at different temperatures is characterized by the ‘T0 anomaly’ and the difference (△Φ) between the uniformly high barrier height (ΦB0) and the effective barrier height (ΦBeff). Those two parameters of Ti Schottky contacts on 4H—SiC were deduced from I–V measurements in the temperature range of 298 K–503 K. The increase in Schottky barrier (SB) height (ΦB) and decrease in the ideality factor (n) with an increase measurement temperature indicate the presence of an inhomogeneous SB. The degree of inhomogeneity of the Schottky barrier depends on the annealing temperature, and it is at its lowest for 500-°C thermal treatment. The degree of inhomogeneity of the SB could reveal effects of thermal treatments on Schottky contacts in other aspects.

Growth and Properties of Sn-Doped ZnO Nanowires for Heterojunction Diode Application

ABSTRACTWell-crystalline Sn-doped ZnO nanowires were grown on p -type silicon substrates by simple non-catalytic ther-mal evaporation process. The prepared nanowires were examined in terms of their morphological, composi-tional and structural properties which revealed that the as-grown nanowires are well-crystalline Sn-doped ZnO,possessing wurtzite hexagonal phase structure and grown in very high density over whole silicon substrate.Further, the as-grown n -Sn-doped ZnO nanowires were used to fabricate n -Sn-ZnO/ p -Si heterojunction diode.Temperature dependant electrical properties (294Ð353 K and 373Ð433 K) of the fabricated heterojunction diodewere studied in the forward and reverse bias conditions and presented in this paper. The currentÐvoltage char-acteristics at varying temperature of the heterojunction diode reveal that both the quality factor and Schottkybarrier height depend on temperature. However, the mean barrier height is estimated 1.2 eV in one attempt ofanalysis when a Gaussian distribution of low barrier heights is considered and found almost 1 eV in anotherattempt when the Richardson plot is linearized. Furthermore, effective barrier heights of 0.55Ð0.75 eV areextracted in the temperature range 294Ð433 K when Tung model is used. These correspond to barrier heightsof 0.93Ð0.35 eV extracted from C Ð V analysis in the same range of temperatures. Although the latter resultsfrom C Ð V analysis exhibit closer correlation with the Schottky barrier heights extracted from IÐ V analysis butthe discrepancy between them still exist.KEYWORDS: Sn-Doped ZnO Nanowires, Heterojunction Diodes, IÐ V Characteristics, Electrical Properties.

Large barrier, highly uniform and reproducible Ni-Si/4H-SiC forward Schottky diode characteristics: testing the limits of Tung's model

We report highly ideal (n < 1.1), uniform nickel silicide (Ni–Si)/SiC Schottky barrier (1.60–1.67 eV with a standard deviation <2.8%) diodes, fabricated on 4H-SiC epitaxial layers grown by chemical vapour deposition. The barrier height was constant over a wide epilayer doping range of 1014–1016 cm−3, apart from a slight decrease consistent with image force lowering. This remarkable uniformity was achieved by careful optimization of the annealing of the Schottky interface to minimize non-idealities that could lead to inhomogeneity. Tung's barrier inhomogeneity model was used to quantify the level of inhomogeneity in the optimized annealed diodes. The estimated ‘bulk’ barrier height (1.75 eV) was consistent with the Shockley–Mott limit for the Ni–Si/4H-SiC interface, implying an unpinned Fermi level. But the model was not useful to explain the poor ideality in unoptimized, as-deposited Schottky contacts (n = 1.6 − 2.5). We show analytically and numerically that only idealities n < 1.21 can be explained using Tung's model, irrespective of material system, indicating that the barrier height inhomogeneity is not the only cause of poor ideality in Schottky diodes. For explaining this highly non-ideal behaviour, other factors (e.g. interface traps, morphological defects, extrinsic impurities, etc) need to be considered.

A study of temperature-related non-linearity at the metal-silicon interface

In this paper, we investigate the temperature dependencies of metal-semiconductor interfaces in an effort to better reproduce the current-voltage-temperature (IVT) characteristics of any Schottky diode, regardless of homogeneity. Four silicon Schottky diodes were fabricated for this work, each displaying different degrees of inhomogeneity; a relatively homogeneous NiV/Si diode, a Ti/Si and Cr/Si diode with double bumps at only the lowest temperatures, and a Nb/Si diode displaying extensive non-linearity. The 77–300 K IVT responses are modelled using a semi-automated implementation of Tung's electron transport model, and each of the diodes are well reproduced. However, in achieving this, it is revealed that each of the three key fitting parameters within the model display a significant temperature dependency. In analysing these dependencies, we reveal how a rise in thermal energy “activates” exponentially more interfacial patches, the activation rate being dependent on the carrier concentration at the patch saddle point (the patch's maximum barrier height), which in turn is linked to the relative homogeneity of each diode. Finally, in a review of Tung's model, problems in the divergence of the current paths at low temperature are explained to be inherent due to the simplification of an interface that will contain competing defects and inhomogeneities.

Evaluation of Correct Value of Richardson's Constant by Analyzing the Electrical Behavior of Three Different Diodes at Different Temperatures

Various attempts have been made to evaluate the correct value (A*=146 A/cm2.K2) ofRichardson's constant. In 2005 S. Ferrero et al. published their research in which they performedan analysis of electrical characterizations of twenty Ti/4H-SiC(titanium on silicon carbide) Schottkydiodes with the help of thermionic emission theory and evaluated the value of Richardson's constantto be 17±8 A/cm2.K2; which is very low as compared to the theoretical value of 146 A/cm2.K2.Wehave tried in this paper to evaluate the Richardson's constant's value by nearly same experimental tech-niques followed by S. Ferrero et al. and additionally, have applied Tung's theoretical approach whichdeals with the incorrect value of A* in the perspective of Schottky barrier inhomogeneities caused bythe presence of nanometer size low barrier patches present in the uniform high barrier of the Schottkydiode.We have fabricated two Ti/4H-SiC (titanium on silicon carbide) Schottky diodes with differentareas and oneMo/4H-SiC (molybdenumon silicon carbide) Schottky diode. In this paper we have pre-sented a comparative analysis of forward current-voltage characteristics of all three Schottky diodes.In all three cases we were successful in the evaluation of nearly correct value of Richardson's constant.This work emphasizes the effects of differentmetal-SiC combinations and laboratory environments onthe evaluation of Richardson's constant and the effective area involved in the current transport. As pre-dicted by Tung's model the effective area is seen to be substantially different from the geometric areaof the Schottky diode. Evaluated values of A*, with an error of ±2, come out to be 145.39, 148.33and 148.33 A/cm2.K2for Ti/4H-SiC(large area), Mo/4H-SiC and Ti/4H-SiC(small area) Schottkydiodes, respectively.

Investigation of current transport parameters of Ti/4H-SiC MPS diode with inhomogeneous barrier

The current transport parameters of 4H-SiC merged PiN Schottky (MPS) diode are investigated in a temperature range of 300–520 K. Evaluation of the experimental current–voltage (I—V) data reveals the decrease in Schottky barrier height Φb but an increase in ideality factor n, with temperature decreasing, which suggests the presence of an inhomogeneous Schottky barrier. The current transport behaviours are analysed in detail using the Tung's model and the effective area of the low barrier patches is extracted. It is found that small low barrier patches, making only 4.3% of the total contact, may significantly influence the device electrical characteristics due to the fact that a barrier height of 0.968 eV is much lower than the average barrier height 1.39 eV. This shows that ion implantation in the Schottky contact region of MPS structure may result in a poor Ti/4H-SiC interface quality. In addition, the temperature dependence of the specific on-resistance (Ron—sp), T2.14, is determined between 300 K and 520 K, which is similar to that predicted by a reduction in electron mobility.

Analysis of barrier height inhomogeneity in Au/n-GaAs Schottky barrier diodes by Tung model

The apparent barrier heights and ideality factors of identically fabricated gold Schottky contacts on n-GaAs (14 dots) were determined from by forward bias current–voltage characteristics at room temperature. A statistical study on the experimental barrier heights and ideality factors of the diodes was performed. The obtained results indicate that the barrier heights and ideality factor parameters of Schottky diodes are different from one diode to another, even if they are identically prepared. The experimental BH and ideality factor distributions obtained from current–voltage characteristics were fitted by a Gaussian function, and their mean values were found to be 0.664 ± 0.024 and 1.700 ± 0.129 eV, respectively. The lateral homogeneous BH value of 0.738 eV for the gold Schottky contacts on n-GaAs was obtained from Φ b0 vs n plot by using n if = 1.026 and Δ Φ inf = 42 meV. It is concluded that the higher ideality factors accompany with the lower BHs or vice versa due to inhomogeneities. Also, a theoretical modelling of the formation mechanism of the Schottky barrier across the metal–semiconductor interfaces was successfully applied with the assumption of a statistical distribution of the patch characteristics. This model was assisted to lead to the explanation of many anomalies in the experimental results.

Pd/Au/SiC Nanostructured Diodes for Nanoelectronics: Room Temperature Electrical Properties

Pd/Au/SiC nanostructured Schottky diodes were fabricated embedding Au nanoparticles (NPs) at the metal-semiconductor interface of macroscopic Pd/SiC contacts. The Au NPs mean size was varied controlling the temperature and time of opportune annealing processes. The electrical characteristics of the nanostructured diodes were studied as a function of the NPs mean size. In particular, using the standard theory of thermoionic emission, we obtained the effective Schottky barrier height (SBH) and the effective ideality factor observing their dependence on the annealing time and temperature being the signature of their dependence on the mean NP size. Furthermore, plotting the effective SBH as a function of the effective ideality factor we observe a linear correlation, indicating that the Au NPs act as lateral inhomogeneities in the Schottky diodes according to the Tung's model. Therefore, we can control the size, fraction of covered area, and surface density of such intentionally introduced inhomogeneities. The application of the Tung's model for the electronic transport in inhomogeneous Schottky contacts allow us to obtain, in particular, the homogeneous SBH. These nanostructured diodes are proposed as possible components of integrated complex nanoelectronic devices.

Analysis of inhomogeneous Ge/SiC heterojunction diodes

In this article Schottky barrier diodes comprising of a n-n germanium-silicon carbide (Ge–SiC) heterojunction are electrically characterized. Circular transmission line measurements prove that the nickel front and back contacts are Ohmic, isolating the Ge/SiC heterojunction as the only contributor to the Schottky behavior. Current-voltage plots taken at varying temperature (IVT) reveal that the ideality factor (n) and Schottky barrier height (SBH) (Φ) are temperature dependent and that incorrect values of the Richardson constant (A∗∗) are being produced, suggesting an inhomogeneous barrier. Techniques originally designed for metal-semiconductor SBH extraction are applied to the heterojunction results to extract values of Φ and A∗∗ that are independent of temperature. The experimental IVT data are replicated using the Tung model. It is proposed that small areas, or patches, making up only 3% of the total contact area will dominate the I-V results due to their low SBH of 1.033 eV. The experimental IVT data are also analyzed statistically using the extracted values of Φ to build up a Gaussian distribution of barrier heights, including the standard deviation and a mean SBH of 1.126 eV, which should be analogous to the SBH extracted from capacitance-voltage (C-V) measurements. Both techniques yield accurate values of A∗∗ for SiC. However, the C-V analysis did not correlate with the mean SBH as expected.

Formation mechanism of interface charges in the metal-semiconductor superlattices

ASA energy band calculation method. The results show that the origin of interface charge Qss is the rearrangement of valence electrons in the metal and semiconductor atomic layers at the metalsemiconductor interface. The formation mechanism of the interface charge Qss in this paper is similar to that of Tung's model of the polarization of the chemical bonds at metalsemiconductor interfaces. Both of them can account for the origin of interface charge Qss even at the monocrystalline metalsemiconductor interfaces.