True Random Sequence Research Articles

Effect of pseudo-random number on the security of quantum key distribution protocol

Abstract In the process of quantum key distribution (QKD), the communicating parties need to randomly determine quantum states and measurement bases. To ensure the security of key distribution, we aim to use true random sequences generated by true random number generators as the source of randomness. In practical systems, due to the difficulty of obtaining true random numbers, pseudo-random number generators are used instead. Although the random numbers generated by pseudo-random number generators are statistically random, meeting the requirements of uniform distribution and independence, they rely on an initial seed to generate corresponding pseudo-random sequences. Attackers may predict future elements from the initial elements of the random sequence, posing a security risk to quantum key distribution.This paper analyzes the problems existing in current pseudo-random number generators and proposes corresponding attack methods and applicable scenarios based on the vulnerabilities in the pseudo-random sequence generation process. Under certain conditions, it is possible to obtain the keys of the communicating parties with very low error rates, thus effectively attacking the quantum key system. This paper presents new requirements for the use of random numbers in quantum key systems, which can effectively guide the security evaluation of quantum key distribution protocols.

Nonlinear Charge Transport and Excitable Phenomena in Semiconductor Superlattices.

Semiconductor superlattices are periodic nanostructures consisting of epitaxially grown quantum wells and barriers. For thick barriers, the quantum wells are weakly coupled and the main transport mechanism is a sequential resonant tunneling of electrons between wells. We review quantum transport in these materials, and the rate equations for electron densities, currents, and the self-consistent electric potential or field. Depending on superlattice configuration, doping density, temperature, voltage bias, and other parameters, superlattices behave as excitable systems, and can respond to abrupt dc bias changes by large transients involving charge density waves before arriving at a stable stationary state. For other parameters, the superlattices may have self-sustained oscillations of the current through them. These oscillations are due to repeated triggering and recycling of charge density waves, and can be periodic in time, quasiperiodic, and chaotic. Modifying the superlattice configuration, it is possible to attain robust chaos due to wave dynamics. External noise of appropriate strength can generate time-periodic current oscillations when the superlattice is in a stable stationary state without noise, which is called the coherence resonance. In turn, these oscillations can resonate with a periodic signal in the presence of sufficient noise, thereby displaying a stochastic resonance. These properties can be exploited to design and build many devices. Here, we describe detectors of weak signals by using coherence and stochastic resonance and fast generators of true random sequences useful for safe communications and storage.

A 0.012‐mm2 0.244‐pJ/bit successive approximation register analog‐to‐digital converter‐based true random number generator for Internet of Things applications in a 65‐nm complementary metal–oxide–semiconductor

SummaryThis paper proposes a true random number generator (TRNG) based on a successive approximation register (SAR) analog‐to‐digital converter (ADC). A top‐plate sampling SAR ADC structure and a new MSB‐isolation switch scheme (MISS) are combined to achieve low‐power operation and small area occupancy at the same time. When the SAR ADC has completed its conversion, a secondary firing of the comparator measures the remaining signal. This 1‐bit quantized residue serves as the true random sequence, thus eliminating the need for extra circuitry in the TRNG. A 65‐nm prototype of the proposed TRNG was found to occupy an area of 0.012 mm2 and successfully passed all the National Institute of Standards and Technology (NIST) tests without post‐processing. It achieved a figure‐of‐merit of 0.244 pJ/bit for a 1 Mb/s random sequence with a 0.8‐V power supply. Its resilience to power noise injection attacks was also verified.

Physically non-cloneable arbiter -type function with non-linear path pairs

Physically unclonable functions (PUFs) are basic physical cryptographical primitives, providing to solve tasks such as unclonable identification, digital device authentication and copyright authentication, true random sequence generation, etc. The major features of PUFs are stability, unpredictability and irreproducibility, due to uncontrollable random variations of distinctive features of the raw materials and technological processes used during their manufacturing. Generally, PUF are digital circuits that extract such variations and convert them into a binary format, which applied for further use. Among the variety of PUF types, an Arbiter PUF (APUF) is distinguished, which is a digital circuit with N-bit challenge input and single output for one-bit response generation. The functionality of APUF is based on comparison of transition time of two copies of the test signal along a pair of configurable paths, selected by the challenge value CH from a set of 2N all possible pairs. The result of the comparison is the binary value of the response. The set of all challenge-response pairs is a random, unpredictable and irreproducible in the cases of implementation of cloned PUF circuits both on single and/or on another chips, also using different technologies. This article presents a new approach to the synthesis of the APUF circuits, based on the permutation network elements, which allow to construct the nonlinear structures of pair of paths. This implies the potential complication of building an APUF model to attack its implemented instances. This article presents new schematic solutions for the synthesis of APUF circuits. Also, the main characteristics of the proposed APUF circuits implemented on the Xilinx Zynq-7000 FPGA is analyzed.

Evaluation of True Random Number Sequences Generated by Utilizing Timing Jitters in Superconducting Integrated Circuits

A Hardware Random Number Generator (HRNG), which generates true random number sequences, is studied. In superconducting Single Flux Quantum (SFQ) circuitry, HRNGs that utilized timing jitters in trigger signals have been demonstrated. In this paper, we propose an HRNG with two oscillators to enhance stability against variation of oscillator frequencies. We investigate the characteristics of random numbers generated with the proposed HRNG not only by numerical simulation but also by experiments using Nb test circuits. In the numerical simulation, the probability of “1” in random number sequences has a local minimum of “1” output probability at conditions where fclk (the clock oscillator frequency) and fgate (the gate oscillator frequency) are approximately equal (fclk ≈ fgate ) for fclk ≤ 60 GHz. It is also found that pass rates for the FIPS140-2 random number tests are little affected by variations of fclk at fgate = 69.2 GHz. The random number generation rate for fclk = 60 GHz and fgate = 43 GHz reaches 3.98 GHz. In experimental measurements, random numbers of 1 Mbits generated by a test circuit pass the SP800-22 random number tests at fclk = 48.79 GHz and fgate = 19.81 GHz.

Graph Theoretic Approach to Randomness Test Based on the Overlapping Blocks

Cryptographic parameters such as secret keys, should be chosen randomly and at the same time it should not be
 so difficult to reproduced them when necessary. Because of this, pseudorandom bit (or number) generators take the role of true random generators. Outputs of pseudorandom generators, although they are produced through some deterministic process, should be random looking, that is not distinguishable from true random sequences. In other word they should not follow any pattern. In this paper we propose a new approach using graph theory, to determine when to expected a fixed pattern to appear in a random sequence for the fist time. Using these expected values and comparing them with the observed values a randomness test can be defined. In this work patters are traced through the sequence in an overlapping manner.

Fast True Random Bit Generation With an SOA-Based Random Fiber Laser

Physical random bits are generated at rates up to 40 Gbps using an 8-bits digital oscilloscope acquiring the optical intensity at the output of an SOA-based random fiber laser. The simple and minimal off-line post-processing (the selection of 4 LBS) can be easily implemented in real time. The true random bits sequences passed all NIST tests.

Full Hardware Image Encryption for Oscillating Memristor Circuits

AbstractAl/PMMA/CS/PMMA/ITO structure devices are fabricated using polymethyl methacrylate (PMMA) and chitosan (CS) as dielectric layer materials. Its electrical characteristics and conductive mechanism are studied using its own physical characteristics to build a memristor true random number generator (TRNG). The generated true random sequence is optimized by a field programmable gate array (FPGA), and the optimized random number sequence is tested by the National Institute of Standards and Technology (NIST) to analyze its randomness. The pipeline structure is introduced to optimize the whole image encryption system, and the optimized random number sequence is used to realize image encryption inside the FPGA. Then, the encrypted image is displayed on a liquid crystal display (LCD) screen to realize random number generation and image encryption of all hardware. Finally, the encrypted image is analyzed.

Engaging women and men in the gender-synchronised, community-based Mbereko+Men intervention to improve maternal mental health and perinatal care-seeking in Manicaland, Zimbabwe: A cluster-randomised controlled pragmatic trial.

BackgroundMaternal mental morbidity and low perinatal health service utilisation in resource-constrained settings contribute substantially to the global burden of poor maternal, newborn, and child health. The community-based Mbereko+Men program in rural Zimbabwe engaged women and men in complementary activities to improve men’s support for women and babies, coparents’ equitable, informed health decision-making, and ultimately, maternal mental health and care-seeking for maternal and newborn health services. The study aimed to test the effectiveness of the Mbereko+Men program on maternal mental health at 0-6 months after childbirth.MethodsWe conducted a cluster-randomised controlled pragmatic trial using a two-arm parallel design with four clusters per arm. Data was data collected through cross-sectional surveys before and after the implementation of the intervention or standard care. Rural health facility catchments in Mutasa District, Zimbabwe, were randomised using a true random number sequence. Survey participants were women who had given birth within 0-6 months and their male coparents. The primary outcome was women’s mean Edinburgh Postnatal Depression Scale (EPDS) score. Secondary outcomes captured care-seeking, men’s supportive behaviours, and gender dynamics in coparent relationships. Masking was not used. All clusters were included in the analysis. The trial was registered with the Australian New Zealand Clinical Trials Registry (ACTRN12620001014943) in October 2020.ResultsBetween April 13 and May 20, 2016, 457 women and 242 men participated in the pre-intervention survey; between October 19 and November 30, 2017, 433 women and 273 men participated in the post-intervention survey. Women’s mean EPDS scores declined in both arms. The decline was 34% greater in the intervention arm (adjusted risk ratio = 0.66; 95% confidence interval = 0.48, 0.90, P = 0.008). Improvements in care-seeking, men’s support, and coparents’ relationships were detected.ConclusionsA low-intensity gender-synchronised intervention engaged women and men to improve maternal mental health and care-seeking in a setting characterised by gender inequality and demand-side barriers to care.

A High-Quality Entropy Source Using van der Waals Heterojunction for True Random Number Generation.

Generators of random sequences used in high-end applications such as cryptography rely on entropy sources for their indeterminism. Physical processes governed by the laws of quantum mechanics are excellent sources of entropy available in nature. However, extracting enough entropy from such systems for generating truly random sequences is challenging while maintaining the feasibility of the extraction procedure for real-world applications. Here, we present a compact and an all-electronic van der Waals heterostructure-based device capable of detecting discrete charge fluctuations for extracting entropy from physical processes and use it for the generation of independent and identically distributed true random sequences. We extract a record-high value (>0.98 bits/bit) of min-entropy using the proposed scheme. We demonstrate an entropy generation rate tunable over multiple orders of magnitude and show the persistence of the underlying physical process for temperatures ranging from cryogenic to ambient conditions. We verify the random nature of the generated sequences using tests such as NIST SP 800-90B standard and other statistical measures and verify the suitability of our random sequence for cryptographic applications using the NIST SP 800-22 standard. The generated random sequences are then used in implementing various randomized algorithms without any preconditioning steps.

Improving the Statistical Qualities of Pseudo Random Number Generators

Pseudo random and true random sequence generators are important components in many scientific and technical fields, playing a fundamental role in the application of the Monte Carlo methods and stochastic simulation. Unfortunately, the quality of the sequences produced by these generators are not always ideal in terms of randomness for many applications. We present a new nonlinear filter design that improves the output sequences of common pseudo random generators in terms of statistical randomness. Taking inspiration from techniques employed in symmetric ciphers, it is based on four seed-dependent substitution boxes, an evolving internal state register, and the combination of different types of operations with the aim of diffusing nonrandom patterns in the input sequence. For statistical analysis we employ a custom initial battery of tests and well-regarded comprehensive packages such as TestU01 and PractRand. Analysis results show that our proposal achieves excellent randomness characteristics and can even transform nonrandom sources (such as a simple counter generator) into perfectly usable pseudo random sequences. Furthermore, performance is excellent while storage consumption is moderate, enabling its implementation in embedded or low power computational platforms.

Fast Chaotic Image Encryption Algorithm Using a Novel Divide and Conquer Diffusion Strategy

To protect image privacy in real-time transmission, a fast chaotic image encryption algorithm using a novel divide and conquer diffusion strategy is proposed in this paper. Firstly, a fast pseudo-random sequence generator is constructed using 2D hyperchaotic systems. And by performing bitwise XOR operation between two integer sequences obtained from different systems, the final key stream used for diffusion will have better randomness and unpredictability. Secondly, to achieve divide and conquer diffusion, the plain image is divided into three parts, then a parallel CBC-based diffusion method can simultaneously act on upper and bottom parts (or left and right parts), which achieves a time complexity of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {O}$ </tex-math></inline-formula> ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$W+H$ </tex-math></inline-formula> ). Moreover, within the diffusion process, the mechanism of information interaction on the central row or column further enhances avalanche effect to resist differential attack. Thirdly, the session key of the proposed algorithm is a mixture of the plain image’s hash value and a true random sequence, which not only improve plaintext sensitivity but also realize one-time pad. Finally, experimental results indicate the superiority of our algorithm to resist statistical, chosen-plaintext, entropy, and other common attacks. Furthermore, by comparison with previous works, our algorithm preforms much faster execution speed with only average of 0.08s to encrypt images of size <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$512\times 512$ </tex-math></inline-formula> , while it provide the same or even higher level of security. Therefore, the proposed algorithm can meet security and efficiency requirements of real-time communications of image data.

A 16-Bit Calibration-Free SAR ADC With Binary-Window and Capacitor-Swapping DAC Switching Schemes

This paper presents a 16-bit successive approximation register analog-to-digital converter (ADC) achieving over-100 dB spurious-free dynamic range (SFDR). This ADC uses V_CM-based and binary-window digital-to-analog converter (DAC) switching schemes to improve the signal-to-noise and distortion ratio (SNDR). Moreover, a <i>level-2</i> capacitor swapping scheme is proposed to achieve superior DAC linearity by using two intrinsic true random number sequences. A prototype ADC is fabricated in 180 nm CMOS technology and occupies an active area of 0.53 mm². At 1 MS/s, it consumes a total power of 1.05 mW from a supply of 1.8 V. The measured differential and integral nonlinearity are &#x2212;0.65/&#x002B;0.45 and &#x2212;2.2/&#x002B;2.1 least significant bit. With an input of 1 kHz, the measured SNDR and SFDR are 83 dB and 100 dB. The effective number of bits is 13.5, which is equivalent to a Schreier figure-of-merit of 169.8 dB.

Certification of the efficient random number generation technique based on single‐photon detector arrays and time‐to‐digital converters

True random number generators (TRNGs) allow the generation of true random bit sequences, guaranteeing the unpredictability and perfect balancing of the generated values. TRNGs can be realised from the sampling of quantum phenomena, for instance, the detection of single photons. Here, a recently proposed technique, which implements a quantum random number generator (QRNG) out of a device that was realised for a different scope, is further analysed and certified [1]. The combination of a CMOS single-photon avalanche diode (SPAD) array, a high-resolution time-to-digital converter (TDC) implemented on a field programmable gate array (FPGA), the exploitation of a single-photon temporal degree of freedom, and an unbiased procedure provided by H. Zhou and J. Bruck [2, 3] allows the generation of true random bits with a high bitrate in a compact and easy-to-calibrate device. Indeed, the use of the ‘Zhou–Bruck’ method allows the removal of any correlation from the binary representation of decimal data. This perfectly fits with the usage of a device with non-idealities like SPAD's afterpulses, pixel cross-correlation, and time-to-digital converter non-uniform conversion. In this work, an in-depth analysis and certification of the technique presented in [1] is provided by processing the data with the NIST suite tests in order to prove the effectiveness and validity of this approach.

VLSI Architecture for Designing a True Random Number Generator with Modified Parallel Run Length Encoding

The secured communication is a means to provide privacy and security for the data being transmitted. The cryptographic system has thus become a vital and inevitable platform for achieving data security in our day to day life ranging from the generation of one time passwords, session keys, signature parameters, ephemeral keys. The encryption level is entirely dependent on the unpredictability of the digital bit streams. The paper focuses on generating true random number sequences using hardware, so as to safeguard the encryption keys patterns for digital communications. These sequences are generated using purely digital components supported by an efficient VLSI architecture. The implementation of the proposed model is done using Mojo-V3, supported by Xilinx ISE software platform. The generated random sequences will further undergo some post processing operations, viz; Von-Neumann correction (VNC) and Parallel Run Length Encoding (PRLE), to eliminate the bias in bit stream and also to compensate the high power dissipation respectively.

A post-processing method for true random number generators based on hyperchaos with applications in audio-based generators

True random number generators (TRNG) are important counterparts to pseudorandom number generators (PRNG), especially for high security applications such as cryptography. They produce unpredictable, non-repeatable random sequences. However, most TRNGs require specialized hardware to extract entropy from physical phenomena and tend to be slower than PRNGs. These generators usually require post-processing algorithms to eliminate biases but in turn, reduces performance. In this paper, a new post-processing method based on hyperchaos is proposed for software-based TRNGs which not only eliminates statistical biases but also provides amplification in order to improve the performance of TRNGs. The proposed method utilizes the inherent characteristics of chaos such as hypersensitivity to input changes, diffusion, and confusion capabilities to achieve these goals. Quantized bits of a physical entropy source are used to perturb the parameters of a hyperchaotic map, which is then iterated to produce a set of random output bits. To depict the feasibility of the proposed post-processing algorithm, it is applied in designing TRNGs based on digital audio. The generators are analyzed to identify statistical defects in addition to forward and backward security. Results indicate that the proposed generators are able to produce secure true random sequences at a high throughput, which in turn reflects on the effectiveness of the proposed post-processing method.

Photon Counting LIDAR Based on True Random Coding.

In this paper, a true random coding photon counting LIDAR is described, in which a Gm-APD (Geiger mode avalanche photodiode) acts as the true random sequence signal generator. The true random coding method not only improves the anti-crosstalk capability of the system, but also greatly reduces the 1-bit missed detection caused by the limited Gm-APD count rate. The experiment verifies the feasibility of the true random sequence used in a photon counting LIDAR ranging system, and a simple and intuitive evaluation model of true random sequence autocorrelation is proposed. Finally, the influence of system parameters (mean echo photon number, mean pulse count density, sequence length, mean noise count) on detection probability is explored. In general, this paper proves that the true random code photon counting LIDAR is an effective target detection method, and provides a new idea for the research of an anti-crosstalk LIDAR system.

True random coded photon counting Lidar

A true random coded photon counting Lidar system is proposed in this paper, in which a single photon detector acts as the true random sequence signal generator instead of the traditional function generator. Compared with the traditional pseudo-random coded method, the true random coded method not only improves the anti-crosstalk capability of the system, but more importantly, it effectively overcomes the adverse effect of the detector’s dead time on the ranging performance. The experiment results show that the ranging performance of the true random coded method is obviously better than that of the pseudo-random coded method. As a result, a three-dimensional scanning imaging of a model car is completed by the true random coded method.

0.6–1.2 V, 0.22 pJ/bit True Random Number Generator Based on SAR ADC

This brief proposes a true-random number generator (TRNG) based on a successive approximation register (SAR) analog-to-digital converter (ADC). After the SAR ADC has finished conversion, the comparator is fired again to quantize the residue. The 1-bit quantized residue acts as a true random sequence and no additional circuits are required for the TRNG. A prototype fabricated in 65nm process acts as a TRNG over 0.6V-1.2V power supply and −5°C to 50°C temperature range without any calibration or post-processing. The TRNG outputs a random sequence at 1.25Mbps and consumes state-of-the-art energy of 0.22pJ/bit.

A parallelizable chaos-based true random number generator based on mobile device cameras for the Android platform

True random number generators are used in high security applications such as cryptography where non-determinism is required. However, they are slower than their pseudorandom counterparts because they need to extract entropy from physical phenomenon. To overcome this drawback, generators have been designed to extract unpredictability from devices such as computer processing units or microphones. This paper introduces a new generator for the Android mobile platform based on images captured by a built-in camera. Although similar generators exist, they suffer from poor performance and a lack of proper security evaluation. The proposed generator implements a chaos-based postprocessing algorithm that eliminates statistical defects and increases its throughput. These goals are achieved by using the inherent properties of a chaotic system to amplify entropy extracted from the captured images. The proposed generator is evaluated in two phases: first, statistical test suites are executed to identify statistical defects. Next, the generator’s forward and backward security is analysed. Results indicate that the proposed true random number generator is able to generate statistically secure true random number sequences faster than existing mobile-based generators. In addition, the generator is designed to support parallel processing, thus allowing its performance to scale according to the mobile device’s multicore architecture.