Transparent Amorphous Oxide Semiconductors Research Articles

Facile diffusion of sulfur and fluorine into a-IGTO thin films for high-performance and reliability of transparent amorphous oxide semiconductor thin-film transistors

Facile diffusion of sulfur and fluorine into a-IGTO thin films for high-performance and reliability of transparent amorphous oxide semiconductor thin-film transistors

Optimization of Two-Dimensional Channel Thickness in Nanometer-Thick SnO2-Based Top-Gated Thin-Film Transistors Using Electric Field Thermopower Modulation: Implications for Flat-Panel Displays

Transparent amorphous oxide semiconductor (TAOS) based thin-film transistors (TFTs) are essential as the backplane for developing advanced flat panel displays. Among many TAOSs, amorphous (a-) SnO2...

Electric Field Thermopower Modulation Analyses of the Operation Mechanism of Transparent Amorphous SnO2 Thin-Film Transistor

Transparent amorphous oxide semiconductors (TAOSs) based transparent thin film transistors (TTFTs) with high field effect mobility (μ FE) are necessary to develop advanced flat panel displays. Currently, amorphous (a-) InGaZnO4 is widely applied as the TAOS of the TFT channel of the commercially available OLED displays with a μ FE is ~10 cm2 V− 1 s− 1[1]. Among TAOSs, amorphous (a-) SnO2 has several advantages against current a-InGaZnO4 such as higher μ FE >100 cm2 V–1 s–1[2], which is one order of magnitude higher than that of a-InGaZnO4 and indium free. Although there are several researches on a-SnO2 TTFT, the operation mechanism has not been clarified thus far due to the strong gas sensing characteristics of SnO2.We prepared a bottom-gate top-contact type TTFT by pulsed laser deposition technique using 4.2-nm-thick a-SnO2 as the channel without any surface passivation. We measured the transistor characteristics and thermopower(S) in air and vacuum. The resultant a-SnO2 TTFT showed clear transfer (I d–V g) characteristics (FIG. a) with the on-to-off current ratios of ~105. All the TTFTs show clear pinch-off in the output characteristics. The threshold voltage (V th) was −14 V in air whereas it shifted dramatically to −23 V in vacuum shows a strong gas sensing characteristic. An almost linear relationship with a slope of ~120 μV K−1 decade−1 was observed in the –S–log n s plot (FIG. b) when n s exceeded 2.5 × 1012 cm−2 in air and a slope of ~84 μV K−1 decade−1 was observed in the –S–log n s plot when n s exceeded 2.9 × 1012 cm−2 in vacuum indicating that the E−k relation at the bottom of the conduction band is parabolic shaped. The t eff ≡ n s/n 3D of the conducting a-SnO2 channel were always ~1.7 ± 0.4 nm, insensitive to the gas atmosphere (FIG. c). From the thickness of the a-SnO2 film (4.2 nm) and the t eff (1.7 ± 0.4 nm), the carrier depletion depth at the top surface was concluded to be 2.5 nm of the a-SnO2 film, which shows the similar depletion length as reported data.[4] The present results would provide a fundamental design concept to develop a-SnO2 TTFT.[1] K. Nomura et al., Nature, 432, 488 (2004).[2] C. W. Shin et al., Sci. Rep. 6, 19023 (2016).[3] N. Yamazoe, Sensor Actuat. B-Chem. 5, 7 (1991).[4] D. Liang et al., Appl. Phys. Lett. 116, 143503 (2020) Figure 1

(Invited) Process Development of CMOS TFTs for Monolithic 3D-IC Applications

Three-dimensional integrated circuit (3D-IC) technology has been used for vertical integration of multi-chip or stacked process in three-dimensional space for the scaling trend of sub-1 nm technical node, in order to overcome the physical limits of electronics and materials in the semiconductor process. Among them, monolithic 3D-IC has many features that can solve the challenge of stacking 2D molds and connecting them in the third dimension. 3D-IC has many significant advantages, such as heterogeneous integration, a smaller footprint but more powerful features, lower costs, reduced power, and higher bandwidth.In this talk, process development of CMOS thin film transistor (TFT) for monolithic 3D-IC will be presented. The channel material of upper layer is the key concern for fabricating device stacked in 3-D space due to the process thermal budget. An amorphous indium gallium zinc oxide (a-IGZO) with activation temperature under 350 ℃ is regarded as the most promising transparent amorphous oxide semiconductor (TAOS) channel material for the advanced TFT device. However, the TAOS TFT is lack of p-channel device. Hence in this work, a top gate poly-Si p-channel TFT (pTFT) device was formed with tri-gate structure by using a self-aligned double patterning (SADP) process. Then, an a-IGZO n-channel TFT (nTFT) based on a bottom gate process were stacked with a monolithic architecture on the same wafer.At first, the process development and optimization of individual AOS nTFT and poly-Si pTFT were carried out. The device structure of AOS nTFT includes a 100 nm-thick TiN metal bottom-gate, 10 nm-thick HfO2 gate dielectric, and IGZO channel. On the other hand, a 100 nm-thick TiN metal top-gate, 10 nm-thick HfO2/ 1 nm-thick SiO2 gate stack, p-type JL poly-Si channel, and tri-gate structure were applied for the poly-Si pTFT. Results show that the on/off current ratio (Ion/Ioff) values of AOS nTFT and poly-Si pTFT are 7 and 6.8 orders, respectively. And the subthreshold swing (S.S.) values are135 and 128 mV/decade, respectively. The device performance of the individual n/p TFTs in this work is similar to that of state-of-the-art devices.Afterwards, hybrid CMOS inverter devices were fabricated and stacked with a monolithic 3D-IC architecture. The Ion/Ioff values of AOS nTFT and poly-Si pTFT are 7.1 and 6.3 orders, respectively. And the S.S. values are135 and 133 mV/decade, respectively. The device performance is quite similar to those of individual n/p TFT fabricated in our group before. Results indicate that the process integration of the AOS nTFT and poly-Si pTFT for monolithic IC is successful. The electrical characteristics of CMOS TFT inverter are pretty good. The voltage gain is ~ 25, the mid voltage is ~ 0.5 Vdd, and the high/low noise margins are large and approximately equal.In order to further improve the performance of nTFT, a novel tungsten (W) dopant was applied to replace gallium (Ga) for ASO film due to its lower price and higher oxygen bond dissociation energy. With higher oxygen bond dissociation energy, the oxygen vacancy can be well controlled and the device may achieve better electrical and reliability characteristics. It is found that the a-IWZO nTFT shows a ION/IOFF value of 7.8 order and a S.S. value of 109 mV/decade. Furthermore, the mobility of a- IWZO TFT is about 2 times higher than that of a-IGZO TFT. The a-IWZO TFT with tiny W dopant as the carrier suppressor can exhibit a smaller S.S. value, suggesting that the channel can be effectively controlled even with higher channel conductivity.To further improve the performance of pTFT, a polycrystalline germanium (poly-Ge) junctionless (JL) TFT is studied. The implantation and activation processes are not required for poly-Ge JL device because the vacancy and interstitial in poly-Ge film can act as acceptors, which naturally turn the film into p-type. However, Ge with poor thermal stability is very sensitive to process temperature. The Ge sub-oxides at Ge surface have lower bandgap, more oxide traps, and interface states, and they may diffuse into gate dielectric after thermal process, resulting in degradation of gate dielectric. The desorption and diffusion of GeOx can be suppressed by nitridation process on interfacial layer (IL) at high-k/Ge. Therefore, in this work, poly-Ge JL pTFT devices with various ILs including GeO2, GeON, O2 plasma-treated HfN, and O2 plasma-treated Al2O3 HfO2 are investigated and compared. The optimal IL for poly-Ge pTFT could be expected. Then, a CMOS device by integrating AOS nTFT and poly-Ge pTFT with a monolithic architecture will be performed as well.

Lowering the Trap-State Density of Transparent Amorphous Oxide Semiconductor-Based Thin Film Transistors Through Microwave Irradiation.

In this study, a low-thermal-budget microwave irradiation (MWI) technique was applied as a post-deposition annealing (PDA) process to lower the trap densities that exist in transparent amorphous oxide semiconductor thin film transistors (TAOS TFTs). As channel layers of TAOS TFTs, two types of indium gallium zinc oxide (IGZO) with different compositions as well as aluminum zinc tin oxide (AZTO) and zinc oxide (ZnO) thin films were deposited with various thicknesses through radio frequency (RF) magnetron sputtering at 25°C. Cost-effective and energy-efficient MWI was conducted to enhance the electrical performance of transistors by removing traps and defects. The electrical characteristics of IGZO (1:1:1 and 4:2:3)-, ZnO-, and AZTO-based TFTs treated by MWI were evaluated by measuring the transfer curves. In particular, the relation between the interface trap density (Dit) and bulk trap density (Nt) of microwave-irradiated TFTs was quantitatively evaluated by the subthreshold swing (SS) variation based on channel thickness. The results indicated that of the four types of channel layers, the performance of IGZO (4:2:3) TFTs was the best and that of AZTO TFTs was the worst, in terms of electrical properties such as on/off current ratio, mobility SS, and trap density. In particular, it was demonstrated that the trap density of MWI-treated TAOS TFTs was much lower than that of conventional furnace annealing (CFA)-treated devices. Despite the short annealing duration of a few minutes, the MWI more effectively reduced the trap sites than did the furnace treatment, and significantly enhanced the electrical properties of the TAOS TFTs. It is expected that high-performance TAOS TFTs can be fabricated by applying MWI, which is a highly efficient and low-thermal-budget annealing method, to the PDA process and can thus reduce trap density.

Recent Progress of Deep Ultraviolet Photodetectors using Amorphous Gallium Oxide Thin Films

Deep ultraviolet (UV) photodetectors have wide applications both in civil and military fields. Many materials have been explored to realize deep UV photodetection. Amorphous gallium oxide (a‐GaOx), as a member of transparent amorphous oxide semiconductors (TAOSs), has attracted a great deal of attention due to its ultrawide bandgap and scalable synthesis at room temperature. Plenty of researches have been focused on this topic in recent years. Herein, the latest progresses in the preparation methods of a‐GaOx using radio‐frequency sputtering, pulsed laser deposition, atomic layer deposition, and other deposition techniques are summarized. Dependence of the stoichiometry, crystallinity, optical, electrical, and morphological properties on different preparation parameters and doping/alloying elements is tentatively discussed, as well as those deep UV photodetectors based on a‐GaOx and related thin films. Finally, a short summary with further possible investigations is provided for a better understanding and development of a‐GaOx materials and photodetectors.

Thickness Optimization toward High-Performance Bottom-Gated Transparent Tin Dioxide Thin-Film Transistors

Nowadays, transparent amorphous oxide semiconductor (TAOS)-based transparent thin-film transistors (TTFTs) are utilized as the backplane of organic light-emitting diode (OLED) displays. Among many ...

All‐Oxide Transparent Thin‐Film Transistors Based on Amorphous Zinc Tin Oxide Fabricated at Room Temperature: Approaching the Thermodynamic Limit of the Subthreshold Swing

AbstractThin‐film transistors (TFTs) based on transparent amorphous oxide semiconductors (TAOSs) have become essential building blocks for a broad range of electronics, since TAOSs facilitate large‐scale fabrication at moderate temperatures and hence feature compatibility with flexible substrates. An emerging indium‐free alternative to the widely commercially exploited indium gallium zinc oxide (IGZO) is amorphous zinc tin oxide (ZTO); however, according to previous reports, achieving acceptable performance of ZTO‐based devices fabricated at temperatures below 300 °C is still challenging to date. Here, key properties of the first all‐oxide and fully transparent metal‐semiconductor field‐effect transistors (MESFETs), metal‐insulator‐semiconductor field‐effect transistors (MISFETs) and junction field‐effect transistors (JFETs) based on amorphous ZTO are compared, employing PtOx, HfOy, and p‐type NiO as gate, respectively. All individual layers have been deposited exclusively at room temperature and do not require any additional postdeposition annealing to obtain sufficient device functionality. Demonstrated TFTs exhibit reasonable current on/off ratios of over six orders of magnitude with subthreshold swings as low as 61 mV dec–1 at room temperature. Transistor characteristics have been recorded for several weeks to study performance consistency over time and are further investigated regarding their stability under bias stress.

Ultrahigh-performance integrated inverters based on amorphous zinc tin oxide deposited at room temperature

Recent advances in the field of integrated circuits based on sustainable and transparent amorphous oxide semiconductors (AOSs) are presented, demonstrating ultrahigh performance operating state-of-the-art integrated inverters comprising metal–semiconductor field-effect transistors (MESFETs) with amorphous zinc tin oxide (ZTO) as a channel material. All individual circuit layers have been deposited entirely at room temperature, and the completed devices did not require undergoing additional thermal annealing treatment in order to facilitate proper device functionality. The demonstrated ZTO-based MESFETs exhibit current on/off ratios of over 8 orders of magnitude a field-effect mobility of 8.4 cm2 V−1 s−1, and they can be switched within a voltage range of less than 1.5 V attributed to their small subthreshold swing as low as 86 mV decade−1. Due to adjustments of the circuit layout and, thus, the improvement of certain geometry-related transistor properties, the associated Schottky diode FET logic inverters facilitate low-voltage switching by exhibiting a remarkable maximum voltage gain of up to 1190 with transition voltages of only 80 mV while operating at low supply voltages ≤3 V and maintaining a stable device performance under level shift. To the best of our knowledge, the presented integrated inverters clearly exceed the performance of any similar previously reported devices based on AOS, and thus, prove the enormous potential of amorphous ZTO for sustainable, scalable low-power electronics within future flexible and transparent applications.

Role of tungsten dopants in indium oxide thin-film transistor on radiation hardness technology

The effects of radiation on tungsten doped indium oxide (IWO) thin-film transistors (TFTs) have been well investigated in this Letter. In order to achieve high stability and excellent electrical performance simultaneously even in high ionizing radiation damage ambient, different concentrations of tungsten dopant have been introduced for the TFT device fabrication. It is interesting that the high energy ionizing radiation may significantly increase the conductivity and influence the total concentration of oxygen vacancy in the transparent amorphous oxide semiconductor material, which may be completely different from the traditional radiation damage effect for silicon based CMOS devices. However, that abnormal phenomenon will be effectively suppressed by the powerful carrier suppressor, tungsten, which may have a high oxygen bond dissociation energy. Therefore, IWO devices with a 4% tungsten oxide dopant might be the optimized result even after high dosage ionizing radiation exposure. Hence, it may provide a promising radiation hardness approach to improve both the electrical characteristics and reliability for next generation displays, which can be used in the control system of nuclear power generation or space technology.

Electric field thermopower modulation analyses of the operation mechanism of transparent amorphous SnO2 thin-film transistor

Transparent amorphous oxide semiconductors (TAOSs) based transparent thin-film transistors (TTFTs) with high field effect mobility (μFE) are essential for developing advanced flat panel displays. Among TAOSs, amorphous (a-) SnO2 has several advantages against current a-InGaZnO4 such as higher μFE and being indium-free. Although a-SnO2 TTFT has been demonstrated several times, the operation mechanism has not been clarified thus far due to the strong gas sensing characteristics of SnO2. Here we clarify the operation mechanism of a-SnO2 TTFT by electric field thermopower modulation analyses. We prepared a bottom-gate top-contact type TTFT using 4.2-nm-thick a-SnO2 as the channel without any surface passivation. The effective thickness of the conducting channel was ∼1.7 ± 0.4 nm in air and in vacuum, but a large threshold gate voltage shift occurred in different atmospheres; this is attributed to carrier depletion near at the top surface (∼2.5 nm) of the a-SnO2 due to its interaction with the gas molecules and the resulting shift in the Fermi energy. The present results would provide a fundamental design concept to develop a-SnO2 TTFT.

Structure–Charge Transport Relationships in Fluoride-Doped Amorphous Semiconducting Indium Oxide: Combined Experimental and Theoretical Analysis

Anion doping of transparent amorphous metal oxide (a-MO) semiconductors is virtually unexplored but offers the possibility of creating unique optoelectronic materials owing to the chemical tuning, modified crystal structures, and unusual charge-transport properties that added anions may impart. We report here the effects of fluoride (F–) doping by combustion synthesis, in an archetypical metal oxide semiconductor, indium oxide (In–O). Optimized fluoride-doped In–O (F:In–O) thin films are characterized in depth by grazing incidence X-ray diffraction, X-ray reflectivity, atomic force microscopy, X-ray photoelectron spectroscopy, and extended X-ray absorption fine structure (EXAFS). Charge-transport properties are investigated in thin-film transistors (TFTs), revealing that increasing fluoride content (0.0 → 1.57 atom %) slightly lowers the on-current (Ion) and electron mobility due to scattering from loosely bound F– centers but enhances important TFT performance parameters such as the Ion/Ioff ratio, subthreshold swing, and bias stress stability, yielding superior TFT switching versus undoped In–O. These results are convincingly explained by ab initio molecular dynamics simulations and density functional theory electronic structure calculations. Combined with the EXAFS data, the experimental and theoretical results show that F– hinders crystallization by enhancing the local and medium-range disorder, promotes a uniform film morphology, and favors the formation of deeper, more localized trap states as compared to F–-free In–O. These data also show that the local organization and electronic structure of amorphous F–-doped oxide semiconductors are significantly different from those of F–-doped crystalline oxide semiconductors and suggest new avenues to further modify a-MOs for enhanced optoelectronic properties.

High Performance of Cost-Effective Low-E Coating on Flexible PET Substrate with Transparent Amorphous Oxide Semiconductor

Utilizing amorphous semiconductor materials of Si–In–Zn–O (SIZO) and metal Ag, oxide–metal–oxide (OMO) low-emissivity (low-E) coatings were deposited onto flexible substrates at room temperature. It is known that optical and electrical properties of OMO multilayers are very sensitive to the thickness of middle Ag layer. Experimentally, by optimizing the thickness of middle Ag layers, it was found that 11 nm Ag thickness showed excellent properties in terms of transmittance and electrical resistance based on figure of merit. Under optimized conditions, OMO multilayer shows high transmittance of about 90% in visible region, and high reflectivity of above 90% at 2200 nm. Also, flexibility and adhesion properties were improved in bending test. Experimental results indicated that SIZO–Ag–SIZO is promising for high performance and cost-effective low-E coating fabrication.

Effects of Al Addition on Resistive-Switching Characteristics of Solution Processed Zn-Sn-O ReRAMs.

Resistive random access memory (ReRAM) using amorphous Al-doped zinc tin oxide (a-AZTO) as resistive switching layer was fabricated by solution based deposition method. The a-AZTO films with different compositions (Al:Zn:Sn 0:1:1, 0.1:1:1 and 0.2:1:1) were prepared by solution based deposition method using low process temperature. The developed a-AZTO resistive switching nonvolatile memory devices with a Ti/Al-Zn-Sn-O (AZTO)/Pt structure exhibited typical bipolar switching behavior, remaining in a stable resistance state with exhibiting switching responses over 100 cycles, and a retention time of 10⁴ s. The resistive switching characteristics of a-AZTO ReRAMs were improved by increasing Al concentration. We demonstrate the electrical characteristics of a-AZTO TFTs are comparable to IGZO TFTs. The replacement of IGZO film with AZTO film can effectively reduce the consumption of indium (In), a toxic and rare metal, prominently reducing the production cost of transparent amorphous oxide semiconductor (TAOS) based electrical devices and improving environmental safety. Therefore, it is expected that the a-AZTO ReRAMs integrated with a-AZTO TFTs in the backplane of emerging transparent flat panel displays (FPDs) is potentially beneficial for the realization of system-on-panel (SoP) applications.

Biocompatible and Na+-sensitive thin-film transistor for biological fluid sensing

ABSTRACT In this study, we develop a Na+-sensitive thin-film transistor (TFT) for a biocompatible ion sensor and investigate its cytotoxicity. A transparent amorphous oxide semiconductor composed of amorphous In–Ga–Zn–oxide (a-InGaZnO) is utilized as a channel of the Na+-sensitive TFT, which includes an indium tin oxide (ITO) film as the source and drain electrodes and a Ta2O5 thin-film gate, onto which a Na+-sensitive membrane is coated. As one of the Na+-sensitive membranes, the polyvinyl chloride (PVC) membrane with bis(12-crown-4) as the ionophore used on the TFT sensors shows good sensitivity and selectivity to changes in Na+ concentration but has high cytotoxicity owing to the leaching of its plasticizer to the solution; the plasticizer is added to solve and entrap the ionophore in the PVC membrane. On the other hand, a plasticizer-free Na+-sensitive membrane, the fluoropolysilicone (FPS) membrane with the bis(12-crown-4) ionophore, also reduces cell viability owing to the leaching of the ionophore. However, the FPS membrane with calix[4]arene as the ionophore on the gate of TFT sensors exhibits not only favorable electrical properties but also the lack of cytotoxicity. Thus, considering structural flexibility of TFTs, a platform based on TFT sensors coated with the Na+-sensitive FPS membrane containing calix[4]arene is suitable as a biocompatible Na+ sensing system for the continuous monitoring of ionic components in biological fluids such as sweat and tears.

P-Type transparent amorphous oxide thin-film transistors using low-temperature solution-processed nickel oxide

Transparent amorphous oxide semiconductor (TAOS) represented by a-InGaZnO (IGZO) has achieved their commercial success in the display industry due to its superior material properties (e.g. high mobility (>10 cm2 V−1 s−1), good transparency and excellent uniformity). However, TAOSs with excellent electrical properties are all n-type due to the particular electronic structures of oxide materials. The absence of high performance p-type TAOS limits the device application such as complimentary circuit and is now the largest drawback for oxide electronics. Here, we propose a low-temperature solution method to fabricate p-type transparent amorphous nickel oxide (NiO). The influence of processing parameters such as annealing temperature, precursor concentration, source/drain electrode, and dielectric layer is systematically investigated to maximum the NiO device performance. The optimized NiO TFT exhibits outstanding p-channel behavior, including a high hole mobility of 6.0 cm2 V−1 s−1, remarkable on/off current modulation ratio of ∼107, and good subthreshold swing of 0.13 V/decade. The high performance NiO device is attributed to the synergistic optimization of annealing temperature, channel thickness, source/drain electrodes, and dielectric materials. The properties of our p-type TAOS are comparable with that of traditional n-type TAOS.

Spontaneous Non-stoichiometry and Ordering in Degenerate but Gapped Transparent Conductors

Spontaneous Non-stoichiometry and Ordering in Degenerate but Gapped Transparent Conductors

Bipolar resistive switching characteristics of tungsten-doped indium–zinc oxide conductive-bridging random access memory

The purpose of this work is to develop a reliable amorphous tungsten-doped indium-zinc oxide based conductive-bridging random access memory (CBRAM). The device with Cu/TiW/InWZnO/Pt structure exhibits stable bipolar resistive switching behavior. The device also shows good non-volatile memory characteristics, such as low operation voltage, on/off resistance ratio (∼102), high switching endurance (more than 5×102 cycles). The temperature coefficient of resistance in the conductive filament confirms that an electro-chemical metallization (ECM) based conduction is observed in the InWZnO device. Furthermore, the temperature retention characteristics and the current transport mechanisms are also investigated. According to our experiments, we propose a model to explain the resistive switching phenomenon observed in our devices. These results have given a great potential for the transparent amorphous oxide semiconductor (TAOS)-based material utilizing in CBRAM stacks and integrating into the display circuits for future memory-in-pixel applications.

Back-End of Line Compatible Transistors for Hybrid CMOS Applications

The low-temperature back-end of line (BEOL) compatible transparent amorphous oxide semiconductor (TAOS) TFTs and poly-Si TFTs are the suitable technology platform for three-dimensional (3D) integration hybrid CMOS technologies. The n-channel amorphous indium tungsten oxide (a-IWO) ultra-thin-film transistors (UTFTs) have been successfully fabricated and demonstrated in the category of indium oxide based thin film transistors (TFTs). We have scaled down thickness of a-IWO channel to 4nm. The proposed a-IWO UTFTs with low operation voltages exhibit good electrical characteristics: near ideal subthreshold swing (S.S.) ~ 63mV/dec., high field-effect mobility (μFE) ~ 25.3 cm2/V-s. In addition, we also have fabricated the p-channel poly-Si TFTs with high-κ gate insulator (GI). The matched electrical characteristics of n-channel and p-channel devices with low operation voltage and low IOFF are exhibiting the promising candidate for future hybrid CMOS applications.

Transparent Amorphous Oxide Semiconductor as Excellent Thermoelectric Materials

It is demonstrated that transparent amorphous oxide semiconductors (TAOS) can be excellent thermoelectric (TE) materials, since their thermal conductivity (κ) through a randomly disordered structure is quite low, while their electrical conductivity and carrier mobility (μ) are high, compared to crystalline semiconductors through the first-principles calculations and the various measurements for the amorphous In−Zn−O (a-IZO) thin film. The calculated phonon dispersion in a-IZO shows non-linear phonon instability, which can prevent the transport of phonon. The a-IZO was estimated to have poor κ and high electrical conductivity compared to crystalline In2O3:Sn (c-ITO). These properties show that the TAOS can be an excellent thin-film transparent TE material. It is suggested that the TAOS can be employed to mitigate the heating problem in transparent display devices.