Transient Circuit Research Articles

Cellular physiology of the neonatal rat cerebral cortex

The early development of the cerebral cortex is characterized by neurogenesis, neuronal migration, cellular differentiation and programmed cell death. Cajal-Retzius cells, developing cortical plate neurons and subplate cells form a transient synaptic circuit which may serve as a template for the formation of cortical layers and columns. These three neuronal cell types show distinct electrophysiological properties and synaptic inputs. Endogenous or exogenous harmful disturbances during this developmental period may lead to the preservation of early cortical circuits, which may act as trigger zones for the initiation of pathophysiological activity.

Transient RankingMethods for the Simplification of Nonlinear DAE Systems in Analog Circuit Design

AbstractSymbolic analysis of analog circuits using computer algebra is limited by the complexity problem: even for small circuits the symbolic equation systems get too large to be handled efficiently. In the past years simplification techniques have been developed which reduce the complexity of such equation systems. In this paper we are focusing on simpli fication techniques for equations modeling nonlinear transient analog circuits. Here it is necessary to control the dynamic behavior of the simplified system. For this, we developed two different methods which predict the influence of a simplification on the equations' transient solution. We will describe both methods and compare their efficiency and accuracy.

Transient electronics: pulsed circuit technology

Preface. Mathematical Techniques for Pulse and Transient Circuit Analysis. Transmission Line Theory and Transient Response. Pulse--forming Lines. Pulse--forming Networks. Pulse Transformers. Transmission Line Pulse Transformers. Pulse Generators using Capacitive and Inductive Energy Storage. Nonlinear Pulsed Circuits. Appendix: Table of Laplace Transforms. Index.

Transient current off-chip sensor circuit for digital IC production testing

An off-chip monitor is presented that measures the transient supply current of CMOS ICs and provides the charge delivered to the circuit. The monitor is designed to be placed on the automatic test equipment board fixture and automate transient current supply testing. Experimental results demonstrate up to 1 GHz bandwidth operation.

Generalized analysis of quasi-steady-state and transient decay open circuit voltage measurements

The current–voltage characteristics of solar cells and photodiodes can be determined by measuring the open-circuit voltage as a function of a slowly varying light intensity. This article presents a detailed theoretical analysis and interpretation of such quasi-steady-state Voc measurements (QssVoc). The ability of this analysis to accurately obtain the true steady-state device characteristics even in the case of high lifetime, high resistivity silicon devices is demonstrated experimentally. The QssVoc technique can be used to determine the minority carrier lifetime, and the new generalized analysis is required to do this accurately. An important outcome is that solar cell and diode device characteristics can be obtained from measurements of either the photoconductance or the open-circuit voltage, even using transient techniques.

New symmetrical buffer design for VLSI applications

Novel fast buffers by the transient part circuit technique are described in this paper. The proposed circuits are fully symmetrical in their structure, therefore the design is straightforward and the well balanced speed can be easily obtained. As compared with prior work, the delay ratio of this work is over 300% and 10% balance improvement, respectively. While based on a design criterion of the same area the proposed buffer circuit shows 27% and 76% average speed enhancements on propagation delays with only 7.3% average increase in its power consumption.

A transient recorder circuit for subnanosecond signals from solid state strip detectors

The architecture of a transient recorder circuit designed for storing fast signal profiles delivered by silicon or gallium arsenide detectors is described. The sampling step may be adjusted from a minimum time interval of 25 ps up to several nanoseconds. The transient recorder has a bandwidth of 500 MHz and samples 8 points of the signal profile. An important useful characteristic of the transient recorder is that the 8 points of the sampled signal may be set at unequal, arbitrary time intervals. Common, fast waveforms from an electronic pulser have been used in the performance evaluation of a transient recorder circuit by comparing input and output signal profiles. The synchronization time of two transient recorders is 20 ps and worsens as the sampling step size increases.

State-variable-based transient circuit simulation using wavelets

For the first time a state variable transient analysis using wavelets is developed and implemented in a circuit simulator. The formulation is particularly well suited to modeling RF and microwave circuits and is validated by considering a nonlinear transmission line. However, results indicate that still more research is needed to make this method efficient for the simulation of large circuits.

Transient analysis of an electromagnetic shaker using circuit simulation with response surface models

A numerical model of an electromagnetic shaker (a linear actuator used for active vibration control) is constructed based on magnetostatic analyses and response surface models. This model is incorporated into a transient circuit simulator to obtain the frequency response of the shaker and its behavior at resonance. The simulation results are compared to experimental measurements.

Transient short circuit current calculation using decoupled networks

Classical fault analysis methods for power systems are based on symmetrical components to represent various fault configurations. The complete electrical network is decomposed using a complex transformation matrix into decoupled zero, positive and negative sequence circuits. Faulted power system steady-state voltages and currents are computed using a nodal analysis solution method. This paper presents an extension of the above methodology using discretized RLC elements for the computation of the actual transient response of a network for various fault types. The decoupled networks are obtained using a real transformation matrix.

Simulation of SOI devices and circuits using BSIM3SOI

A versatile SOI model derived from the BSIM3v3 bulk MOSFET model is capable of simulating partially and fully depleted devices with options for self-heating and floating body effects. The model can automatically switch between fully and partially depleted regimes. After refining body current models we for the first time present successful dc and transient device and circuit simulation of an SOI MOSFET technology with L/sub eff/ below 0.2 /spl mu/m.

Transient supply clamp with a variable RC time constant

This paper summarizes several basic supply clamping techniques and presents an innovative transient clamp circuit that makes use of some properties of a variable voltage clamp. This circuit varies its RC time constant dependent upon whether or not the integrated circuit (IC) is mounted on a printed circuit (PC) board. If the IC is mounted the time constant of the transient clamp is set very short so it will not interfere in the normal operation of the device. However, if the IC is free standing the RC time constant is set much longer to insure the clamp will stay on long enough to discharge the entire ESD pulse should the need arise. This clamp circuit was used as a component in the electrostatic discharge (ESD) protection network for an analog intermediate frequency (IF) Limiter IC. Human Body Model (HBM) ESD levels increased from less than 300 V to greater than 2000 V due to the addition of this protection network.

Complement Activation of Electrogenic Ion Transport in Isolated Rat Colon

The complement cascade is an important component in many immune and inflammatory reactions and may contribute to both the diarrhoea and inflammation associated with inflammatory bowel disease. Isolated rat colonic mucosae were voltage clamped in Ussing chambers. Basolateral addition of zymosan-activated whole human serum (ZAS) induced a rapid onset, transient inward short circuit current (SCC). This response was concentration dependent and was significantly attenuated by pre-heating ZAS at 60°C for 30 min. Depletion of complement from normal human serum with cobra venom factor (CVF) significantly lowered SCC responses. Chloride was the primary charge carrying ion as responses to ZAS were abolished in the presence of the loop diuretic bumetanide. The complement component C3a stimulated ion transport but not to the same extent as whole serum. Exogenous C5 was without effect. The cyclooxygenase inhibitor piroxicam significantly attenuated the response to ZAS. These findings support the possibility that complement activation may contribute to the pathophysiology of secretory diarrhoea since activation of electrogenic chloride secretion converts intestinal epithelia to a state of net fluid secretion.

A survey of behavioral modeling of ferroelectric capacitors

Six different behavioral models for ferroelectric capacitors are surveyed with an emphasis on their usefulness in the transient circuit simulation of integrated nonvolatile memories. These models can be broadly classified into two categories, namely, those that rely on the hysteresis loop and those that rely on the switching current of a ferroelectric capacitor. The former often involves a continuous cycling of a ferroelectric capacitor with a sinusoidal waveform. The latter employs a pulse measurement technique to capture the switching current of the capacitor. The pulse waveform applied to the ferroelectric capacitor in the latter approach resembles the actual waveform encountered in a typical ferroelectric memory access. This resemblance makes switching-current based models more suitable for use in high-speed-memory circuit simulations.

A generalized approach for modelling the nonlocal memory of hysteretic systems

Transient circuit simulations require more and more exact models for representing nonlinear magnetics under a wide variety of operating conditions. Among the huge number of contemporarily used hysteresis models, however, the nonlocal memory model in particular is often considered insufficient with regard to, for instance, power circuit computations. This paper presents the possibility of physically accurate modelling of so-called minor loops. The approach can be combined with any existing hysteresis model and requires no additional parameters.

Use of a saturating choke in the series capacitor compensation of distribution lines

Series capacitors can increase the power carrying capacity of subtransmission and distribution lines by reducing voltage regulation. When considering series capacitor compensation of distribution lines and subtransmission lines careful consideration needs to be given to capacitor location, ferroresonance, ohmic reactive value, transient behaviour, short circuit withstand and capacitor protection. Conventional design approaches include shunt connected resistors, spark gaps, metal oxide varistors, thyristor controlled reactors and bypass switches. The use of a saturating choke and damping resistor to control ferroresonance, transients, and through-fault currents is described. A small-scale laboratory nonlinear single-phase ferroresonant circuit was constructed with realistic per unit component values. Both 3rd and 2nd subharmonic ferroresonance modes were predicted by modelling and generated in practice. Choke and damping resistor parameters were selected by modelling to eliminate all the unwanted ferroresonant states. Experimental work confirmed that all the unwanted ferroresonant states were eliminated from the laboratory circuit. The transient and short circuit performance of the system is considered. The proposed arrangement offers an effective countermeasure to ferroresonance for series compensated distribution lines. The system also allows some control of system fault levels and transient circuit behaviour. The technique is simple, effective and requires no sophisticated control, protection or bypass switch systems.

Design considerations for CMOS digital circuits with improved hot-carrier reliability

The hot-carrier induced degradation of the transient circuit performance in CMOS digital circuit structures is investigated and modeled. Delay-time degradation as a result of transistor aging, as opposed to current degradation, is devised as a more realistic measure of long-term circuit reliability. It is shown that for a wide class of circuits, the performance degradation due to dynamic hot-carrier effects can be expressed as a function of the nMOS and pMOS transistor channel widths, and the output load capacitance. In addition, the influence of the parasitic gate-drain overlap capacitance and the resulting drain voltage overshoot upon aging characteristics is investigated. The degradation of tapered (scaled) inverter chains is modeled, and a simple design guideline based on the scaling factor (F) and the transistor aspect ratio (/spl tau/) is presented for the improvement of long-term reliability in scaled buffer structures with respect to hot-carrier induced device aging. Also, a number of simple design rules based on device geometry, circuit topology and power supply voltage are presented to ensure hot-carrier reliability.

A 2D simulation study on the d.c. and transient behaviour of a SiGe-base heterojunction bipolar device with an extended germanium profile into the n-epi region with application to an ECL buffer

This paper reports a two-dimensional simulation study of the d.c. and transient behaviour of a SiGe-base HBT with an extended germanium profile into the n-epi region. With an extended Ge profile, the unity gain frequency, which suffers less from high injection degradation, is insensitive to the Ge content. In addition transient circuit analysis shows that the speed behaviour of an ECL buffer is less influenced by high injection effects.

Magnetic circuit modelling of the field regulated reluctance machine. Part I: model development

A transient magnetic circuit model of a field regulated reluctance machine is presented. The model is based on flux loop equations rather than node equations as have previously been employed. A key feature of this approach is that magnetic circuit models based on loop equations permit an entire machine to be represented by only one equivalent pole.

CircuitViz: a new method for visualizing the dynamic behavior of electric circuits

Visualizing the dynamic behavior of electric circuits constitutes an important part of the learning process for students studying circuits. Circuit variables (voltage, current, power, and stored energy) are traditionally displayed separately from the circuit schematic as a Cartesian plot, but advances in scientific visualization indicate that merging all relevant data into a single visualization object, or graphic metaphor, improves the viewer's ability to perceive global relationships and thereby enhances understanding of the system under study. CircuitViz places the two-dimensional circuit diagram into a three-dimensional coordinate system and displays the circuit variables directly on the circuit diagram along the third spatial variable, and the display is animated to show time-dependent behavior. The visual cues are motivated by mechanical analogies (primarily the water-flow analogy) so as to draw upon the student's existing knowledge base. Examples of first-order circuits are presented in the paper. Initial classroom tests indicate that CircuitViz can motivate discussions of circuit operation by effectively illustrating qualitative circuit behavior, and most students report that the technique improved their understanding of transient circuit behavior.