Total Oxide Charge Research Articles

Novel Spiral Silicon Drift Detector with Equal Cathode Ring Gap and Given Surface Electric Fields.

Since the advent of semiconductor detectors, they have been developed for several generations, and their performance has been continuously improved. In this paper, we propose a new silicon drift detector structure that is different from the traditional spiral SDD structure that has a gap between the cathode ring and the width of cathode ring, increasing gradually with the increase of the radius of the cathode ring. Our new structure of spiral SDD structure has equal cathode ring gap and a given surface electric field, which has many advantages compared with the traditional structure. The novel SDD structure controllably reduces the area of silicon oxide between the spiral rings, which in turn reduces the surface leakage current due to the reduction of total oxide charge in the silicon oxide and electronic states on the silicon/silicon oxide interface. Moreover, it has better controllability to adjust this spiral ring cathode gap to achieve better surface electric field distribution, thus realizing the optimal carrier drift electric field and achieving the optimal detector performance. In order to verify this theory, we have modeled this new structure and simulated its electrical properties using the Sentaurus TCAD tool. We have also analyzed and compared different spiral ring cathode gap structures (from 10 µm to 25 µm for the gap). According to the simulation results of potential, electric field, and electron concentration, we have obtained that a spiral ring cathode gap of 10 µm has the best electrical characteristics, more uniform distribution of potential and surface electric field, and a more smooth and straight electron drift channel.

Improved Model for Ionization-Induced Surface Recombination Current in p-n-p BJTs

The p-n-p bipolar junction transistors (BJTs) are susceptible to surface recombination in both the emitter-base depletion and neutral base (NB) regions when their passivation oxide layers are damaged by ionization irradiation, leading to an increase of base current. The previous model of excess base current proposed in 2015 omits the damage in the NB and the impact of oxide charges, which results in an underestimation of bias sensitivity of excess base current. This work presents a physics-based improvement of the previous model, and it provides a much better fit to the experimental data for the bias dependence of excess base current for the 2N2907 vertical and gate-controlled lateral p-n-p BJTs subjected to γ-ray irradiation. The model suggests that the damage in the NB can be significant for a lateral p-n-p with a wide base, operated at high bias voltage, and exposed to a low dose. Furthermore, the model provides a simple and practical method to separate and estimate the total oxide charge and increased interface trap densities from excess base current readings on irradiated p-n-p BJTs. The extracted values of interface trap densities show less dependence on E-B bias voltage than with previous models, which provides evidence of its improved precision.

Electrical properties of metal/Al2O3/In0.53Ga0.47As capacitors grown on InP

To overcome the Fermi-level pinning in III-V metal-oxide-semiconductor capacitors, attention is usually focused on the choice of dielectric and surface chemical treatments prior to oxide deposition. In this work, we examined the influence of the III-V material surface cleaning and the semiconductor growth technique on the electrical properties of metal/Al2O3/In0.53Ga0.47As capacitors grown on InP(100) substrates. By means of the capacitance-voltage measurements, we demonstrated that samples do not have the same total oxide charge density depending on the cleaning solution used [(NH4)2S or NH4OH] prior to oxide deposition. The determination of the interface trap density revealed that a Fermi-level pinning occurs for samples grown by metalorganic chemical vapor deposition but not for similar samples grown by molecular beam epitaxy. Deep level transient spectroscopy analysis explained the Fermi-level pinning by an additional signal for samples grown by metalorganic chemical vapor deposition, attributed to the tunneling effect of carriers trapped in oxide toward interface states. This work emphasizes that the choice of appropriate oxide and cleaning treatment is not enough to prevent a Fermi-level pinning in III-V metal-oxide-semiconductor capacitors. The semiconductor growth technique needs to be taken into account because it impacts the trapping properties of the oxide.

Electron-beam deposited SiO2 investigated by scanning capacitance microscopy

The quality of electron-beam deposited, few nanometers thick, SiO2 layers on silicon substrates was investigated by scanning capacitance microscopy and spectroscopy. Rapid thermal annealing had to be applied prior to the capacitance versus voltage [C(V)] measurements to obtain typical metal-oxide-semiconductor behavior, and it was found that the total oxide charge is negative on the deposited oxide layers. Higher annealing temperatures resulted in an overall reduction of the number of oxide charges. This opens up the possibility to use electron-beam deposited SiO2 as a dielectric material in metal-oxide-semiconductor prototyping applications.

In-Line Copper Contamination Monitoring Using Noncontact Q ­ VSPV Techniques

A novel approach for the sensitive detection and unequivocal identification of trace amounts of copper introduced into p-type silicon and its oxide during high-temperature processing is discussed. Noncontact surface voltage and surface photovoltage (SPV) measurements are employed to determine the impact of copper impurities on distinct bulk silicon, interface, and oxide properties. For oxidized p-type Si, the characteristic copper signature comprises an increased oxide charge and a pronounced decrease in the minority carrier recombination lifetime upon optically induced formation of copper precipitates in the silicon bulk. During illumination, out-diffusion of copper to the silicon-oxide interface occurs simultaneously with precipitation and results in an increased interface trap density. For a complete overview on the distribution of the copper impurity on the various defect states before and after optical activation, the recombination lifetime, the interface trap density, and the total oxide charge have to be monitored. © 2004 The Electrochemical Society. All rights reserved.

Impact of Post-Oxidation Annealing on Low-Frequency Noise, Threshold Voltage, and Subthreshold Swing of p-Channel MOSFETs

The impact of post-oxidation annealing on the low-frequency noise, threshold voltage, and subthreshold swing of p-channel MOSFET is reported. The low-frequency noise is improved significantly with post-oxidation annealing and a modest V/sub T/ and S reduction is observed. Oxide traps are primarily extracted from measured noise. They are also extracted from threshold voltage and subthreshold slope shift. The contribution of oxide traps to threshold voltage shift and 1/f noise is analyzed through quantitative approach in the light of correlated fluctuation theory. Analysis on experimental results shed light on the well-known controversy about the origin of low-frequency noise, suggesting that experimental results are in agreement with mobility fluctuation theory whereas correlated number fluctuation theory explains the result assuming only a fraction of total oxide charge at a given energy level participates in the generation of low-frequency noise.

Point defects in thermal SiO2 layers: Thermally stimulated luminescence and corona oxide electrical characterization

Point defects in thin (≈100 Å) SiO2 layers thermally grown on silicon were investigated by thermally stimulated luminescence (TSL) and corona oxide characterization of semiconductor measurements. A comparison is proposed between layers grown by steam and N2 diluted steam processes. The effects of post-growth annealing treatments in N2O, NO, and N2 atmospheres and of ion irradiation (As or P) have been investigated. A good correlation between the results obtained by the two different techniques has been found, suggesting a common structural origin of defects responsible for TSL active traps and total oxide charge.

Electron and hole trapping in the bulk and interface with Si of a thermal oxide grown on the sidewalls and base of a U-shaped silicon trench

We report on the results of deep level transient spectroscopy (DLTS) and capacitance–voltage studies made on U-shaped trench-gated n +-polycrystalline Si-oxide–Si capacitors. The two processing steps examined are the reactive ion etching of the trench and the thermal oxide growth between 900 and 1175 °C. The mid-gap SiO 2/Si interface state density (∼10 11 eV −1 cm −2) and the total oxide charge (∼10 nC cm −2) are observed to increase with increasing oxide growth temperature. The electron trapping and hole trapping at the interface are observed by DLTS and are argued to occur within dangling bonds. Variations in dangling bond orientation with respect to the plane of the interface coupled with the variation in the local stress state at the dangling bond site, are suggested to cause energy level splitting and/or broadening, thereby, giving rise to interfacial dangling bond energy bands. These bands are observed by DLTS as symmetrical and broad signals (∼100 meV wide) at ∼0.20–0.29 eV below the bottom of the conduction band for the electron traps, and at ∼0.29 eV above the valence band edge for the hole traps. As carriers are trapped within states in these bands the corresponding dangling bond defects change their charge states from neutral to singly negative in the electron traps or to singly positive in the hole traps. This is inferred from the capture cross-sections obtained for electrons and holes at the traps which are found to be of the order of 10 −15 cm 2.

Flat band voltage shift and oxide properties after rapid thermal annealing

The flat band voltage ( V fb) shift observed for MOS samples exposed to rapid thermal annealing (RTA) (N 2, 20 s, 1040°C) is examined for (1 0 0), (1 1 0) and (1 1 1) orientation-silicon substrates. Using a mercury gate C– V system, the V fb shift can be attributed to changes in the electronic properties of the oxide layer and not polysilicon gate effects, as had previously been suggested. In addition, this work indicates that the flat band voltage shift results from a reduction of interface and fixed oxide charge due to the RTA process. The interface and oxide charge densities are related to the density of available bonds for each surface orientation, both before and after an RTA step. Based on these results, we argue that the V fb shift following RTA is primarily due to a reduction of fixed positive charge in the oxide, and to a lesser degree, to a reduction of negative interface charge. The net effect is that the RTA step reduces the total oxide charge density.

Quantum Mechanical Influence on Flat-Band Capacitance in Metal-Oxide-Semiconductor Structures with a Nanometer-Thick Silicon Oxide Film and the Impact of Oxide Charge Evaluation

In this paper, we describe theoretically how the quantum-mechanical carrier distribution in the flat-band condition influences the flat-band capacitance. It is numerically demonstrated that the semiclassical method overestimates the flat-band capacitance when the quantum-mechanical effect is significant. It is also shown that the quantum-mechanical flat-band capacitance at the gate poly-Si/SiO2 interface significantly influences the total flat-band capacitance and oxide charge evaluation.

Study of interface state density and effective oxide charge in post-metallization annealed SiO/sub 2/-SiC structures

A systematic study of post-metallization annealing (PMA) effect on the quality of thermal SiO/sub 2/ on p-type 6H- and 4H-SiC has been carried out. A simultaneous quasi-static hi-lo frequency capacitance-voltage method has been employed to measure the total effective oxide charge (N/sub eff/) and interface state density (D/sub it/). To ensure accurate results, D/sub it/ was measured at 350/spl deg/C which, depending on the hole capture cross sections, should enable the measurement of interface states located in the band gap as deep as 1.3-1.5 eV from the valence band edge. The dependence of N/sub eff/ and D/sub it/ on annealing temperature and ambient as well as the effect of thermal and sputtered gate metal on the oxide quality are reported. It is shown that N/sub eff/ values close to the detection limit due to the uncertainty in SiC electron affinities and D/sub it/ values below 1/spl times/10/sup 11/ cm/sup -2//eV deep in the band gap can be reproducibly obtained for both p-type 6H- and 4H-SiC.

Electrical Properties of Sol-Gel Processed Amorphous BaTiO3 Thin Films

BaTiO3 thin films were prepared on single crystal silicon (1 0 0) and platinum substrates by sol-gel technique. Amorphous films with thickness uniformity were obtained by spinning the solution at 3000 rpm for 30 s and by post-deposition annealing at 400°C. The films exhibited good dielectric and insulating properties. The dielectric constant and dissipation factor at a frequency of 100 kHz were 17 and 0.20, respectively, for 1400 A thick film on platinum substrate (MIM). The corresponding values were 16 and 0.015 for films on Si (MIS). Dielectric properties were also studied as functions of frequency and voltage. The C-V curve for MIS structure exhibited a hysteresis. The density of interface states recharged during the bias cycle in hysteresis measurement was estimated to be of the order of 2.10 × 1011 cm−2 and total oxide charge density was about 4.28 × 1011 cm−2. I-V measurements were performed on films of different thicknesses. The leakage current densities at 5 V for the films having thicknesses 1400 and 2800 A were 0.86 and 0.11 μA/cm2 respectively. The conduction mechanism is found to be Poole-Frenkel and Schottky mechanisms at low and high fields, respectively.

Fast electrochemical reactions during the anodization of platinum electrodes in aqueous solutions. Detection of a reversible charge storage process at platinum-oxide-coated electrodes

Fast electrochemical reactions at platinum and platinum-oxide-coated electrodes immersed in aqueous electrolytes can be observed by means of the triangularly modulated triangular potential sweep technique. The surface redox process commences at about 0.75 V in acid solution and is related to the initial oxygen-containing species reversibly electroadsorbed on platinum. Platinum coated with an oxide layer formed through a potentiodynamic routine presents a reversible charge storage process at about 1.6 V in acid solution. The corresponding reaction can be interpreted as a reversible redox couple involving Pt(II)-Pt(IV) and proton injection in the platinum oxide matrix. The charge contribution of the second redox system is smaller than the total oxide charge accumulated on the substrate. Both fast redox systems appear also in base solutions.

The Activity of HF / H 2O Treated Silicon Surfaces in Ambient Air Before and After Gate Oxidation

A strong correlation is observed among surface charge, contact angle, and native oxide thickness in which up to 10,000 min of exposure time to ambient air, the and treated surfaces seem to undergo three distinct periods of evolution. The results indicate that the treatment yields surfaces with greater activity in ambient air. The trends, which are explained by considering the reaction between unpassivated trivalent silicon and hydroxyl groups, are shown to be consistent with XPS data on surface carbon, fluorine, and oxygen. Following thermal oxidation, the total oxide charge, oxide thickness, and contact angle are stable over time. This is possibly due to the complete surface oxide coverage. The thermal oxide thicknesses of and treated surfaces are different and can be correlated to preoxidation surface XPS results. Following thermal oxidation, no differences between and are detected in terms of oxide charge and contact angle as a function of ambient air exposure time. However, results indicate that an increase in the waiting period prior to oxidation in ambient air results in lower oxide charge values. This is attributed to the increase in hydroxyl coverage as a function of waiting period.

A Correlation between Si Surface Micro-Roughness and Atomic Concentration on Surface: Application to Micro-Roughness Measurement of Si

ABSTRACTWe have developed a new method of evaluating Si surface micro-roughness, by forming thin oxide in HCI/H2O2 solution and then measuring the concentration of chlorine atoms or the total charge in this oxide. It is shown that this oxide does not affect the surface micro-roughness, and the surface concentration of chlorine atoms incorporated in this oxide and the total oxide charge are proportional to the surface micro-roughness, as obtained by AFM. From these correlations, it is possible to evaluate the surface microroughness for large areas compared with the areas of AFM measurement.

Sodium mobility in irradiated SiO2

The distribution of sodium in the oxide films of MOS capacitors was determined by etch-off procedures, using sodium-22 as a tracer. The effects on sodium distribution of ionizing radiation, of in-diffused aluminum, and of bias-temperature stressing were then determined and compared with C-V measurements of the total oxide charge in the same samples. Aluminum films sintered for 30 minutes at 500°C provided high aluminum concentrations (∼10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">20</sup> /cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> ) in the oxide near the surface, while sintering for 60 minutes caused aluminum to diffuse about three times deeper. In both cases low concentrations (∼10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">18</sup> /cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> ) were found next to the silicon. Aluminum-rich portions of the oxide were found to trap sodium, and thus the oxides with the 30-minute aluminum sinter had very little sodium concentrated near the silicon substrate (0.2 to 0.6 &time; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> /cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ); the interfacial sodium accounted for only 2% of the oxide charge determined by C-V measurements. Oxides without aluminum or with 60-minute aluminum sinter had nearly 10-fold higher interfacial sodium concentrations (1 to 6 &time; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> /cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) and this interfacial sodium accounted for 10% of the oxide charge from C-V measurements. Ionizing radiation (10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> rads in one hour from cobalt-60 at 25°C with a positive bias of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> volts/cm) increased the total oxide charge by 14 to 17 &time; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> electronic charges/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , but caused very small increases, in interfacial sodium (0.2 to 0.9 &time; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> ions/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). However, the combination of ionizing radiation followed by positive bias stress (10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> volts/cm) at 300°C for 10 minutes caused an appreciable movement of sodium to the interface in some of the oxides, especially those with no aluminum or with aluminum sintered for 60 minutes. Positive bias at 300°C for 10 minutes in aluminum-doped oxides caused large increases in negative voltage shifts (corresponding to an increase of 10 to 20 &time; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> positive charges per cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) but in the same tests no more than 3 &time; 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> sodium ions per cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> moved into the oxide next to the silicon substrate. These results suggest that the drift of positively charged aluminum interstitials may be the cause of much of the voltage shift in 300°C tests.