Total Ionizing Dose Research Articles

Characteristics and ultra-high total ionizing dose response of 22 nm fully depleted silicon-on-insulator

The radiation response of MOS transistors in a 22 nm Fully Depleted Silicon-On-Insulator (FDSOI) technology exposed to ultra-high total ionizing dose (TID) was investigated. Custom structures including n- and p-channel devices with different sizes and threshold voltage flavours were irradiated with X-rays up to a TID of 100 Mrad(SiO2) with different back-gate bias configurations, from -8 V to 2 V. The investigation revealed that the performance is significantly affected by TID, with the radiation response being dominated by the charge trapped in the buried oxide.

Radiation tolerance of the MUX64 for the High Granularity Timing Detector of ATLAS

The MUX64 ASIC is a 64-to-1 analog multiplexer to accommodate 64 inputs, with one addressed to output for ADC readout. It is developed for monitoring of the Low-Gain Avalanche Detectors (LGAD) detector modules in the High Granularity Timing Detector (HGTD) of the ATLAS Phase-II upgrade. The MUX64 chips will be used in the radiation field of high-luminosity pp collisions at LHC to an integrated luminosity of 4000 fb-1. This work presents the radiation tolerance study for the MUX64 being tested with 80 MeV protons and X-ray exposures for damages caused by Non-Ionizing Energy Loss (NIEL) and Total Ionizing Dose (TID), respectively. The irradiated samples demonstrated tolerance to the NIEL to a fluence of 3.21 × 1015 (Si, 1 MeV) neq/cm2, and the TID of 7.46 × 105 Gy (Si).

Reliability Prediction of Radiation Induced Failures in Semiconductor Packages

The growth and usage of semiconductor components has risen greatly due to evolution of applications in industries such as aerospace, defense, and automotive, in both the commercial and government sectors. Among the different types of components that make their way into such applications, digital logic and memory-based devices are of prime importance due to the ever-demanding need to store and compute vast amounts of data. This brings to the forefront the reliability of such components, especially in demanding applications in aerospace and defense where components are exposed to extremely harsh environments where high performance is critical. This is where we find that reliability is largely dependent on the susceptibility of semiconductor components to radiation induced effects - total ionizing dose (TID) and single event effects (SEE). Optimization in design, process, and packaging could make microelectronics more reliable to the radiation effects. Packaging material and thickness affect the incident flux of radiation on microelectronics and can help mitigate both dose and SEE effects in electronics. Additionally, packaging materials should not generate a high flux of secondary particles when exposed to environmental radiation (an example is alpha emissions from impurities in package mold compound or underfill). In this paper, the behavior of semiconductors at the component level due to radiation effects is evaluated. A reduced order model approach is presented where the analysis is performed at the functional block level then aggregated into component. The behavioral model can be used to predict the behavior across different operating, design, and process conditions.

Ionizing radiation influence on 28-nm MOS transistor's low-frequency noise characteristics

In this paper, we explore the transitions of low-frequency noise characteristics in high-k metal-gate bulk CMOS transistors induced by Total Ionizing Dose (TID). Due to the strong bias dependence of the noise characteristics, differentiating between noise shifts caused by the effective biasing change and the contribution of the newly generated traps becomes extremely challenging. In order to better understand the effects of irradiation, transistor noise had to be characterized at several biasing points, both in linear and saturation regions, before and after exposure to 1 Grad (SiO2) of TID. Correlation between shifts in time and frequency domain is presented in this work, along with possible explanations for each variation that occurs. We present examples of irradiation-generated Random Telegraph Noise (RTN) defects as well as various TID effects on noise Power Spectral Density (PSD) curves with pre-existing RTN sources.

Ionising radiation effects in a soft X-ray CMOS image sensor

CIS221-X is a prototype monolithic CMOS image sensor, optimised for soft X-ray astronomy and developed for the proposed ESA THESEUS mission. A significant advantage of CMOS technology is its resistance to radiation damage. To assess this resistance, four backside-illuminated CIS221-X detectors have been irradiated up to a total ionising dose of 113 krad at the ESA ESTEC 60Co facility. Using unirradiated readout electronics, the performance of each sensor has been measured before and after irradiation. The gain, readout noise and dark current are shown to increase, while the image lag remains unchanged. These measurements are compared to that of similar CMOS image sensors and a possible physical explanation is provided for each result.

Effect of 60Coγ ray radiation on electrical properties of SiGe HBTs at low temperatures

In this article, total ionizing dose (TID) irradiation experiments were carried out on germanium-silicon heterojunction bipolar transistors (SiGe HBTs) under different bias and temperature conditions. The electrical performance and noise characteristics of the device were characterized before and after irradiation using a semiconductor parameter analyzer and a 1/f noise test system, respectively. The variation of radiation sensitivity parameters with the TID effect and temperature of the device was obtained, and the mechanism of radiation damage degradation was also identified. Results suggest that the oxide-trap charges and interface states induced by irradiation are the main causes for SiGe HBT electrical parameters degradation. With the decreased temperature, Gummel characteristics and 1/f noise are significantly improved. It's found that oxide-trap charges and interface states generated at 93 K is less than that at 300 K. This work lays the foundation for the application of SiGe HBT in aerospace area.

Total ionizing dose and single event effect response of 22 nm ultra-thin body and buried oxide fully depleted silicon-on-insulator technology

The test chip including transistors and Static Random Access Memory (SRAM) is proposed and fabricated by an advanced 22 nm Ultra-Thin Body and Buried Oxide Fully Depleted Silicon-on-Insulator (UTBB FD-SOI) technology. Experimental results of Co-60 irradiation and heavy ion experiments are presented. Total Ionizing Dose (TID) experiment results show that the threshold voltage shift of the transistor is about 100 mV when the dose is 500 krad(Si) and the SRAM irradiated to a dose of at least 300 krad(Si) can maintain its functionality, which means that 22 nm UTBB FD-SOI devices exhibit significantly improved total dose tolerance performance compared to the previous generation process. TID-induced threshold voltage shift in conventional-well nMOSFET can be mitigated by applying biasing to back-gate, while back-gate biasing is invalid for TID mitigation of the conventional-well pMOSFET. Heavy ion experimental results make known that 22 nm UTBB FD-SOI technology has contributions to Single Event Effect (SEE) hardness and the hardened SRAM has higher single event upset (SEU) tolerance and even SEU immunity. The research indicates that the circuits manufactured by 22 nm UTBB FD-SOI technology have great potential space applications in harsh radiation environments.

Characterization of Single Event Effect in a Radiation Hardened Programmable Read-Only Memory in a 130 nm Bulk CMOS Technology

The concept of memory that can only be read but cannot be changed seems strange at first. In reality, it is found that it has great application potential, such as the processor with a fixed purpose, the initial set value of the microprocessor BIOS, and these data are stored in Programmable Read-Only Memory (PROM) to quickly realize system functions. The PROM storage content is fixed, greatly simplifying his design. The radiation of space particles is the main factor causing the failure of the electronic system of spacecraft. The PROM storage array of the space electronic system is the most basic guarantee for the normal operation of the electronic system. The chip adopts domestic 130 nm standard technology of Complementary Metal Oxide Semiconductor (CMOS), Muller-C digital filter is used in the peripheral subsystem of PROM storage array, and the core cell uses Dual Interlocked Cell (DICE) and ring gate and other radiation hardening technologies to design a 32Kx8bit radiation resistant asynchronous programmable PROM. Pre-silicon of devices was verified by Technology Computer Aided Design (TCAD), and post silicon radiation verification was completed through radiation experiment. The post silicon radiation experiment showed that the total ionizing Dose (TID) capacity of the PROM chip was ≥100 Krad (Si), the critical value of single event upset (SEU) was ≥37.1 MeV·cm2/mg, the critical value of single event latch up was ≥98 MeV·cm2/mg, meeting the life requirements of the initial value storage of aerospace electronic systems. These performances ensure the reliable operation of the space electronic system after restart.

TCAD simulation methodology of total ionizing dose effects for PDSOI transistor with a hump characteristic

In this work, we developed a simulation methodology with the Synopsys Sentaurus Technology Computer Aided Design (TCAD) suite in order to analyze Total Ionizing Dose (TID) effects in 65 nm Body Contacted (BC) Partially Depleted (PD) SOI technology for a MOS transistor including a hump characteristic induced by an unknown parasitic transistor.

Single event transient of SOI FinFET with total ionizing dose irradiation

Total ionizing dose (TID) irradiation impacts the device leakage currents or threshold voltage, which affects the single event transient (SET) vulnerability of electronics under radiation environment. SET response of SOI FinFET at 14 nm technology node after TID exposure is carried out at different dose level. Results show that the drain current peak presents a slight fluctuant with total dose, while the collected charge and the bipolar amplification coefficient first decrease with total dose and then increase. The potential reason is also discussed from competing mechanisms associated with decreasing threshold voltage from TID irradiation and increasing the drain diffuse current from the potential of the channel.

Total ionising dose multilayer shielding optimisation for nanosatellites on geostationary transfer orbit

The rising number of proposed nanosatellite missions with Commercial Off-The-Shelf electronics to higher orbits necessitates innovative, compact, and lightweight radiation shielding. In this study, several thousand multilayer radiation shielding configurations were simulated against trapped particle spectra predicted for a geostationary transfer orbit to demonstrate how material combinations and layer structures can be selected to minimise the total ionising dose inside nanosatellites with constrained mass budgets. The Geant4 Radiation Analysis for Space (GRAS) application was used to calculate ionising dose deposition behind multilayer shielding. Thousands of planar shielding stacks were procedurally generated and simulated on top of silicon plates representing sensitive semiconductor devices. To allow for comparison between configurations, all shielding stacks had a total mass of 1.5 g/cm2, and shielding performance was evaluated based on the total ionising dose absorbed by the silicon plates. The simulations consistently show that configurations with low-atomic-number (low-Z) materials on top of high-Z materials yield the lowest doses. The two- and three-layer mass allocation optimisations demonstrate the non-linear dependence of ionising dose on mass allocation between materials. Optimised polyethylene-lead shields achieved up to 30% lower ionising doses compared to an equal mass of either of the two materials or up to 50% lower than the same mass of aluminium. Contrary to previous claims about Z-graded shielding, no significant improvements were observed for using more than two different materials, and optimisation of multilayer shields tends to reduce them to two-layer structures. Optimal multilayer radiation shielding depends on various factors and must be tailored to specific radiation environments and mission requirements. The primary contributions of this article are the methods presented for achieving this tailoring using open-source software and parallel computing. The multilayer simulations performed for this work resulted in an extensive dataset for multilayer shielding performance that enabled novel visualisations of the ionising dose dependence on shielding composition based on quantitative results.

Simulation study of total ionizing dose effect of gamma radiation on 15 nm bulk FinFET

FinFET is a new mainstream semiconductor device that is widely used in space applications. This paper studies the effects of radiation damage typically encountered in space applications by simulating the effects of total ionizing dose (TID) from 0 to 1 Mrad on a 15 nm n-type bulk FinFET. In particular we have simulated the effects of radiation damage on the transfer characteristic curve, threshold voltage and subthreshold swing of the FinFET. We have also varied some device process parameters such as gate length, fin width and fin height in order to assess their impact on the device susceptibility to radiation damage and our results show that the device structure with longer gate length, wider fin width and taller fin height have better performance. In addition, the higher channel doping concentration, the use of SiO2 in the gate, and the low device operating temperature can also effectively reduce the TID effects.

Impact of total ionizing dose on the alpha-soft error rate in FDSOI 28 nm SRAMs

Synergy effect of total ionizing dose (TID) on alpha-soft error rate (α-SER) in FDSOI 28 nm SRAM has been experimentally characterized using a dedicated setup combining alpha-particle irradiation (241Am solid source) in vacuum chamber and 10 keV X-ray irradiation. Measurements have been performed on a 3 Mbit single-port SRAM cut powered at 1 V. Irradiations up to 125 krad(Si) have been achieved and their impact on the α-SER has been characterized from the cumulated number of bitflips as a function of the exposition time to the alpha-source. Modelling and simulation have been used to link transistor threshold voltage variations to SRAM cell stability in terms of static noise margin (SNM), critical charge (Qcrit) and finally estimated SER, in good agreement with experimental results.

Effects of Fast Neutron Irradiation on Switching of Silicon Bipolar Junction Transistor

Background: When bipolar junction transistors (BJTs) are used as switches, their switching characteristics can be deteriorated because the recombination time of the minority carriers is long during turn-off transient. When BJTs operate as low frequency switches, the power dissipation in the on-state is large. However, when BJTs operate as high frequency switches, the power dissipation during switching transients increases rapidly.Materials and Methods: When silicon (Si) BJTs are irradiated by fast neutrons, defects occur in the Si bulk, shortening the lifetime of the minority carriers. Fast neutron irradiation mainly creates displacement damage in the Si bulk rather than a total ionization dose effect. Defects caused by fast neutron irradiation shorten the lifetime of minority carriers of BJTs. Furthermore, these defects change the switching characteristics of BJTs.Results and Discussion: In this study, experimental results on the switching characteristics of a pnp Si BJT before and after fast neutron irradiation are presented. The results show that the switching characteristics are improved by fast neutron irradiation, but power dissipation in the on-state is large when the fast neutrons are irradiated excessively.Conclusion: The switching characteristics of a pnp Si BJT were improved by fast neutron irradiation.

Toward the Use of Electronic Commercial Off-the-Shelf Devices in Space: Assessment of the True Radiation Environment in Low Earth Orbit (LEO)

Low Earth orbit missions have become crucial for a variety of applications, from scientific research to commercial purposes. Exposure to ionizing radiation in Low Earth Orbit (LEO) poses a significant risk to both spacecraft and astronauts. In this article, we analyze radiation data obtained from different LEO missions to evaluate the potential of using electronic commercial off-the-shelf (COTS) devices in space missions. This study is focused on the total ionizing dose (TID). Our results demonstrate that COTS technology can effectively provide cost-effective and reliable solutions for space applications. Furthermore, we compare the data obtained from actual missions with computational models and tools, such as SPENVIS, to evaluate the accuracy of these models and enhance radiation exposure prediction. This comparison provides valuable insights into the true radiation environment in space and helps us to better understand the potential of COTS technology in reducing costs and development times by utilizing technology previously used in other areas. In light of the results, we can see that the radiation values observed experimentally in space missions versus the computer simulations used present variations up to a factor of 30 depending on the model used in the analysis.

Radiation-hardened-by-design preamplifier with binary weighted current source for radiation detector

This paper presents a radiation-hardened-by-design preamplifier that utilizes a self-compensation technique with a charge-sensitive amplifier (CSA) and replica for total ionizing dose (TID) effects. The CSA consists of an operational amplifier (OPAMP) with a 6-bit binary weighted current source (BWCS) and feedback network. The replica circuit is utilized to compensate for the TID effects of the CSA. Two comparators can detect the operating point of the replica OPAMP and generate appropriate signals to control the switches of the BWCS. The proposed preamplifier was fabricated using a general-purpose complementary metal-oxide-silicon field effect transistor 0.18 μm process and verified through a test up to 230 kGy (SiO2) at a rate of 10.46 kGy (SiO2)/h. The code of the BWCS control circuit varied with the total radiation dose. During the verification test, the initial value of the digital code was 39, and a final value of 30 was observed. Furthermore, the preamplifier output exhibited a maximum variation error of 2.39%, while the maximum rise-time error was 1.96%. A minimum signal-to-noise ratio of 49.64 dB was measured.

SOI FinFET Design Optimization for Radiation Hardening and Performance Enhancement

This work proposes Total Ionizing Dose (TID) hardening techniques compatible with conventional 14-nm-node silicon-on-insulator (SOI) FinFETsf process flows through performing 3-dimensional (3-D) simulations based on technology computer-aided design (TCAD) tools. The simulation results reveal a significantly critical TID impact induced by trapped charges in the buried oxide (BOX) and the spacer with calibration against 14 nm SOI FinFETfs experimental data (error < 6%). Inspired by the physical interpretation, an optimization technique featuring an optimized gate structure, spacer length, and substrate bias is designed. The optimized gate structure is utilized to enhance the local gate-to-channel coupling at the bottom and reduce the generation and capture of electron-hole pairs. By reducing the spacer length, a lower sensitive volume in the spacer can effectively suppress the TID response. The setting of the negative substrate bias greatly improves the subthreshold characteristics, weakening the TID effect in the BOX. By adopting the combined optimization including these techniques, the threshold voltage shift (VTH) induced by a 5 Mrad(SiO2) irradiation can be reduced to 21 mV, whereas VTH is 45 mV with only gate structure optimized and 97 mV without hardening. Meanwhile, the ION/IOFF after radiation increases to 1 × 107, which is at least four orders of magnitude better than the original device. Meanwhile, subthreshold swing (SS) is reduced from 81 mV/dec to 71 mV/dec, and Drain Induced Barrier Lowering (DIBL) is reduced from 120 mV/V to 99 mV/V, respectively. The combined optimization design is demonstrated as an effective method to improve the tolerance against TID irradiation without compromising performance, promoting 14 nm SOI FinFET’s application in future harsh space environments.

Simulation study on total ionizing dose effect of IGBT gamma irradiation

The insulated gate bipolar transistor (IGBT) has emerged as a prominent high-power semiconductor device due to its excellent overall performance. It is widely utilized in various fields, including aerospace. Due to prolonged operation in complex irradiation environments, the performance of IGBTs is susceptible to degradation and damage. Therefore, conducting research on the variation of IGBT characteristics under irradiation environments is crucial to ensuring their long-term functionality in extended space missions. To evaluate and analyze the total ionizing dose (TID) effect of IGBTs during operation, this study adopts a trench IGBT as the device model. Utilizing the finite element method, technology computer-aided design (TCAD) is employed to simulate and analyze the electrical characteristic changes of IGBTs under different total radiation doses. The simulation results are subsequently validated through theoretical analysis. The simulation results indicate that gamma radiation significantly affects the overall electrical characteristics of IGBTs.

Integrating Commercial-Off-The-Shelf Components into Radiation-Hardened Drone Designs for Nuclear-Contaminated Search and Rescue Missions

This paper conducts a focused probabilistic risk assessment (PRA) on the reliability of commercial off-the-shelf (COTS) drones deployed for surveillance in areas with diverse radiation levels following a nuclear accident. The study employs the event tree/fault tree digraph approach, integrated with the dual-graph error propagation method (DEPM), to model sequences that could lead to loss of mission (LOM) scenarios due to combined hardware–software failures in the drone’s navigation system. The impact of radiation is simulated by a comparison of the total ionizing dose (TID) with the acceptable limit for each component. Errors are then propagated within the electronic hardware and software blocks to determine the navigation system’s reliability in different radiation zones. If the system is deemed unreliable, a strategy is suggested to identify the minimum radiation-hardening requirement for its subcomponents by reverse-engineering from the desired mission success criteria. The findings of this study can aid in the integration of COTS components into radiation-hardened (RAD-HARD) designs, optimizing the balance between cost, performance, and reliability in drone systems for nuclear-contaminated search and rescue missions.

Design and Validation of a V-Gate n-MOSFET-Based RH CMOS Logic Circuit with Tolerance to the TID Effect

This study designed a radiation-hardened (RH) complementary metal oxide semiconductor (CMOS) logic circuit based on an RH variable-gate (V-gate) n-MOSFET that was resistant to the total ionizing dose (TID) effect and evaluated its tolerance to radiation. Among the different CMOS logic circuits, NOT, NAND, and NOR gates were designed using V-gate n-MOSFETs by employing layout transformation techniques and standard p-MOSFETs. Before the process design, we predicted the radiation damage using modeling and simulation techniques and validated the tolerance by conducting actual radiation tests after the process design. Furthermore, we implemented the CMOS logic circuit process design in a 0.18 µm CMOS bulk process. The actual radiation test applied a total cumulative radiation dose of 25 kGy at 5 kGy per hour in a high-level gamma-ray irradiation facility. Consequently, the resistance of the RH CMOS logic circuit based on the RH V-gate n-MOSFET to the TID effect was validated through experiments.