Device Topology Research Articles

A Review Reliability and Availability Analysis of IEC 61850 Based Substation Communication Architectures

Modern Ethernet technology's high-speed capabilities enable efficient data transfer, and its leadership in the LAN space further distinguishes Ethernet as an intriguing communication method. For important substation automation applications to operate successfully, communications must meet cost, performance, and reliability requirements technology for substation automation management. The IEC 61850 standard was published by the International Electro-Technical Commission (IEC) to provide interoperability among enterprise substation automation systems for communication networks within power substations. This standard specifies Ethernet-based communication systems for substation automation systems (SAS). With the aid of Ethernet switches, Ethernet offers versatility in terms of configuring different designs. On the other hand, before using appropriate Ethernet architectures for critical applications in substations, they must be assessed for availability and reliability. This study uses the reliability block diagram (RBD) approach to analyse the availability and reliability evaluation of practical Ethernet Cisco device topologies. With a typical transmission substation in mind, dependability block diagrams for intra-bay and inter-bay communications have been created. Additionally, the dependability and accessibility of the actual Ethernet topologies have been compared, and some recommendations have been derived from the findings. These recommendations include the following Index Terms: substation automation systems (SAS), availability, IEC 61850, smart electronic device (IED), and dependability.

Numerical design of non-toxic high-efficiency tandem solar cell with distinct hole transport materials

The metal-halide perovskite is at the forefront of photovoltaic research and has the potential to combine low manufacturing costs with excellent power conversion efficiency. In this study, a solar cell capacitance simulator was used to analyze the performance of a tandem solar cell in which MASnI3 was used as the lower cell active layer, and NaZn0.7Cu0.3Br3 was used as the upper cell active layer. The primary objective of this research is to search for a device structure with enhanced efficiency. Here, it is evaluated how absorber thickness, temperature, hole transport layer, defect density, and metal work function affect solar cell performance to reach this aim. After looking at the data for several different solar cell configurations, it is seen that indium tin oxide (ITO) / titanium dioxide (TiO2)/sodium zinc copper bromide (NaZn0.7Cu0.3Br3)/ methylammonium tin iodide (MASnI3) / copper oxide (CuO)/gold (Au) offers the best efficiency at 32.58 %, fill factor at 82.19 %, short circuit current density at 34.8389 mA/cm2, and open circuit voltage at 1.1375 Vs. Device simulations showed an optimal MASnI3 absorber thickness of about 1 µm. Finally, the simulation results reveal that the device's efficiency declines when the absorber's defect density and cell operation temperature rise. The device topologies are stable at around 300 Kelvin. Last but not least, any conductive material can be used as an anode if it has a work function that is more than or roughly equivalent to 5.10 eV.

Exploring various Integration Methods of carbon quantum dots in CsPbCl3 perovskite solar cells for enhanced power conversion efficiency

In this study, we explore the integration of carbon quantum dots (QDs) in cesium lead halide perovskite solar cells (PSCs) across the electron transport layer (ETL), hole transport layer (HTL), and the perovskite absorber to enhance power conversion efficiency (PCE). We conduct a comprehensive investigation from thin film analysis to complete device characterization, encompassing eight different device topologies. Our results reveal that the integration of QDs in various layers significantly impacts the performance of the PSCs. Notably, adding QDs in the HTL and ETL improves charge transport and reduces recombination, enhancing device efficiency. Furthermore, introducing QDs in the perovskite layer leads to modifications in the energy landscape, reducing charge trapping and enhancing stability. We observe a trade-off between short-circuit current and overall PCE, with different QD integration strategies yielding distinct performance outcomes. Additionally, incorporating QDs in the ETL layer reduces hysteresis, attributed to mitigated ion migration and charge-trapping effects. Overall, the addition of QDs in these layers demonstrates improved charge transport, reduced recombination, and enhanced stability, ultimately contributing to the enhanced performance and efficiency of perovskite solar cells, reaching 22.5%. This study paves the way for future investigations into the potential of QDs in PSC technology and their impact on device forecasting and operational stability.

QuCloud+: A Holistic Qubit Mapping Scheme for Single/Multi-programming on 2D/3D NISQ Quantum Computers

Qubit mapping for NISQ superconducting quantum computers is essential to fidelity and resource utilization. The existing qubit mapping schemes meet challenges, e.g., crosstalk, SWAP overheads, diverse device topologies, etc., leading to qubit resource underutilization and low fidelity in computing results. This article introduces QuCloud+, a new qubit mapping scheme that tackles these challenges. QuCloud+ has several new designs. (1) QuCloud+ supports single/multi-programming quantum computing on quantum chips with 2D/3D topology. (2) QuCloud+ partitions physical qubits for concurrent quantum programs with the crosstalk-aware community detection technique and further allocates qubits according to qubit degree, improving fidelity, and resource utilization. (3) QuCloud+ includes an X-SWAP mechanism that avoids SWAPs with high crosstalk errors and enables inter-program SWAPs to reduce the SWAP overheads. (4) QuCloud+ schedules concurrent quantum programs to be mapped and executed based on estimated fidelity for the best practice. Experimental results show that, compared with the existing typical multi-programming study [ 12 ], QuCloud+ achieves up to 9.03% higher fidelity and saves on the required SWAPs during mapping, reducing the number of CNOT gates inserted by 40.92%. Compared with a recent study [ 30 ] that enables post-mapping gate optimizations to further reduce gates, QuCloud+ reduces the post-mapping circuit depth by 21.91% while using a similar number of gates.

Performance Assessment of GaAs Pocket‐Doped Dual‐Material Gate‐Oxide‐Stack DG‐TFET at Device and Circuit Level

This study explores the impact of integrating a gallium arsenide (GaAs) pocket at the source and drain in a dual‐material gate‐oxide‐stack double‐gate tunnel field‐effect transistor (DMGOSDG‐TFET). The performance of this DMGOSDG‐TFET, employing work‐function engineering and gate‐oxide‐stack techniques, is compared with a GaAs pocket‐doped DMGOSDG‐TFET. Using the Silvaco Technology Computer‐Aided Design tool, the comparison covers DC characteristics, analog/RF behavior, and circuit‐level assessments. The research introduces an optimized heterostructure pocket‐doped DMGOSDG‐TFET to enhance DC characteristics, analog/RF performance, and DC/transient analysis. This novel architecture effectively suppresses ambipolarity, making it more suitable for current conduction. The incorporation of work‐function engineering and a gate‐oxide‐stack approach enhances the device’s current driving capability, while the use of a highly doped GaAs pocket at the source and drain virtually eliminates ambipolar current conduction. Simulation results indicate that the proposed heterostructure device exhibits a high ON‐current and switching ratio. For analog/RF applications, the optimized heterostructure device outperforms conventional DMGOSDG‐TFET, offering higher cutoff frequency, transconductance, and other analog/RF parameters. Circuit‐level performance is assessed using HSPICE, with a focus on the implementation of a resistive‐load inverter for both proposed and conventional device topologies through DC and transient evaluations.

Guided mode resonances for angular and spectral filtering

The development of devices based on compact waveguides is a rapidly evolving field. A unique variation of such devices is the Fano-like resonance dielectric spectral and spatial filtre, made from a dielectric conformal thin film on a surface relief grating. It can be used in a normal (or oblique) angle-of-incidence configuration. This device facilitates directional selectivity, which is useful for transverse-mode cleaning in short optical cavities. It can also be enhanced by using leaky-mode effects to produce even sharper spectral features. However, a perfect spatial filtre should be as invariant as possible in the spectral and enhanced angular domains. Here, we solved the inverse design problem to produce such an effect. Numerically, we tuned the surface profile of the substrate grating, assuming a conformal layer on top. This resulted in trapezoidal relief patterns followed by narrow flat-top angular features. The combination of leaky mode effect and enhanced device topology will enable efficient and useful devices with a bandwidth of 50 nm and even more in the future.

Strategies for optimizing plasmonic grating couplers with a topology-based inverse design

Numerical simulations have become a cornerstone technology in the development of nanophotonic devices. Specifically, 3D finite-difference time domain (FDTD) simulations are widely used due to their flexibility and powerful design capabilities. More recently, FDTD simulations in conjunction with a design methodology called inverse design has become a popular way to optimize device topology, reducing a device’s footprint and increasing performance. We implement a commercial inverse design tool to generate complex grating couplers and explore a variety of grating coupler design methodologies. We compare the conventionally designed grating couplers to those generated by the inverse design tool. Finally, we discuss the limitations of the inverse design tool and how different design strategies for grating couplers affect inverse design performance, in terms of both computational cost and performance of the resulting device.

Germanium Selenide: A Critical Review on Recent Advances in Material Development for Photovoltaic and Photoelectrochemical Water‐Splitting Applications

Germanium selenide (GeSe), a new 2D semiconductor material, is an attractive material due to its excellent optoelectronic properties, which hold tremendous promise in a wide range of applications, including thin‐film solar cells (TFSCs) and photoelectrochemical (PEC) water splitting. Several attempts have been made to date in theoretical studies, high‐quality GeSe material synthesis, evaluating absorber properties, and developing efficient TFSCs and PEC devices. Using existing device topologies for chalcogenide materials, TFSCs with 5.2% efficiency and a PEC device with 3.17% solar‐to‐hydrogen efficiency have been recently developed. To enable its potential in high performances of TFSCs and PEC devices for future large‐scale applications, further improvement in materials quality, device design, and development is required. In this regard, this review provides a comprehensive overview of current advances made in GeSe material development and applications in TFSCs and PEC devices. First, the fundamental properties of GeSe material, theoretical studies, as well as in‐depth synthesis methods, are outlined. Then, key developments in GeSe‐based TFSCs and PEC devices are discussed with an emphasis on device designs. Finally, the most prominent impediments to a fundamental understanding of materials are highlighted, and perspectives on future research directions for improving material quality and device efficiency are provided.

An analytical approach based on coupled multi-physics model for photovoltaic arrays performance simulation

Simulating the output performance of a proposed photovoltaic plant is a necessary phase prior to the construction stage and has been intensively studied for decades. The requirement for accurate and reliable simulation needs a comprehensive analysis of the photovoltaic power generator considering environmental factors and device behaviors. Unlike other published work, this paper presents an analytical approach to simulate the output performance of photovoltaic arrays using coupled multi-physics modeling without the support of historical data. The interplay among the electrical and thermal models, device characteristics, and device topologies are deeply investigated and formulated. In the electrical model, a parameter extraction method, as well as an iterative algorithm, are utilized on the equivalent circuit model for a quick solution of the I–V characteristics of the photovoltaic module. To obtain accurate results of the output power and its interaction with the environment, irradiation, temperature, humidity, wind speed, and wind direction are analyzed along with the photovoltaic output power in the thermal model. Meanwhile, this output power is constrained to the maximum power point tracking mechanism of the inverter. Real data from a photovoltaic plant are used for comprehensive analysis in both long-term and short-term scenarios. The experiment shows that the proposed approach is competitively accurate and feasible. Compared with the state-of-the-art studies, the proposed approach improves the simulation accuracy by 7.75%.

Ensuring the performance of modified microstrip loops in the frequency band

Problem statement. Microstrip loop structures of various configurations are widely used to form topologies of multi-pole microwave devices. In this regard, there is a need to study the frequency properties and topological features of the construction of loop structures that determine the amplitude and phase frequency characteristics, as well as the overall parameters of a microstrip radio engineering device. Objective. Studying of frequency characteristics of T- and U-shaped loop configurations implemented on the basis of high-resistance and low-resistance segments of microstrip transmission lines that allow configuring small-sized topologies of multi-pole devices with acceptable electrical characteristics. Results. A number of basic topologies of loop structures designed to function in given frequency bands have been studied. With the help of electrodynamic modeling and parametric optimization, according to a number of criteria (given wave resistance, phase shift, reflection coefficient), the necessary geometric dimensions of the modified topologies were determined. The dependence of the frequency band on the geometric dimensions of the low-resistance loop of the T-section is revealed. By the level of “minus” 20 dB from the maximum of the reflection coefficient, the values of the frequency band width of two types of T-structures – symmetrical and counter-pin - were determined and compared. It is shown that the U-shaped section is characterized by an increased frequency band due to better matching, however, its geometric dimensions exceed the dimensions of the basic T-structures. Practical significance. Modified microstrip loop structures in some cases are able to effectively replace quarter-wave segments of transmission lines, on the basis of which most microwave devices are formed (directional couplers, power dividers, electric filters, phase shifters, crossovers, etc.). The use of combinations of T- and U-shaped structures leads to a significant reduction in the area of microstrip devices designed to operate in the UHF and Microwave bands.

Inverse Design of Free-Form Devices With Fabrication-Friendly Topologies Based on Structure Transformation

In order to improve the fabrication robustness of the inverse-designed devices that have complex topology structures, we propose an optimization technique, named as structure transformation (ST), to transform structures of the inverse-designed devices into simple topologies that contain less irregularly tiny features, sharp corners and less boundary regions. The proposed ST technique, based on a new alternately-implementing strategy of optical performance optimization and modified curvature-constrained structure adjustment, effectively facilitates an overall simplification of the structure topologies of devices, enhances their robustness to fabrication uncertainties, and simultaneously maintains or even improves their optical performances. To verify the feasibility of the technique, three types of typical SOI-based devices (T-junction, 1×3 power splitter and 90º crossing) with and without ST were designed, among which the ones without ST were given as control groups. Thanks to the ST, the boundary regions and highly curved ranges in these devices are all significantly reduced, while their performances are well maintained or even improved. Next, the effect of the ST on fabrication tolerances were investigated, and the simulation results show that the devices with ST are more robust to over/under-etching errors than the control groups. At last, the T junction and 1×3 power splitter and their control groups were fabricated each with 6 samples. Measured results show that the performances of the devices with ST deviate from the simulated performances much less than their control groups, which agrees well with the simulated results in fabrication tolerances investigation. Summarily, we proposed and demonstrated a technique that provides the inverse-designed devices new possibilities to achieve simpler topologies with better fabrication robustness and improved performances at the same time.

Recent Progress in Perovskite Tandem Solar Cells.

Tandem solar cells are widely considered the industry's next step in photovoltaics because of their excellent power conversion efficiency. Since halide perovskite absorber material was developed, it has been feasible to develop tandem solar cells that are more efficient. The European Solar Test Installation has verified a 32.5% efficiency for perovskite/silicon tandem solar cells. There has been an increase in the perovskite/Si tandem devices' power conversion efficiency, but it is still not as high as it might be. Their instability and difficulties in large-area realization are significant challenges in commercialization. In the first part of this overview, we set the stage by discussing the background of tandem solar cells and their development over time. Subsequently, a concise summary of recent advancements in perovskite tandem solar cells utilizing various device topologies is presented. In addition, we explore the many possible configurations of tandem module technology: the present work addresses the characteristics and efficacy of 2T monolithic and mechanically stacked four-terminal devices. Next, we explore ways to boost perovskite tandem solar cells' power conversion efficiencies. Recent advancements in the efficiency of tandem cells are described, along with the limitations that are still restricting their efficiency. Stability is also a significant hurdle in commercializing such devices, so we proposed eliminating ion migration as a cornerstone strategy for solving intrinsic instability problems.

Impact of Device Topology on the Performance of High-Speed 1550 nm Wafer-Fused VCSELs

A detailed experimental analysis of the impact of device topology on the performance of 1550 nm VCSELs with an active region based on thin InGaAs/InAlGaAs quantum wells and a composite InAlGaAs buried tunnel junction is presented. The high-speed performance of the lasers with L-type device topology (with the largest double-mesa sizes) is mainly limited by electrical parasitics showing noticeable damping of the relaxation oscillations. For the S-type device topology (with the smallest double-mesa sizes), the decrease in the parasitic capacitance of the reverse-biased p+n-junction region outside the buried tunnel junction region allowed to raise the parasitic cutoff frequency up to 13–14 GHz. The key mechanism limiting the high-speed performance of such devices is thus the damping of the relaxation oscillations. VCSELs with S-type device topology demonstrate more than 13 GHz modulation bandwidth and up to 37 Gbps nonreturn-to-zero data transmission under back-to-back conditions at 20 °C.

Spacer Engineering on Nanosheet FETs towards Device and Circuit Perspective

The Nanosheet FET (NS FET) has proven to be a potential candidate for sub-5-nm nodes. For the first time, in this manuscript, the NS FET performance is demonstrated by incorporating various device engineering at both device and circuit levels. Various device topologies like lightly doped drain/source, underlap, single and dual-k spacer are explored and the performance is compared with conventional NS FET. The NS FET with dual-k spacer is able to reduce the off current by 13.6× compared to the traditional NS FET. Further, the analog/RF figures of merit (FOMs) are assessed for various device configurations. Though the dual-k spacer outperforms in terms of DC and analog metrics, the conventional NS FET can offer better RF metrics owing to the high current. The crucial circuits for IC design such as inverter, ring oscillator, and common source (CS) amplifier are designed and evaluated the performance. The NS FET with dual-k spacer offers a gain of 1.815 for the CS amplifier and an oscillation frequency of 34.09 GHz for the 3-stage ring oscillator. The results will give insights into the performance of NS FET with various device architectures.

Out‐Of‐Plane Electrokinetics via Pumping Potential Achieved by 100 nm‐Thin Polyethylene Nanomembranes

AbstractDroplet‐induced electricity generation, as one of the most emerging environmental energy harvesting technologies, is extensively investigated for nearly a decade. Its interaction between ions (in droplets), electrons (in conductors, e.g., graphene), and charges (on the substrate surface) is the key to electricity generation. However, the indirect interaction between ions and charges due to the shielding effect from conductors, inevitably suppresses device performance and limits conductor selection. Herein, the above issues are addressed by proposing an out‐of‐plane electrokinetic effect based on a 100 nm‐thick negatively charged polyethylene nanomembrane, providing direct interactions between ions and charges, with the shielding effect of conductors eliminated. This new form of electrokinetics can induce a persistent potential for 6 h and a specific power of 177.2 nW µL−1 (highest droplet‐induced electrokinetics). With new device topologies and extensive conductor materials unlocked, this work provides a new concept and expanded scope for electrokinetic applications.

Expediting Distributed DNN Training With Device Topology-Aware Graph Deployment

This paper presents TAG, an automatic system to derive optimized DNN training graph and its deployment onto any device topology, for expedited training in device- and topology- heterogeneous ML clusters. We novelly combine both the DNN computation graph and the device topology graph as input to a graph neural network (GNN), and join the GNN with a search-based method to quickly identify optimized distributed training strategies. To reduce communication in a heterogeneous cluster, we further explore a lossless gradient compression technique and solve a combinatorial optimization problem to automatically apply the technique for training time minimization. We evaluate TAG with various representative DNN models and device topologies, showing that it can achieve up to 4.56x training speed-up as compared to existing schemes. TAG can produce efficient deployment strategies for both unseen DNN models and unseen device topologies, without heavy fine-tuning.

An Accurate Model for InP HEMT Small-Signal Equivalent Circuit Based on EM Simulation

A high-reliability small-signal equivalent circuit model for indium-phosphide-based high-electron-mobility transistors (InP-based HEMTs) is proposed. A de-embedding scheme for the representative structure is utilized in this model with an electromagnetic simulation approach to consider the distributed extrinsic parasitic elements. The intrinsic part of the small-signal model is directly extracted with the Y-parameter of the intrinsic two-port network. The extraction of the parametric elements was performed under different biases and three different gate widths ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2\times 20\,\,\mu \text{m}$ </tex-math></inline-formula> , <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2\times 30\,\,\mu \text{m}$ </tex-math></inline-formula> , and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2\times 50\,\,\mu \text{m}$ </tex-math></inline-formula> ), our S-parameter predictions showed good agreement with measurements in the 1–50-GHz frequency range. The proposed model performs an electromagnetic simulation of different gate-width devices, considers the devices’ distribution and radio-frequency behavior, and avoids errors caused by traditional tests’ extraction of parasitic parameters. The proposed model solves the problem that the conventional indium phosphide-based HEMT small-signal model is limited by the device topology, making the high-frequency modeling more accurate.

Physics-guided co-designing flexible thermoelectrics with techno-economic sustainability for low-grade heat harvesting.

Flexible thermoelectric harvesting of omnipresent spatial thermodynamic energy, though promising in low-grade waste heat recovery (<100°C), is still far from industrialization because of its unequivocal cost-ineffectiveness caused by low thermoelectric efficiency and power-cost coupled device topology. Here, we demonstrate unconventional upcycling of low-grade heat via physics-guided rationalized flexible thermoelectrics, without increasing total heat input or tailoring material properties, into electricity with a power-cost ratio (W/US$) enhancement of 25.3% compared to conventional counterparts. The reduced material usage (44%) contributes to device power-cost "decoupling," leading to geometry-dependent optimal electrical matching for output maximization. This offers an energy consumption reduction (19.3%), electricity savings (0.24 kWh W-1), and CO2 emission reduction (0.17kg W-1) for large-scale industrial production, fundamentally reshaping the R&D route of flexible thermoelectrics for techno-economic sustainable heat harvesting. Our findings highlight a facile yet cost-effective strategy not only for low-grade heat harvesting but also for electronic co-design in heat management/recovery frontiers.

Evolutionary seismic design optimization of mega‐brace damper architectures in three‐dimensional structures

AbstractNovel seismic protection systems are widely used to improve building performance or collapse prevention under extreme events. However, a systematic approach for the distribution of dampers in structures expected to operate inelastically under extreme seismic loading does not exist in modern seismic codes. Furthermore, optimal designs are achieved typically performing only forward analysis with no direction on how device topologies and properties distribution affect the response and the plastic action distribution throughout structures for different types of passive devices. To address the above, this study utilizes an evolutionary framework for optimization of the topology and properties of passive dampers in three‐dimensional buildings subject to seismic loading. The framework incorporates a self‐organizing evolutionary algorithm, a novel concept of mega‐brace damper architecture scheme, and an active ground motion subset scheme to efficiently find optimal designs that satisfy predefined performance targets. Three‐dimensional buildings considered include eight‐story irregular, eight‐story regular, and 14‐story regular structures, while passive devices included yielding, friction, and viscous dampers. The seismic environment consisted of twenty‐five synthetic ground motions with 5% of probability of exceedance in 50 years. The study included design examples with realistic three‐dimensional buildings, and the proposed framework yielded optimal designs that exhibited uniform ductility demand along the height when compared to the base buildings. Novel three‐dimensional multiscale mega‐brace architectures not seen in practice were identified, while their corresponding plastic action distribution throughout the buildings was assessed for each case.

Highly Efficient Interleaved Solar Converter Controlled with Extended Kalman Filter MPPT

DC-DC power converters play an important role in the performance and control methods of solar power systems. Solar power converters are prone to high power losses due to intermittent irradiation and shading effects on solar photovoltaic (PV) modules. The device topology and control algorithm of a solar power converter are key factors to increase the total amount of harvested energy. In this paper, a solar power converter is proposed with a two−phase interleaved boost converter (IBC) topology and a novel maximum power point tracking (MPPT) method. The proposed MPPT controller is based on extended Kalman filtering (EKF) and it improves the tracking efficiency in both steady irradiation and partial shading conditions. The algorithm is improved with the prediction and estimation capabilities of the EKF algorithm. The proposed EKF MPPT is validated with simulations and experimentally validated by using the implemented two−phase IBC that is comprised of SiC MOSFETs. The proposed converter provides over 99% power conversion efficiency at 3 kW and over 96% MPPT tracking efficiency under partial shading conditions. The experimental studies verify that the proposed MPPT controller and two−phase IBC increase the overall efficiency both in steady-state and partial shading operations of a solar power converter.