Performance Assessment of GaAs Pocket‐Doped Dual‐Material Gate‐Oxide‐Stack DG‐TFET at Device and Circuit Level

Abstract

This study explores the impact of integrating a gallium arsenide (GaAs) pocket at the source and drain in a dual‐material gate‐oxide‐stack double‐gate tunnel field‐effect transistor (DMGOSDG‐TFET). The performance of this DMGOSDG‐TFET, employing work‐function engineering and gate‐oxide‐stack techniques, is compared with a GaAs pocket‐doped DMGOSDG‐TFET. Using the Silvaco Technology Computer‐Aided Design tool, the comparison covers DC characteristics, analog/RF behavior, and circuit‐level assessments. The research introduces an optimized heterostructure pocket‐doped DMGOSDG‐TFET to enhance DC characteristics, analog/RF performance, and DC/transient analysis. This novel architecture effectively suppresses ambipolarity, making it more suitable for current conduction. The incorporation of work‐function engineering and a gate‐oxide‐stack approach enhances the device’s current driving capability, while the use of a highly doped GaAs pocket at the source and drain virtually eliminates ambipolar current conduction. Simulation results indicate that the proposed heterostructure device exhibits a high ON‐current and switching ratio. For analog/RF applications, the optimized heterostructure device outperforms conventional DMGOSDG‐TFET, offering higher cutoff frequency, transconductance, and other analog/RF parameters. Circuit‐level performance is assessed using HSPICE, with a focus on the implementation of a resistive‐load inverter for both proposed and conventional device topologies through DC and transient evaluations.