Violation Of Timing Constraints Research Articles

Short-term frequency stability of RSFQ ring oscillators

The temporal stability of the clock signal has a profound effect on the performance of synchronous RSFQ digital systems. Short-term clock fluctuations, or clock jitter, can severely degrade system performance due to the hazard of timing constraint violations. Successful large-scale RSFQ digital systems will require highly stable multi-Gigahertz on-chip clock sources. To meet this need, methods for characterizing and measuring the short-term stability of such sources are required. In this paper we identify the relevant figure of merit to characterize and compare various clocks: the cycle-to-cycle standard deviation of the clock periods. We have developed experimental techniques for the measurement of this figure of merit and applied it to the characterization of an RSFQ ring oscillator. The experimental results are compared with results from a stochastic circuit simulator. We determined the value of jitter to be 1.52% at 10 GHz.

An IDDQ sensor for concurrent timing error detection

Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions during system operation are caused by transient faults, which often manifest themselves as abnormal signal delays that may result in violations of circuit element timing constraints. We present a novel complementary metal-oxide-semiconductor-based concurrent error-detection circuit that allows a flip-flop (or other timing-sensitive circuit element) to sense and signal when its data has been potentially corrupted by a setup or hold timing violation. Our circuit employs on-chip quiescent supply current evaluation to determine when the input changes in relation to a clock edge. Current through the detection circuit should be negligible while the input is stable. If the input changes too close to the clock time, the resulting switching transient current in the detection circuit exceeds a reference threshold at the time of the clock transition, and an error is flagged. We have designed, fabricated, and evaluated a test chip that shows that such an approach can be used to detect setup and hold time violations effectively in clocked circuit elements.

A SYSTEM FOR VISUALIZING AND DEBUGGING DISTRIBUTED REAL-TIME SYSTEMS WITH MONITORING SUPPORT

Based on system execution traces, this paper presents a dynamic approach for visualizing and debugging timing constraint violations occurring in distributed real-time systems. The system execution traces used for visualization and debugging are collected during the execution of a target program in such a way that its run-time behavior is not interfered with. This is made possible by our non-interference distributed real-time monitoring system which is capable of collecting system’s run-time traces by monitoring and fetching the data passing through the internal buses of a target system. After the run-time data has been collected, the visualization and debugging activities then proceeded. The timing behavior of a target program is visualized as two graphs—the Colored Process Interaction Graph (CPIG) and the Dedicated Colored Process Interaction Graph (DCPIG). The CPIG depicts the timing behavior of a target program by graphically representing interprocess relationships during their communication and synchronization. The DCPIG can reduce visualization and debugging complexity by focusing on the portion of a target program which has direct or indirect correspondence with an imposed timing constraint. With the help of the CPIG and the DCPIG, a timing analysis method is used for computing the system-related timing statistics and analyzing the causes of timing constraint violations. A visualization and debugging system, called VDS, has been implemented using OpenWindows on Sun-4’s/UNIX workstations.

Where Do Time Constraints Come From? Where Do They Go?

While a lot of work has been done in real-time systems, in real-time database systems, and more recently, in real-time active databases on the topic of time constrained processing of tasks and transactions, very little work exists that deals with the origin of the time constraints associated with the data, the events, and the actions. In this paper we identify the sources and semantics of time constraints and show that it is important to minimize the number of “mandated” timing requirements and also weaken the implications of timing constraint violations. The Event-Condition-Action rules of active real-time databases provide a useful framework to specify the timing properties of interest as well as the actions to be taken when the properties are violated. That is, an active real-time database can be made to store the data pertaining to the controlled system as well as the meta-data about the controlling system.Request access from your librarian to read this article's full text.