An IDDQ sensor for concurrent timing error detection

Abstract

Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions during system operation are caused by transient faults, which often manifest themselves as abnormal signal delays that may result in violations of circuit element timing constraints. We present a novel complementary metal-oxide-semiconductor-based concurrent error-detection circuit that allows a flip-flop (or other timing-sensitive circuit element) to sense and signal when its data has been potentially corrupted by a setup or hold timing violation. Our circuit employs on-chip quiescent supply current evaluation to determine when the input changes in relation to a clock edge. Current through the detection circuit should be negligible while the input is stable. If the input changes too close to the clock time, the resulting switching transient current in the detection circuit exceeds a reference threshold at the time of the clock transition, and an error is flagged. We have designed, fabricated, and evaluated a test chip that shows that such an approach can be used to detect setup and hold time violations effectively in clocked circuit elements.