An IDDQ sensor for concurrent timing error detection

Abstract

Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions are caused by transient faults which often manifest themselves as signal delays or other timing violations. We present a novel CMOS based concurrent error detection circuit that allows a flip flop (or other timing sensitive circuit element) to signal when its data has been potentially corrupted by a timing violation. Our circuit employs on-chip IDDQ evaluation to determine when the input changes in relation to a clock edge. If the input changes too close to clock time, the resulting switching transient current exceeds a reference threshold, and an error is flagged. We have designed, fabricated and evaluated a test chip that shows that such an approach can be used to effectively detect setup and hold time violations in clocked circuit elements.