Three-phase Phase-locked Loop Research Articles

Grid synchronization method based on three novel types of third-order generalized integrators

Phase-locked loop (PLL) is widely used to estimate synchronous information such as amplitude and phase angle of grid voltage. It plays a crucial role in distributed renewable energy grid-connected power generation. However, the presence of grid harmonics and DC offset voltage (DCOV) can affect the accurate extraction of the fundamental voltage component, leading to phase-locked deviation. This paper introduces three novel or improved third-order generalized integrators (TOGI) with DCOV rejecting function to address this issue. A unified dual third-order generalized integrator (DTOGI) structure is designed based on the three TOGI structures. This DTOGI structure is further combined with a moving average filter (MAF) to propose three innovative three-phase PLLs. Unlike other PLL filtering methods that inadequately consider DCOV, the proposed PLL methods not only reject DCOV but also eliminate the fundamental voltage negative sequence component (FVNSC) and each order harmonic component. They demonstrate strong robustness and excellent filtering performance even under abnormal grid conditions. Among the three methods, the DII-TOGI based PLL exhibits superior dynamic performance compared to the other two methods, it can improve dynamic characteristics by about 10 % compared to the other two methods. The effectiveness of the proposed methods is verified through extensive Matlab/Simulink simulations and experiments.

A Three-Phase Synchronization Algorithm Based on a Modified DSOGI with Adjustable Re-Filtering

The precise calculation of phase angle, voltage magnitude and frequency is crucial for the effective control of power electronic inverters connected to an electrical power system. The phase-locked loop (PLL) is a commonly employed method for measuring these variables. Nevertheless, the reliability of this measurement is influenced by transient events in the electrical power system and varies depending on the nature of the event and the specific design of the PLL. Notably, PLLs utilizing the double second-order generalized integrator are widely adopted for power converter synchronization purposes. This article proposes a three-phase PLL, which is based on the single-phase version previously reported by the authors. The proposed PLL, based on an alternative integrator approach, allows a fine adjustment of the tolerance to disturbances in the input voltage thanks to a second feedback gain in its pre-filter. It is reasonable to anticipate that the three-phase PLL will exhibit similar strengths to the single-phase version; however, in the three-phase case, an additional integrator is involved in pre-filtering the quadrature signals, and the double integrator is not employed as the quadrature signal generator. The performance of the proposed PLL is assessed by comparing it to other PLLs based on the second-order integrator, using a processor-in-the-loop approach.

The improved 2DoFs-PLL for MMC-HVDC transmission system

The performance of a modular multilevel converter (MMC) is highly related to the three-phase phase-locked loop (PLL). The presence of the DC component, the harmonic component, and the negative sequence component results in the poor dynamic and steady-state performance of the PLL, such as fundamental frequency oscillations in the phase estimated by the PLL. In order to suppress the influence of parameters variation and disturbance of the three-phase grid voltage, an improved PLL with a moving average filter with two degrees of freedom PID (2DoFs-PID) is proposed. Moreover, to improve the phase margin and gain margin, an extra compensator with a pole and a zero is introduced into the 2DoFs-PLL. The improved 2DoFs-PLL can track the frequency and phase with superior accuracy, stability, and rapidity. Furthermore, the methodology for the parameters design of the 2DoFs PID controller is introduced, based on the index of integrated time and absolute error. A simulated model and experimental platform are established to verify the performance of the improved 2DoFs-PLL. The results show that the improved 2DoFs-PLL can meet the needs of both steady-state performance and dynamic performance by employing the 2DoFs-PID controllers.

An enhanced phase-locked loop for non-ideal grids combining linear active disturbance controller with moving average filter

Aiming at the accuracy deterioration of the synchronous reference frame phase-locked loop (SRF-PLL) caused by the non-ideal grid conditions and the limitation of phase-locked loop based on the linear active disturbance rejection controller (LADRC-PLL), this paper proposes an enhanced three-phase phase-locked loop combining the improved moving average filter and linear active disturbance rejection controller (IMAF-LADRC-PLL). First, a linear extended state observer (LESO) is presented to estimate all uncertainties and disturbances of SRF-PLL. On this basis, an improved moving average filter (IMAF) with phase-lead compensator is used to further enhance the harmonic suppression property. By combining the LESO and IMAF in a specific control structure, the proposed IMAF-LADRC-PLL has satisfactory steady-state accuracy without sacrificing the dynamic performance. To ensure the phase-locked accuracy against frequency fluctuation, a frequency-adaptive implementation is suggested. Furthermore, the parameter tuning and performance analysis of IMAF-LADRC-PLL are also presented in this paper. Experimental results show that the proposed IMAF-LADRC-PLL can achieve better dynamic performance on frequency step response and maintain the phase-locked accuracy in the presence of grid harmonics, voltage unbalances and direct current offsets, compared with the traditional LADRC-PLL or PID-type IMAF-PLL strategy.

A Multivariable Phase-Locked Loop-Integrated Controller for Enhanced Performance of Voltage Source Converters Under Weak Grid Conditions

This article proposes a new control strategy in stationary frame to improve the operational robustness of voltage source converters (VSCs) under weak grid conditions. First, dynamics of the phase-locked loop (PLL) are incorporated into the model of a grid-connected VSC in stationary reference frame. It is rigorously shown that the three-phase PLL introduces cross-coupling terms between the two control channels. Second, based on the augmented model, a multivariable controller is proposed which combines the current control feedback gains with PLL feedback gains. Third, the gains of the controller are designed using an optimal control theory approach. It is shown through theoretical analysis, computer simulations, and a laboratory experimental setup that the proposed controller improves the stability margins of the VSC during weak grid conditions. More specifically, under a given identical operating conditions, while the conventional controller’s responses become increasingly oscillatory for short-circuit ratio (SCR) below 1.95 and eventually becomes unstable at SCR=1.26, the proposed controller exhibits smooth and stable responses for SCR as low as 1. The proposed controller also produces cleaner sinusoidal currents during unbalanced grid voltages.

A Multivariable Controller in Synchronous Frame Integrating Phase-Locked Loop to Enhance Performance of Three-Phase Grid-Connected Inverters in Weak Grids

This article presents a new current controller in the synchronous reference frame and its associated design for enhancing the performance of three-phase grid-connected inverters, especially against weak-grid conditions. The existing controllers do not perform strongly during high-impedance grid conditions and lead to oscillations and instability issues due to the interactions between the synchronization and control units. The proposed controller addresses this issue by 1) deriving a linear model of the three-phase phase-locked loop (PLL), 2) integrating the PLL model into the current controller design, 3) using a multivariable control design for multi-input multi-output systems, and 4) designing the controller gains using optimal linear quadratic theory. The proposed controller has superior performance over a substantially wider range of weak-grid conditions compared to conventional controllers. Extensive simulation and experimental results are presented in order to validate and reveal the desirable performance of the proposed controller.

Three-Phase PLL Based on Adaptive Clarke Transform Under Unbalanced Condition

This letter proposes a three-phase phase-locked loop (PLL) algorithm relying on an adaptive Clarke transform (CT) under amplitude and/or phase angle unbalanced condition. Analytical expressions for coefficients of matrix associated with the adaptive CT are derived and used to generate orthogonal signals. An auxiliary algorithm is also proposed to track the actual amplitudes and phase angle deviations. Unlike the conventional CT relying on constant coefficients, the adaptive CT can generate accurate orthogonal signals from the three-phase voltages including phase angle and/or amplitude imbalances. As a result, the proposed PLL is not affected by the unbalanced phase angles with/without amplitude imbalances. The advantages of the proposed adaptive CT-based PLL method is illustrated by both simulation and experimental results.

Magnetic-Characteristic-Free High-Speed Position-Sensorless Control of Switched Reluctance Motor Drives With Quadrature Flux Estimators

High-speed position-sensorless control of switched reluctance motor (SRM) drives is often realized by searching <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">a priori</i> flux linkage lookup table. However, obtaining the nonlinear flux linkage characteristic requires time-consuming offline measurement and occupies large memory storage. To deal with this problem, this article proposes a new position estimation scheme for SRM drives without using any magnetic characteristics. This feature is achieved by using a quadrature flux estimator (QFE) that can extract the fundamental flux and its quadrature signal from the real-time calculated flux linkage. The flux bias and flux harmonics can also be suppressed by the QFE’s adaptive bandpass capability. Therefore, the proposed method can reduce the nonlinearity in SRM flux linkage and derive simple sine–cos position signals. Afterward, the rotor position and speed can be estimated from the orthogonal flux signals using a three-phase phase-locked loop. To baseline the advantages, comparative experimental validation with the conventional method is conducted on a three-phase 12/8 SRM test bench. The results show that the proposed scheme can achieve the same estimation accuracy as the conventional method even though no magnetic characteristics are used.

Accurate Estimation of Phase Angle for Three-Phase Systems in Presence of Unbalances and Distortions

The amplitude and phase imbalances can occur in three-phase voltage systems due to unbalanced loading and/or unsymmetrical grid faults. In this case, the conventional Clarke transform cannot produce accurate orthogonal signals, and hence a phase-locked loop (PLL) relying on the conventional Clarke transform is not able to produce accurate phase angles of three-phase voltage systems. This article proposes a three-phase PLL relying on an adaptive Clarke transform (ACT) algorithm for tracking the accurate phase angles of grid voltages in the presence of distortions and both the amplitude and phase imbalances. The proposed method includes bandpass filter in each phase to reject dc offset and harmonics. An algorithm is reported to track the unbalanced amplitudes and phase angle deviations of filtered voltages. A set of analytical expressions are presented for the coefficients of ACT matrix to make them adaptive under the amplitude and/or phase unbalanced conditions. A PLL is used to track the phase angle from the orthogonal signals generated by the ACT. A phase correction algorithm is also used to reject the phase error caused by the fixed tuned bandpass filter, which makes the method frequency adaptive without using any frequency feedback loop. The ACT is capable of generating orthogonal signals under unbalanced condition, whereas the conventional Clarke transform fails to do so. When compared with delayed signal cancellation (DSC)-based PLLs, the proposed method produces accurate results regardless of voltage unbalances and distortions. The simulation and experimental results are presented to verify the usefulness of the proposed method.

Three-Phase Phase-Locked Loop Algorithms Based on Sliding Modes

This article proposes a family of phase-locked loop schemes based on sliding modes. The use of sliding mode algorithms ensures fast response and global stability. In particular, two new algorithms are presented, both based on a complex framework for representing three-phase signals. This article compares the obtained algorithms with the traditional schemes, and a faster response is obtained when sliding modes are used. Additionally, as an application example, the algorithm is combined with a complex-coefficient filter that allows an easy identification of both positive and negative sequence harmonics. The proposed algorithms are illustrated by numerical simulations and experimentally validated using a digital signal processor.

On the Equilibrium Points in Three-Phase PLL Based on the d-axis Voltage Normalization

Voltage normalization is usually adopted for a phase-locked loop (PLL) to keep a constant bandwidth unaffected from the voltage magnitude at the point of synchronization. Two conventional PLL normalization methods are analyzed from a large-signal perspective in this letter. However, different from the voltage magnitude normalization method, an unexpected stable equilibrium point emerges in the three-phase PLL based on the d-axis voltage normalization, the mechanism of which is revealed by the phase-plane analysis. Due to the unexpected equilibrium point, the d-axis voltage normalization will lose the phase tracking ability when the initial phase difference or phase jump exceeds π/2. Thus, it is suggested to use the magnitude normalization instead of the d-axis voltage normalization to avoid this kind of malfunction. Finally, the experimental results validate the theoretical analysis.

Three-phase phase-locked loop algorithm and application to a static synchronous compensator

This work presents a phase-locked loop (PLL) algorithm for the detection of positive-sequence and negative-sequence grid voltages in three-phase systems. Since it employs an adaptive filter (AF), it is possible to track the fundamental component of the grid voltages accurately even in the presence of harmonics, subharmonics, and interharmonics. This aspect is of major concern for practical applications, especially because some popular algorithms present limited performance in such scenarios, e.g., the decoupled double synchronous reference frame PLL (DDSRF-PLL) and double second-order generalized integrator frequency-locked loop (DSOGI-FLL). A thorough comparison among the proposed method and other similar structures is presented in terms of steady-state and dynamic behaviors to show that the introduced PLL presents high immunity to power quality disturbances. Unfortunately, a possible drawback lies in the slow dynamic response due to the AF. In order to verify the applicability of the proposed approach, it is also incorporated to the control structure of a grid-connected power converter operating as a static synchronous compensator (STATCOM). This converter aims at regulating the ac voltage at the point of common coupling (PCC) and power factor correction. A detailed mathematical analysis is presented and experimental results are also discussed to validate the theoretical assumptions.

Three-phase phase-locked loop algorithms for the detection of positive-sequence and negative-sequence components

This work presents a follow-up investigation of two phase-locked loop (PLL) algorithms that were previously proposed for applications involving grid-connected power converters. The first one provides the detection of positive-sequence components in scenarios with high harmonic distortion, resulting in good overall performance. The second one comprises the addition of an adaptive filter (AF) to the latter structure in order to enhance its filtering capability in the presence of subharmonics and interharmonics. Both of them are modified so that they are capable of detecting both positive-sequence and negative-sequence components. The former strategies can be adapted so that it is possible to detect not only the fundamental component, but also any specific harmonic in the input signal if necessary. Experimental results are obtained using dSPACE platform and electronic control unit (ECU) ControlDesk, comprising a thorough comparison among the proposed synchronization algorithms and other well-known approaches in distinct scenarios.

Generalized Integrator-Extended State Observer With Applications to Grid-Connected Converters in the Presence of Disturbances

Large-scale fast-varying sinusoidal disturbances (FVSDs) strongly impact the operation of Grid-connected Converters (GcCs). A conventional extended state observer (ESO) is not sufficiently capable to deal with these rapid disturbances. This critical weakness has limited ESO's applications to GcCs. Therefore, a generalized integrator-ESO (GI-ESO) is developed from ESO to address such issues. Knowing that grid common disturbances can be expressed as a phase, frequency, or magnitude disturbed sinusoidal signal, multi-GIs of selective resonant frequencies are, hence, applied into the disturbance estimation loop, which enables FVSD to be observed with relatively low bandwidth. Besides, a frequency-adaptive mechanism is introduced in order to mitigate the effects of frequency deviations. The proposed GI-ESO resolves the tradeoff between the observer's bandwidth and noise filtering. A case of the three-phase phase-locked loop control system of disturbed regimes is, in particular, studied to assess the performance of GI-ESO and the stability of the resulting controlled system. Theoretical analysis and experimental results have proven its effectiveness in applications to GcCs in the presence of various disturbances.

Analysis and Implementation of Improved Software Phase-Locked Loop for Single-phase Grid-connected Inverter

For single-phase grid connected inverter, based on the traditional closed-loop structure of three-phase phase-locked loop (PLL), an improved software PLL was proposed. The basic principle of the phase-locked loop was analyzed and its mathematical model was deduced. In addition, the software implementation method of the phase-locked loop was presented. Then, the influence resulted from the change of amplitude, frequency and phase on the grid voltage was simulated with PSIM software. The results show that the software phase-locked loop can realize the phase tracking at any time in the cycle effectively and quickly, without waiting for the zero crossing of the grid. Finally, the software phase-locked loop proposed in this paper was implemented respectively by using TI’s DSP TMS320F28035 and TMS320F2808 and applied to the 500W dual-channel single-phase grid-connected micro-inverter and 5kW single-phase grid-connected inverter. The simulation and experiment results verify the proposed software phase-locked loop.

Three-Phase PLL for Grid-Connected Power Converters Under Both Amplitude and Phase Unbalanced Conditions

This paper proposes a technique for accurate phase estimation of distorted three-phase grid voltages including unbalanced amplitudes and/or phase angles. An adaptive cascaded delayed signal cancellation (CDSC) strategy is used for the generation of the amplitude balanced three-phase voltages. The CDSC strategy also eliminates both odd and even harmonics from the input voltage. An algorithm is also reported for removing the phase angle deviations from the three-phase voltages including unbalanced phase angles. Finally, a phase-locked loop (PLL) is applied to estimate the phase angle of the reference phase voltage. It requires only one PLL to estimate three phase angles of the thee-phase voltages, respectively, suffering from the unbalanced amplitudes and phase angles. It is also immune to harmonic distortions at changeable frequency environment. When compared to the CDSC-PLL and dqCDSC-PLL techniques reported in the technical literature, it can provide improved phase estimation under amplitude and phase unbalanced condition. Simulated and experimental results of the technique are acquired from the MATLAB/Simulink and dSPACE1104 control board platform, respectively, for a number of case studies observed in the grid voltage.

Modeling and Design of the Vector Control for a Three-Phase Single-Stage Grid-Connected PV System with LVRT Capability according to the Spanish Grid Code

This article deals with the vector control in dq axes of a three-phase grid-connected photovoltaic system with single-stage topology and low-voltage-ride-through capability. The photovoltaic generator is built using an array of several series-parallel Suntech PV modules and is modeled as a Lookup Table (two-dimensional; 2-D). The requirements adopted when grid voltage sags occur are based in both the IEC 61400-21 European normative and the allowed amount of reactive power to be delivered according to the Spanish grid code, which avoids the disconnection of the inverter under grid faults by a limitation in the magnitude of the three-phase output inverter currents. For this, the calculation of the positive- and negative-sequences of the grid voltages is made and a conventional three-phase Phase-Locked Loop is used for the inverter-grid synchronization, allowing the control of the active and reactive powers solely with the dq components of the inverter currents. A detailed enhanced flowchart of the control algorithm with low-voltage-ride-through capability is presented and several simulations and experiments using Matlab/SIMULINK and the Controller Hardware-in-the-Loop simulation technique, respectively, are run for several types of one- and three-phase voltage sags in order to validate its behavior.

Fast Phase Angle Jump Estimation to Improve the Convergence Time of the GDSC-PLL

The fast detection of magnitude, frequency, and phase angle of the fundamental-frequency component is very useful in many three-phase power system applications. Most techniques to accomplish this task are based on different versions of three-phase phase-locked loop (PLL) schemes. Some variables of three-phase systems may experience phase angle jumps after some disturbances. In this paper, a method for the fast detection of phase angle jump occurrence, estimation of the phase angle jump, and its use for improving the performance of the generalized delayed signal cancelation (GDSC) PLL is proposed. The proposed method is based on the detailed evaluation of the GDSC filter transient behavior after a phase jump. Results considering typical three-phase grid disturbances are used to evaluate the proposed scheme, in comparison with other usual PLL techniques. The use of the proposed phase jump angle estimator allowed a reduction in the GDSC-PLL convergence time of about 50%.

Hedge-Algebra-Based Phase-Locked Loop for Distorted Utility Conditions

This paper presents the first application of the hedge-algebra theory in the field of grid synchronization. For this purpose, an optimized hedge-algebra controller (HAC) is developed and incorporated within the three-phase phase-locked loop (PLL) with moving average filters (MAFs) inside its feedback loop. Optimized fuzziness parameters and linguistic rule base of the HAC are obtained by a genetic algorithm using the integral of absolute error as the performance index during optimization. Calculated optimal parameter values of the HAC depend on the most frequently occurring disturbance in the electric grid. Two different PLL structures are proposed, depending on the types of disturbances occurring in the electric grid. The first structure is the conventional synchronous reference frame PLL with the nonadaptive MAF (i.e., MAF without order adjustment), but with the PI/PID controller in the phase loop replaced by the developed HAC. Such PLL structure is suitable for all analyzed disturbance types, expect for step-changes in the grid frequency. The second PLL structure introduces the adaptive MAF (i.e., MAF with order adjustment) and a new feedback signal in the output stage of the controller to achieve zero steady-state error in the case of step-changes in the grid frequency. The disturbance rejection capability of the two developed PLLs with the HAC (HAC-PLLs) is tested separately and compared experimentally with the PID- and fuzzy-controller-based PLLs.

A three-phase phase-locked loop algorithm with immunity to distorted signals employing an adaptive filter

This paper introduces a synchronization algorithm for the detection of the fundamental positive-sequence component in three-phase systems. The structure is based on the correlation of the input signal with a complex signal generated from the association of an adaptive filter and a phase-locked loop (PLL) method previously presented in literature. Good disturbance rejection is then achieved, in particular to interharmonics and subharmonics. Simulation and experimental results are presented and discussed in order to demonstrate the performance of the proposed solution when compared with that regarding dual second-order generalized integrator frequency locked loop (DSOGI-FLL), which is often considered to present good disturbance rejection.