A Three-Phase Synchronization Algorithm Based on a Modified DSOGI with Adjustable Re-Filtering

Abstract

The precise calculation of phase angle, voltage magnitude and frequency is crucial for the effective control of power electronic inverters connected to an electrical power system. The phase-locked loop (PLL) is a commonly employed method for measuring these variables. Nevertheless, the reliability of this measurement is influenced by transient events in the electrical power system and varies depending on the nature of the event and the specific design of the PLL. Notably, PLLs utilizing the double second-order generalized integrator are widely adopted for power converter synchronization purposes. This article proposes a three-phase PLL, which is based on the single-phase version previously reported by the authors. The proposed PLL, based on an alternative integrator approach, allows a fine adjustment of the tolerance to disturbances in the input voltage thanks to a second feedback gain in its pre-filter. It is reasonable to anticipate that the three-phase PLL will exhibit similar strengths to the single-phase version; however, in the three-phase case, an additional integrator is involved in pre-filtering the quadrature signals, and the double integrator is not employed as the quadrature signal generator. The performance of the proposed PLL is assessed by comparing it to other PLLs based on the second-order integrator, using a processor-in-the-loop approach.