AbstractWe report on the MOCVD growth of GaAs on patterned Si utilizing the Aspect Ratio Trapping (ART) method to reduce threading dislocations resulting from lattice mismatch. Defect-free GaAs was obtained from growth in sub-micron trenches formed in SiO2 on Si (001) substrates. Material quality has been characterized by cross-sectional and plan-view TEM and XRD. It was found that when growing GaAs above the trenched region, coalescence-induced threading dislocations (TDs) and planar defects were introduced at the coalescence junction interfaces. These defects were found to be unrelated to the misfit defects (MDs) on GaAs/Si interface that originated during initial epitaxial growth. Causes of coalescence defect formation were experimentally investigated by employing a two-step defect reduction scheme. It is concluded that by further optimizing growth conditions during coalesce layer growth, low defect-density GaAs material can be obtained on Si substrate.