Thin Silicon Substrate Research Articles

SkinWire

Current wearable form factors often house electronics using an enclosure that is attached to the body. This form factor, while wearable, tends to protrude from the body and therefore can limit wearability. While emerging research in on-skin interfaces from the HCI and wearable communities have generated form factors with lower profiles, they often still require support by conventional electronics and associated form factors for the microprocessor, wireless communication, and battery units. In this work, we introduce SkinWire, a fabrication approach that extends the early work in on-skin interfaces to shift wearable devices from their traditional box-like forms to a fully self-contained on-skin form factor. The Skin Wire approach starts with the placement of electronic components into individual PCB islands, which are then distributed over the body surface. The islands are connected through a novel skin-wiring approach that deposits conformal multi-stranded metallic wires on thin silicon substrates through a sewing-based technique. The process affords on-skin interfaces with the needed wiring in limited surface areas. We exemplify the capacity of this approach by shifting an IMU-based hand gesture system - which traditionally come in bulky glove-based form factors - directly onto the skin. Inspired by the emerging body art trend of body wiring, the Skin Wire approach uses readily accessible materials and affords aesthetic customization. We evaluate fabrication parameters, and conduct a user study to uncover wearability concerns.

Diode junction temperature in ultraviolet AlGaN quantum-disks-in-nanowires

The diode junction temperature (Tj) of light emitting devices is a key parameter affecting the efficiency, output power, and reliability. Herein, we present experimental measurements of the Tj on ultraviolet (UV) AlGaN nanowire (NW) light emitting diodes (LEDs), grown on a thin metal-film and silicon substrate using the diode forward voltage and electroluminescence peak-shift methods. The forward-voltage vs temperature curves show temperature coefficient dVF/dT values of −6.3 mV/°C and −5.2 mV/°C, respectively. The significantly smaller Tj of ∼61 °C is measured for the sample on the metal substrate, as compared to that of the sample on silicon (∼105 °C), at 50 mA, which results from the better electrical-to-optical energy conversion and the absence of the thermally insulating SiNx at the NWs/silicon interface. In contrast to the reported higher Tj values for AlGaN planar LEDs exhibiting low lateral and vertical heat dissipation, we obtained a relatively lower Tj at similar values of injection current. Lower temperatures are also achieved using an Infrared camera, confirming that the Tj reaches higher values than the overall device temperature. Furthermore, the heat source density is simulated and compared to experimental data. This work provides insight into addressing the high junction temperature limitations in light-emitters, by using a highly conductive thin metal substrate, and it aims to realize UV AlGaN NWs for high power and reliable emitting devices.

Thermomechanical-stress-free interconnection of solar cells using a liquid metal

Research efforts to overwhelmingly fortify the economics of photovoltaics have focused on increasing the light-to-electricity conversion efficiency and reducing the overall manufacturing costs. Since lowering the consumption of silicon has the potential to greatly curtail the material costs, studies on wafering thin silicon substrates have been performed. However, current methods to interconnect solar cells with metal ribbons are not sufficient to employ thin silicon wafers. Therefore, this study explores a novel route to interconnect solar cells with metal ribbons without thermomechanical stress using a highly conductive liquid metal. Galinstan, which is notoriously difficult to print, is successfully harnessed to be printable by suspending submillimetre-sized Galinstan droplets in the carrier vehicle, as aided by the yield stress. By mechanically sintering the Galinstan paste with gentle mechanical pressure, solar cells are interconnected with metal ribbons at room temperature. Albeit the averaged maximum power of the unit modules interconnected using the Galinstan paste was significantly degraded after just 100 thermal cycles due to the possible formation of resistive intermetallic compounds of Galinstan, the power degradation of the best unit module using the Galinstan paste is −0.9%, which is smaller than the averaged one of the unit modules using a conventional soldering method (-1.35%), implying the thermomechanical-stress-free interconnection method using a liquid metal has a chance to be improved for being a comparable competitor to the conventional soldering method.

Silicon photoresistive sensors with improved performance

This paper describes the properties of photoresistive sensors built on a thin silicon substrate. These fully restriction of hazardous substances compliant devices show high photo sensitivity, comparable to the best performing CdS/CdSe photocells, within a wide range of illumination intensities extending down to low illuminance levels of less than 5 lx of a black-body radiation at 2850 K color temperature. A comparative analysis of the photoconductive gain confirmed better efficiency of the devices with a shorter photoconductive channel length. The photoconductive gain was shown to increase with the illuminance level, exceeding unity at certain illuminance levels specific for the photoconductive channel length and applied voltage bias. Such behavior was suggested to occur due to the retardation of the minority carrier collection by the potential barrier formed by a high-low junction within the photoresistor's contact regions, which allows more than one majority carrier collection by the electrode per each collected non-equilibrium minority carrier. The physical mechanisms affecting the photocurrent and resistance dependence on the applied voltage bias and illumination intensity are discussed.

High Mechanical Strength Thin HIT Solar Cells With Graphene Back Contact

It is widely known that thinner Si substrate is the main path for lower $/Watt HIT solar cells due to improved charge collection, reduced bulk and total recombination, and fewer raw material consumption (Panasonic, IEEE Journal of Photovoltaics., vol. 4, p. 96, 2014). Nonetheless, thin substrates always lead to low mechanical stability and wafer breaking. In this work, spray coated 50 nm graphene layer is used as the back electrode in Si HIT solar cells to enhance the mechanical stability. With the incorporation of graphene as the back electrode in Si HIT solar cells, remarkable improvements in substrate mechanical strength are achieved. Without the degradation of HIT solar cell efficiency, hardness is increased nearly twofold from 902 to 1747 HV. The Young's modulus is increased from 93.9 to 140.1 GPa while the ultimate tensile strength is increased from 96.71 to 273.68 MPa. Low-cost chemical exfoliation method and low-temperature (150 °C) spray coating method have been employed for the preparation and deposition of thin graphene back electrode, respectively. In addition, unlike the graphene as the substitute for ITO in OLED applications, the graphene strengthened thin silicon substrate technology here imposes no additional constraint on the graphene electrode transparency since it is used as a back electrode. We, thereby, believe that our proposed method is effective for attaining higher efficiency and lower $/Watt thin Si HIT solar cell technology with enhanced mechanical strength.

In situ probing of pulsed laser melting and laser-induced periodic surface structures formation by dynamic reflectivity

The melting process and nanostructure formation induced by nanosecond and picosecond laser pulses on bulk silicon and copper thin film were studied by ex situ analysis and in situ real time reflectivity. Three different probing wavelengths (633, 473 and 326 nm) were used during the pump laser processing and were correlated to the beam parameters (pulse duration, laser fluence and number of laser shots) and copper thin film thickness. On a silicon surface using a KrF laser beam (27 ns, 1 Hz, 248 nm), the melting threshold was determined close to 700 mJ cm−2 and the melting duration increased from 10 to 130 ns as the fluence increased from 700 to 1750 mJ cm−2. Nanostructures with a spatial period close to the laser wavelength were formed on both copper thin film and silicon substrate after nanosecond Nd:YAG laser (10 ns, 266 nm, 1 Hz) irradiation. In the picosecond regime, using an Nd:YAG laser (40 ps, 266 nm, 1 Hz), different nanostructures, from spikes to laser-induced periodic surface structures, were formed on 500 nm copper thin film and were analyzed with respect to the drop in dynamic reflectivity changes versus the number of laser shots.

High-Performance Ultrathin Organic-Inorganic Hybrid Silicon Solar Cells via Solution-Processed Interface Modification.

Organic-inorganic hybrid solar cells based on n-type crystalline silicon and poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) exhibited promising efficiency along with a low-cost fabrication process. In this work, ultrathin flexible silicon substrates, with a thickness as low as tens of micrometers, were employed to fabricate hybrid solar cells to reduce the use of silicon materials. To improve the light-trapping ability, nanostructures were built on the thin silicon substrates by a metal-assisted chemical etching method (MACE). However, nanostructured silicon resulted in a large amount of surface-defect states, causing detrimental charge recombination. Here, the surface was smoothed by solution-processed chemical treatment to reduce the surface/volume ratio of nanostructured silicon. Surface-charge recombination was dramatically suppressed after surface modification with a chemical, associated with improved minority charge-carrier lifetime. As a result, a power conversion efficiency of 9.1% was achieved in the flexible hybrid silicon solar cells, with a substrate thickness as low as ∼14 μm, indicating that interface engineering was essential to improve the hybrid junction quality and photovoltaic characteristics of the hybrid devices.

Light trapping enhancement induced by bimetallic non-alloyed nanoparticles on a disordered subwavelength flexible thin film crystalline silicon substrate using metal-assisted chemical etching.

We report the application of gold and silver (AuAg) bimetallic non-alloyed nanoparticles (BNNPs) on disordered subwavelength structures (d-SWSs). The combined advantages of the plasmonic structures and d-SWSs improved the light trapping performance of flexible thin film crystalline silicon (c-Si) solar cells. Antireflective d-SWSs were fabricated using spin-coated Ag ink and subsequent metal-assisted chemical etching, which reduced the ion-induced surface damage produced by the dry etching process. The dimensions of the d-SWSs were finely tuned by adjusting the Ag ink ratio. Au8Ag8 BNNPs were employed on optimized d-SWSs to achieve low reflectance at broadband wavelengths. The Au8Ag8 BNNPs on the d-SWSs showed 180% and 145% enhanced absorption compared to bare c-Si film and Au8Ag8 BNNPs on c-Si film, respectively, in the wavelength range of 300-1100 nm. After 200 cycles of bending the antireflection of the structures remained similar to the original level. This study introduces new approaches for light management in flexible thin film c-Si solar cells over the broadband wavelength range.

Unraveling bulk defects in high-quality c-Si material via TIDLS

The current trend in silicon photovoltaics moving towards high-quality thin mono-crystalline silicon substrates sets a new challenge for the understanding of recombination mechanisms limiting the final performance of solar cells. Temperature- and injection-dependent lifetime spectroscopy (TIDLS) has been shown to be a promising method for studying of high-quality material with lifetime above 10 ms where the concentration of electrically active defects is well below the sensitivity of the most well-known characterization techniques. In particular, when coupled with the Shockley–Read–Hall lifetime recombination model, TIDLS is capable of providing the most important defects' parameters including their energy level and concentration. In this contribution, we show that for a high-quality silicon material, a thorough evaluation of the surface recombination velocity (SRV) temperature- and injection dependence is crucial for an accurate identification of the defects contained in the bulk. A new methodology for the analysis of TIDLS data, called defect parameters contour mapping, is introduced for the first time. By applying it to high-quality n-type float zone c-Si samples passivated by a-Si:H(i) or an a-Si:H(i)/a-Si:H(n) stack, we are able to assert the presence of defects in high lifetime materials in a range of concentration unachievable by any other characterization technique thus far. Copyright © 2016 John Wiley & Sons, Ltd.

Silver-film subwavelength gratings for polarizers in the terahertz and mid-infrared regions.

Silver is proposed as a useful metal for thin metal-film subwavelength-grating polarizers in both the terahertz and mid-infrared regions. A triangular Ag-film grating for a terahertz-region polarizer fabricated on a resin substrate showed measured TE-wave losses of higher than 45 dB in the frequency range of 0.5-2.2 THz, while TM-wave losses were lower than 0.75 dB in the range of 0.5-3THz. A triangular double Ag-film grating structure on a thin silicon substrate with an anti-reflection layer on its reverse side was fabricated for the polarizer in the mid-infrared region. Measured TE-wave losses were higher than 27 dB in the wavelength range of 16-21 μm, while the minimum TM-wave loss was 3.5 dB at around the wavelength of 19 μm. Silver films are confirmed to be promising candidates for fabricating high-performance polarizers in the terahertz and mid-infrared regions.

Wafering of ultra‐thin silicon substrates by MeV hydrogen implantation: effects of fluence and energy

AbstractIn this paper, we report on implantation parameters allowing the delamination of large surface of ultra‐thin silicon substrates by using MeV hydrogen implantation. We particularly focus on the effects of both hydrogen fluence and implantation energy, on the size of the largest delaminated surface in one piece. We demonstrate that thin silicon substrates with thicknesses between 30 µm and 70 µm can be extracted from silicon commercial wafers. In this study, the used‐material, the implantation energy and the hydrogen fluence ranges are (100) Si, 1.5 MeV‐2.5 MeV, 1×1017cm–2‐2×1017cm–2, respectively. We find that, by increasing hydrogen fluence, the maximum achievable surface of delaminated substrates in one piece can be doubled. Indeed, by XTEM, we observed that fracture precursor defects are mostly oriented along {111} in the case of the lowest fluence, which are unfavorable for a good surface‐parallel crack propagation. For the highest fluence, precursors are oriented along {100} which are parallel to the substrate surface, therefore they allow propagation over longer distances of cracks parallel to the substrate surface. We also find that, despite of the raise of the proportion of precursors oriented along {111}, the total surface of delaminated substrates significantly increases with the implantation energy. (© 2016 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Metamaterials: A New Ba0.6 Sr0.4 TiO3 -Silicon Hybrid Metamaterial Device in Terahertz Regime (Small 19/2016).

A giant terahertz modulation based on a Ba0.6 Sr0.4 TiO3 -silicon hybrid metamaterial is reported by L. Wu, W. Zhang, and co-workers on page 2610. The proposed nanoscale Ba0.6 Sr0.4 TiO3 (BST) hybrid metamaterial, delivering a transmission contrast of up to ≈79% due to electrically enabled carrier transport between the ferroelectric thin film and silicon substrate, is promising in developing high-performance real world photonic devices for terahertz technology.

A New Ba0.6 Sr0.4 TiO3 -Silicon Hybrid Metamaterial Device in Terahertz Regime.

Metamaterials, offering unprecedented functionalities to manipulate electromagnetic waves, have become a research hotspot in recent years. Through the incorporation of active media, the exotic electromagnetic behavior of metamaterials can be dramatically empowered by dynamic control. Many ferroelectric materials such as BaSrTiO3 (abbreviated as BST), exhibiting strong response to external electric field, hold great promise in both microwave and terahertz tunable devices. A new active Ba0.6 Sr0.4 TiO3 -silicon hybrid metamaterial device, namely, a SRR (square split-ring resonator)-BaSrTiO3 thin film-silicon three-layer structure is fabricated and intensively studied. The active Ba0.6 Sr0.4 TiO3 thin film hybrid metamaterial, with nanoscale thickness, delivers a transmission contrast up to ≈79% due to electrically enabled carrier transport between the ferroelectric thin film and silicon substrate. This work has significantly increased the low modulation rate of ferroelectric based devices in terahertz range, a major problem in this field remaining unresolved for many years. The proposed BST metamaterial is promising in developing high-performance real world photonic devices for terahertz technology.

Preparations of Cu2ZnSnS4 thin films and Cu2ZnSnS4/Si heterojunctions on silicon substrates by sputtering

The single-crystalline silicon substrate has close lattice constant with Cu2ZnSnS4 (CZTS), which is beneficial to the crystalline growth of CZTS thin films. In this work, the CZTS thin films were deposited on silicon substrates by sputtering and post-sulfurization to form CZTS/Si heterojunctions. The experimental results indicate the formation of CZTS with preferred orientation of (112) plane. The crystallinity of CZTS enhances and the secondary phases reduce with increasing sulfurization temperature. The fabricated CZTS/Si heterojunctions show rectifying and photovoltaic properties. The photovoltaic properties of CZTS/Si heterojunctions are further analyzed by the absorption of incident photons in the CZTS thin films and silicon substrates.

A new method for measuring the flatness of large and thin silicon substrates using a liquid immersion technique

Flatness measurements of thin and large substrates are greatly affected by gravity. In this work, a new method was proposed for accurately measuring the flatness error of large and thin silicon wafers using a floating technique. In this method, a silicon wafer was immersed in a liquid that had a density slightly lower than that of silicon and was supported by three ball supporters in the liquid. The wafer shape was measured using a laser triangulation sensor. The buoyancy force on the wafer inside the liquid could cancel out most of the effect of gravity. The residual effect of gravity was further removed by subtracting the residual deflection calculated by finite-element modeling from the measured result. The method was validated by comparing the flatness values of a thick wafer measured using this method and via a commercially available interferometer. The deformations of wafers ground by #600 and #2000 diamond wheels were measured and the measurement error was less than 3% of the total deformation.

Flexible, low-loss and large area metamaterials with high Q value

To get flexible, low loss and large area metamaterials with high Q value for biosensing, the metamaterials structures with different micro/nanogaps on parylene free-standing thin film and silicon substrates were designed, simulated, fabricated, and characterized. Especially, the parylene shadow mask technology and electronic beam lithography (EBL) were combined and used to fabricate metamaterials with nanogap (200nm). The results show strong electromagnetic responses at terahertz (THz) frequencies ranging from 0.2THz to 2.5THz and indicated that parylene is an ideal low loss substrate or coating material. The bio-stable, bio-compatible properties of parylene and “hot spot” plasmonic properties of metamaterials have great potential application such as THz biosensor to detect the cancer biomarker.

DMAPS: a fully depleted monolithic active pixel sensor—analog performance characterization

Monolithic Active Pixel Sensors (MAPS) have been developed since the late 1990s based on silicon substrates with a thin epitaxial layer (thickness of 10–15 μm) in which charge is collected on an electrode, albeit by disordered and slow diffusion rather than by drift in a directed electric field. As a consequence, the signal of these conventional MAPS is small (≈1000 e−) and the radiation tolerance is limited. In this paper, the development of a fully Depleted Monolithic Active Pixel Sensors (DMAPS) based on a high resistivity substrate allowing the creation of a fully depleted detection volume is presented. This concept overcomes the inherent limitations of charge collection by diffusion in the standard MAPS designs. We present results from a prototype chip EPCB01 designed in a commercial 150 nm CMOS technology. The technology provides a thin (≈50 μm) high resistivity n-type silicon substrate as well as an additional deep p-well which allows to integrate full CMOS circuitry inside the pixel. Different matrix types with several variants of collection electrodes and pixel electronics have been implemented. Measurements of the analog performance of this first implementation of DMAPS pixels are presented.

Kerfless layer-transfer of thin epitaxial silicon foils using novel multiple layer porous silicon stacks with near 100% detachment yield and large minority carrier diffusion lengths

Two important aspects for the success of the porous silicon-based layer transfer method in producing kerfless thin (<50µm) silicon foils for future silicon solar modules are addressed in this work: achieving high detachment yield and high minority carrier diffusion lengths. The detachment characteristics of the porous silicon-based lift-off process is studied using finite element modeling as well as experiments. It is shown that for easy detachment and high detachment yield, a low density of thin silicon pillars must be attained in the high porosity detachment layer (HP-DL) after high temperature sintering. This is elegantly achieved by increasing the thickness of the low porosity template layer (LP-TL) which acts as the vacancy supply to increase the post-anneal porosity of the HP-DL. In this way, near 100% detachment yield has been achieved. However, a thicker LP-TL results in a poorer quality epitaxial growth surface. To circumvent this trade-off, novel triple and quadruple layer porous silicon stacks are introduced which decouple the function of the LP-TL that acts as both the template for epitaxy and as the vacancy supply for the HP-DL. In these new stacks, a surface zone of very low void size and density (nearly void-free) is created which allows high quality epitaxy on easily-detachable porous silicon stacks. Minority carrier lifetime measurements on epitaxial foils grown on such a triple layer stack has resulted in an effective lifetime of ~350µs at the injection level of 1015cm−3 which corresponds to a minimum minority carrier diffusion length of ~670µm (> 16 times the silicon thickness). With such high quality epitaxial foils combined with high detachment yield, very high efficiency solar devices on thin silicon substrates would be a reality in the near future.

Upgrade of the LHCb Vertex Locator

The upgrade of the LHCb experiment, planned for 2018, will transform the entire readout to a trigger-less system operating at 40 MHz. All data reduction algorithms will be executed in a high-level software farm, with access to all event information. This will enable the detector to run at luminosities of 1–2 × 1033/cm2/s and probe physics beyond the Standard Model in the heavy sector with unprecedented precision.The upgraded VELO must be low mass, radiation hard and vacuum compatible. It must be capable of fast pattern recognition and track reconstruction and will be required to drive data to the outside world at speeds of up to 2.5 Tbit/s. This challenge is being met with a new Vertex Locator (VELO) design based on hybrid pixel detectors positioned to within 5 mm of the LHC colliding beams. The sensors have 55 × 55 μm square pixels and the VELOPix ASIC which is being developed for the readout is based on the Timepix/Medipix family of chips. The hottest ASIC will have to cope with pixel hit rates of up to 900 MHz.The material budget will be optimised with the use of evaporative CO2 coolant circulating in microchannels within a thin silicon substrate. Microchannel cooling brings many advantages: very efficient heat transfer with almost no temperature gradients across the module, no CTE mismatch with silicon components, and low material contribution. This is a breakthrough technology being developed for LHCb.LHCb is also focussing effort on the construction of a lightweight foil to separate the primary and secondary LHC vacua, the development of high speed cables and radiation qualification of the module.The 40 MHz readout will also bring significant conceptual changes to the way in which the upgrade trigger is operated. Work is in progress to incorporate momentum and impact parameter information into the trigger at the earliest possible stage, using the fast pattern recognition capabilities of the upgraded detector.The current status of the VELO upgrade will be described together with a presentation of recent beam-test results.

Ion irradiation of the native oxide/silicon surface increases the thermal boundary conductance across aluminum/silicon interfaces

The thermal boundary conductance across solid-solid interfaces can be affected by the physical properties of the solid boundary. Atomic composition, disorder, and bonding between materials can result in large deviations in the phonon scattering mechanisms contributing to thermal boundary conductance. Theoretical and computational studies have suggested that the mixing of atoms around an interface can lead to an increase in thermal boundary conductance by creating a region with an average vibrational spectra of the two materials forming the interface. In this paper, we experimentally demonstrate that ion irradiation and subsequent modification of atoms at solid surfaces can increase the thermal boundary conductance across solid interfaces due to a change in the acoustic impedance of the surface. We measure the thermal boundary conductance between thin aluminum films and silicon substrates with native silicon dioxide layers that have been subjected to proton irradiation and post-irradiation surface cleaning procedures. The thermal boundary conductance across the Al/native oxide/Si interfacial region increases with an increase in proton dose. Supported with statistical simulations, we hypothesize that ion beam mixing of the native oxide and silicon substrate within $\ensuremath{\sim}2.2\phantom{\rule{0.3em}{0ex}}\mathrm{nm}$ of the silicon surface results in the observed increase in thermal boundary conductance. This ion mixing leads to the spatial gradation of the silicon native oxide into the silicon substrate, which alters the acoustic impedance and vibrational characteristics at the interface of the aluminum film and native oxide/silicon substrate. We confirm this assertion with picosecond acoustic analyses. Our results demonstrate that under specific conditions, a ``more disordered and defected'' interfacial region can have a lower resistance than a more ``perfect'' interface.