Thin Oxide Growth Research Articles

HVOF and Laser-Cladded Fe\u2013Cr\u2013B Coating in Simulated Biomass Combustion: Microstructure and Fireside Corrosion

Biomass is often considered as a low carbon alternative to fossil fuels in the power industry. However, the heat exchangers in biomass plants can suffer from chloride-based aggressive fireside corrosion. A commercially available amorphous Fe–Cr–B alloy was deposited onto a stainless steel substrate by HVOF thermal spray and laser cladding. The controlled environment corrosion tests were conducted in a HCl-rich environment at 700 °C for 250 h with and without KCl deposits. The samples were examined with XRD, SEM and EDX mapping to understand the corrosion mechanisms. In the absence of any deposits, the amorphous HVOF coating performed very well with a thin oxide growth, whereas the crystalline laser cladding suffered from ~350 µm metal loss. The scales were composed of MnWO4, Fe2O3, Fe3O4 and Cr2O3. When a KCl deposit was present, the HVOF-sprayed coating delaminated from the substrate and MnCl2 was found in the scale.

Ultra-thin oxide growth on silicon during 10keV x-ray irradiation

Abstract Surface effects on silicon wafers irradiated by 10 keV x-rays at room temperature were characterized using x-ray photoelectron spectroscopy and spectroscopic ellipsometry. The samples were exposed to total ionizing doses ranging from 1.0 to 12 Mrad(SiO2) at x-ray dose rates ranging from 5.8 krad(SiO2)/min to 67 krad(SiO2)/min. Accelerated thin oxide growth on irradiated samples compared to natural native oxide growth under room temperature conditions was demonstrated, and the composition of the irradiation-accelerated oxide was investigated. The presence of suboxides along with silicon dioxide was confirmed on the irradiated silicon sample. Two thin oxide growth models were applied to characterize the enhanced oxidation rate observed for irradiated wafers.

Extensive Study of the Correlation between Contact Etch Stop Nitride film Properties and Negative Bias Temperature Instabilities Measured in pMOSFETS

Mobility enhancement by process induced strain in the Si channel has been extensively used since 90nm node to improve transistor drive current. Such technique becomes mandatory to compensate scalability limits of several processes like ultra thin gate oxide growth. The Contact Etch Stop nitride Layer (CESL) is the most commonly used method to get stress induced mobility enhancement. However, the re-engineering of this nitride layer for stress enhancement needs to cover all electrical aspects including reliability characteristics, in particular the Negative Bias Temperature Instabilities (NBTI). In this work, we confirm that pMOS NBTI can be significantly impacted by the nitride CESL properties. A Design Of Experiment methodology allows demonstrating that the NBTI is enhanced by the nitride weight density, linked to hydrogen diffusivity within the film. It is finally shown that the nitride density must be set as low as possible to minimize the NBTI.

Analysis of the thin-oxide growth kinetic equation

Detailed understanding of the atomic-level mechanisms of oxidation is required to achieve control of ultrathin oxide growth processes. Published models support the widely accepted empirical description of Massoud et al (Massoud H Z, Plummer J D and Irene E A 1985 J. Electrochem. Soc. 132 2685), in which the growth rate is the sum of two terms, a ‘Deal–Grove’ term that produces linear-parabolic behaviour and an exponential term that enhances the growth rate for thin oxides. We give accurate although approximate analytical solutions for the Massoud kinetic equation. These solutions reduce to the Deal–Grove form for large thickness, give a value for the otherwise ad hoc initial time parameter in that model, become exact for small oxide thickness and have known error bounds as a function of growth thickness and temperature. The solutions should be useful for design calculations and general presentation of an enhanced Deal–Grove growth model.

Reliability of thin oxides grown on deuterium implanted silicon substrate

We have investigated the reliability of gate oxide with deuterium incorporated at the Si/SiO/sub 2/ interface through low energy ion implantation into the silicon substrate before thin gate oxide growth. Deuterium implantation at a dose of 1/spl times/10/sup 14//cm/sup 2/ at 25 keV showed improved breakdown characteristics. Charge-to-breakdown seems to correlate well with the interface state density measured by the conductance method.

Si (100)– SiO 2 interface properties following rapid thermal processing

An experimental examination of the properties of the Si(100)–SiO2 interface measured following rapid thermal processing (RTP) is presented. The interface properties have been examined using high frequency and quasi-static capacitance-voltage (CV) analysis of metal-oxide-silicon (MOS) capacitor structures immediately following either rapid thermal oxidation (RTO) or rapid thermal annealing (RTA). The experimental results reveal a characteristic peak in the CV response measured following dry RTO and RTA (T>800 °C), as the Fermi level at the Si(100)–SiO2 interface approaches the conduction band edge. Analysis of the QSCV responses reveals a high interface state density across the energy gap following dry RTO and RTA processing, with a characteristic peak density in the range 5.5×1012 to 1.7×1013 cm−2 eV−1 located at approximately 0.85–0.88 eV above the valence band edge. When the background density of states for a hydrogen-passivated interface is subtracted, another peak of lower density (3×1012 to 7×1012 cm−2 eV−1) is observed at approximately 0.25–0.33 eV above the valence band edge. The experimental results point to a common interface state defect present after processes involving rapid cooling (101–102 °C/s) from a temperature of 800 °C or above, in a hydrogen free ambient. This work demonstrates that the interface states measured following RTP (T>800 °C) are the net contribution of the Pb0/Pb1 silicon dangling bond defects for the oxidized Si(100) orientation. An important conclusion arising from this work is that the primary effect of an RTA in nitrogen (600–1050 °C) is to cause hydrogen desorption from pre-existing Pb0/Pb1 silicon dangling bond defects. The implications of this work to the study of the Si–SiO2 interface, and the technological implications for silicon based MOS processes, are briefly discussed. The significance of these new results to thin oxide growth and optimization by RTO are also considered.

The Ozone Solubility and its Decay in Aqueous Solutions: Crucial Issues in Ozonated Chemistries for Semiconductor Cleaning

The use of ozone is becoming more and more popular for the cleaning of semiconductor structures, e.g. for pregate cleaning (e.g. thin oxide growth 1 and organic monolayer removal ) and photoresist stripping . Fundamental knowledge about the physicochemical behaviour of ozone in aqueous solutions is a necessity for optimizing these processes. Two crucial parameters are the solubility and the decomposition of ozone in DI-water. The ozone decomposition is driven by a variety of radicals which are formed as reaction products between water, ozone and “impurities”. Moreover these radicals may be more reactive than ozone itself. It is thus of importance to optimize both parameters to achieve the best conditions for each application.

Analysis of Thin Oxide Growth Mechanisms in Partial-Pressure Rapid-Thermal Oxidation of Silicon

In this paper we analyze the growth mechanism of extremely thin silicon-oxide layers, formed by rapid thermal oxidation under various oxygen partial pressures, on the basis of the Deal-Grove model and the silicon-fragment model. It is determined that the silicon-fragment model gives an acceptable interpretation of the experimental results concerning the linear rate constant.

Interface properties of the Si(1 0 0)–SiO2 system formed by rapid thermal oxidation

In this work, the properties of the Si(100)–SiO2 interface are examined directly following wet and dry rapid thermal oxidation (RTO) at 1000–1100°C. The high frequency and quasi-static CV response of the Si(100)–SiO2 system are measured using a mercury probe method. The analysis indicates a high interface state density across the band gap for dry oxidation, with a characteristic peak in the range 0.8–0.9 eV above the valence band edge. These interface state profiles are compared to polysilicon/oxide/Si(100) structures, measured after rapid thermal annealing at 1050°C (where the gate oxide is grown by conventional furnace oxidation). The results show a striking similarity, pointing to a common origin for the interfacial defects. Steam-assisted RTO samples do not reveal these peaks, and the reasons for this are presented. The significance of these new results to thin oxide growth and optimisation by RTO are discussed.

X-ray photoelectron spectra of low temperature plasma anodized Si0.84Ge0.16 alloy on Si(100): Implications for SiGe oxidation kinetics and oxide electrical properties

The material properties of low-temperature plasma-grown oxide on gas-source molecular beam epitaxial Si0.84Ge0.16 have been investigated. X-ray photoelectron spectra studies show that plasma anodization leads to no segregation of Ge species during thin oxide growth with the onset of partial segregation occurring for thicker oxides. Depth profiling shows that the plasma oxide is stoichiometric in form with the exception of a small percentage of Ge atoms left in their unoxidized state. The density of these Ge atoms agrees with that measured in previous electron trapping studies. In addition, oxide growth rate enhancement of SiGe is observed. These phenomena are explained using a qualitative model for the mechanism of oxide growth of SiGe which is consistent with published results for SiGe: oxides grown with other systems.

Oxidation enhanced diffusion during the growth of ultrathin oxides

Boron-doped marker layers grown by chemical vapor deposition were used to measure oxidation enhanced diffusion (OED) during the growth of ultrathin oxide layers of 3.3 nm. The oxides were grown by three different methods: steam oxidation at 650°C, dry furnace oxidation at 800°C and rapid thermal oxidation at 1050°C. The effective B diffusion length decreases drastically with oxidation temperature, being lower than ∼3 nm for steam oxidation. This demonstrates that steam oxidation is ideally suited for minimizing dopant diffusion during the growth of gate oxides in advanced CMOS processing. Diffusion analysis shows that the enhancement in the equilibrium diffusivity increases from a factor of ∼3 at 1050°C to ∼350 at 650°C. On the basis of these measurements, parameters in a state-of-the-art OED model have been calibrated to enable accurate process modeling of OED in the regime of thin oxide growth.

An isotopic labeling study of the growth of thin oxide films on Si(100)

The mechanism of thin (<8 nm) oxide growth on Si(100) has been studied by high-resolution medium energy ion scattering in combination with oxygen isotope substitution in the T=800–900 °C and 0.1–1 Torr oxygen pressure regime. Isotopic labeling experiments demonstrate that the Deal–Grove model breaks down for these films. In addition to the traditional oxidation reaction at the Si/SiO2 interface, two other spatially specific reactions take place during thermal oxidation: an exchange reaction at the oxide surface and an oxidation reaction in the near-interfacial region.

Initial oxidation of silicon (100): A unified chemical model for thin and thick oxide growth rates and interfacial structure

A model for silicon oxidation that invokes dissociative chemisorption of molecular oxygen at the interface between silicon dioxide and silicon is described. The model accounts for a self-limiting oxide film thickness of 0.5–0.6 nm (for oxidations performed at temperatures sufficient to dissociate surface dimers and permit oxygen penetration of the substrate beyond a single monolayer of suboxide). Detailed examination of the model suggests a mechanism for an inherent oxide/silicon interface roughness of approximately one atomic diameter. Kinetic rate equations developed from the model successfully account for the observed power law dependence of rate on oxygen partial pressure. These relationships were used in the derivation of an expression for the variation of oxide film growth rate with overlying oxide thickness. The relationship is tested against experimental observations reported in the literature and found to give an excellent fit.

Film interface control in integrated processing systems*

A number of system concepts in which the integrity of substrate surface and film interfaces are preserved are discussed. This includes stand-alone tools with internal clean air or nitrogen facilities with wafer transfer between such tools in clean containers (‘‘minienvironments’’) and single-wafer and batch-type cluster systems in which the processing and wafer transfer modules are physically connected. Depending on the cleanliness requirements, wafer transfer and processing are done in pure atmospheric nitrogen, low-pressure nitrogen, or vacuum. An analysis is given in which the ambient requirements are related to surface reactivity, wafer transfer time, and acceptable surface contamination level. Trade-offs in terms of capital cost, throughput, flexibility, and film quality are analyzed. A number of different system concepts combining wafer preclean, thin oxide growth, and poly-Si deposition processes are analyzed in terms of their economical performance. It appears that single-wafer systems have a logistic advantage in terms of short cycle time and wafer inventory; however, the cost per wafer of batch-type systems is considerably lower than single-wafer ones. It is shown that the optimum choice between (fast, high-temperature) single-wafer and (slow, low-temperature) batch-type systems in terms of process performance depends on physical parameters such as activation energy and the occurrence of undesired, competing, processes.

Photo-Excited Cleaning of Silicon with Chlorine and Fluorine

ABSTRACTChlorine radicals generated with UV irradiation are effectively used to remove residual metal contaminants after vatious LSI processes. Aluminum, iron, and copper atoms are effectively removed as volatile chloride species from silicon surfaces. The mechanism has been studied using silicon wafers intentionally contaminated with those metal ions. Contaminants are involved in native oxides as metal oxides or hydroxides. Chlorine radicals penetrate the native oxides and attack those oxides or hydroxides vaporizing metal chlorides. The cleaning process is accompanied with slight etching of silicon surfaces to a depth as thin as a few nm. However, this is not essential because the substrate temperature is more important than the etching depth. Alkaline metals are also removed from the surfaces to the level as small as the detection limit of atomic absorption spectroscopy. We believe that those are removed through a lift-off process. The, wixture of fluorine and hydrogen gases removes a native oxide of silicon under UV irradiation. Hydrogen fluoride radicals react with native oxide resulting in hydrogen termination on silicon dangling bonds. These cleaning processes are advantageous for low temperature silicon epitaxy, reliable contact formation, and thin gate oxide growth.

Thin oxide growth by intermediate annealing process

On presente un procede d'oxydation a 4 etapes, pour obtenir des couches d'oxyde de grande qualite thermique. La qualite d'oxyde obtenue par ce procede est meilleure que celle des methodes conventionnelles, et cette qualite peut etre maintenue jusqu'a une epaisseur d'environ 110 A

Selected Aspects of Very Thin Oxide Growth Processes

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The Evolution of Si / SiO2 Interface Roughness

The interface between substrate silicon and its thermally grown oxide undergoes atomic‐scale roughening during the early stages of thin oxide growth at low temperatures (≈900°C). High resolution cross‐sectional transmission electron microscopy (TEM) shows that the interface roughness reaches a maximum extent and then diminishes as oxide growth proceeds. Consideration of the boundary and the oxide surface above it indicate a nonuniform oxidation process. The growth of the protrusions can be explained by a reduction in the interface reaction rate brought about by local stress effects. Relaxation of the layer by viscous flow and the transition to diffusion‐controlled growth act to eliminate roughness during long or high temperature oxidations. Thicknesses of ultrathin oxides determined by ellipsometry are shown to be misleading by comparison to the actual layer thicknesses determined from TEM micrographs.

Effect of Dry Etching of a Thermal Oxide on Subsequent Growth and Properties of Thin Oxides (≃ 80 Å)

Thin oxides (≃80 Å) have widespread application as the tunnel oxides for floating gate EEPROM devices and as gate dielectrics for submicron MOS devices. Many EEPROM memory cells require a window to be etched by plasma etching into a relatively thick layer of prior to tunnel oxide growth. The high accuracy of defining the tunnel gate area requires sophisticated definition techniques such as stepper lithography and anisotropic plasma etching. This paper describes the effects of anisotropic plasma etching of a 900Å thick thermal oxide on the properties of thin oxides grown subsequently. It is shown that the thin oxide growth rate as well as the oxide breakdown voltage characteristics is affected by the plasma etching conditions.

Effects of Preoxidation Ambient in Very Thin Thermal Oxide on Silicon

The impact of the gas ambient used during the preoxidation warm‐up of silicon wafers on the very thin oxide growth process and oxide dielectric strength is studied. It is shown that a 10 min warm‐up in results in higher initial growth rate and decreased oxide dielectric strength as compared to the warm‐up carried in Ar. These effects depend on temperature of oxidation and are more significant at 1100° than 900°C. Also, it is shown that the addition of 1% to the Ar used as a warm‐up ambient results in an increased oxidation rate and higher dielectric strength of very thin oxides due to water vapor formation inside the oxidation chamber during the replacement of mixture with .