Thin Gate Oxide MOSFETs Research Articles

Remote charge scattering: a full Coulomb interaction approach and its impact on silicon nMOS FinFETs with HfO2 gate dielectric

Remote charge scattering (RCS) has become a serious obstacle inhabiting the performance of ultra- thin gate oxide MOSFETs. In this paper, we evaluate the impact of RCS by treating the real-space full Coulomb interaction between remote charges and inversion carriers. A new approach that can be simply incorporated in ensemble Monte Carlo (EMC) based simulations without any variation of the standard EMC simulator is developed. The charge-carrier (c-c) interaction model is based on a particle-mesh (PM) calculation method which resolves both the long-range and short-range Coulomb interactions by solving Poisson's equation on a re- fined mesh. The validity of our approach is verified by three-dimensional (3-D) resistor simulations, from which the obtained doping dependence of the low-field mobility agrees well with experimental results. The proposed approach is then used to study the impact of RCS on the drive current and carrier transport properties in the channel of a 20 nm silicon (Si) nMOS FinFET with HfO2 gate stack. We find that the influence of RCS is strongly localized in the vicinity of the remote charges and exhibits a granular nature, indicating the necessity to consider the full Coulomb interaction in RCS.

Leakage Current and Floating Gate Capacitor Matching Test

Capacitor mismatch is an important device parameter for precision analog applications. In the last ten years, the floating gate measurement technique has been widely used for its characterization. In this paper we describe the impact of leakage current on the technique. The leakage can come from, for example, thin gate oxide MOSFETs or high dielectric constant capacitors in advanced technologies. SPICE simulation, bench measurement, analytical model and numerical analyses are presented to illustrate the problem and key contributing factors. Criteria for accurate capacitor systematic and random mismatch characterization are developed, and practical methods of increasing measurement accuracy are discussed.

Impact of the high vertical electric field on low-frequency noise in thin-gate oxide MOSFETs

In this paper, quantum effects induced by the high vertical electric field, i.e., inversion layer quantization and gate current tunneling, are taken into account to model the low-frequency noise behavior of 0.13 /spl mu/m technology node thin gate oxide MOSFETs. First, we show that the modifications induced by inversion layer quantization in the band structure and spatial distribution of the inversion layer carriers must be taken into account when extracting an effective density of traps from 1/f noise measurements. The ultrathin gate oxide and the high substrate doping of scaled MOSFETs create a strong electrical field in the inversion layer, which causes the surface conduction (n-) or valence (p-MOSFET) band to split into discrete energy levels. The first allowed state resides then above (below) the conduction (valence) band level in the bulk, giving rise to a band gap widening and in addition the spatially localized charge centroid is at a finite distance from the SiO/sub 2//Si interface. The impact on both dc and noise parameters of these quantum effects have been numerically calculated and compared to experimental results. The main conclusions coming out of this study is that if the inversion layer quantization is neglected, inaccurate oxide trap densities will be derived from the input-referred voltage noise spectral density S/sub VC/:. A similar conclusion will hold for the extraction of the scattering coefficient derived in the frame of a correlated number fluctuations model or for the effective Hooge parameter, derived from the normalized drain current spectral density S/sub ID//I/sub D//sup 2/. Finally, a particular gate tunneling mechanism namely Electron Valence Band (EVB) tunneling is shown to modify the noise behavior of thin gate oxide devices in terms of a self-biasing body effect.

Low frequency noise in thin gate oxide MOSFETs

Low frequency, 1/ f, noise of the drain current, I D, fluctuations was measured on a series of Si MOSFETs with the gate oxide thickness, t ox, varied from 25 to 40 Å by steps of 5 Å. The salient point of this work is a demonstration that, at sufficiently low I D intensities, a mean low noise level in the MOSFETs is reduced as the gate oxide becomes thinner. This is explained assuming that the noise originates from the electron capture/release on Si/SiO 2 interface/border traps. The flat band voltage fluctuations, observable as noise, are linked then to the oxide charge fluctuations by a factor, that is inversely proportional to the gate capacitance, C ox, and thus proportional to t ox. At higher I D, the results are more complicated, as the access resistance noise is also involved. We provide an interpretation of the ensemble of the data and show that the noise analysis can furnish quantitative estimates of several device characteristics. Device degradation and its consequences for the low frequency noise at higher current levels are also discussed.

Correlation Between Gate Induced Drain Leakage and Plasma Induced Interface Traps

ABSTRACTIn this paper we carefully investigate the correlation between gate induced drain leakage current and plasma induced damages in the deep submicron p+ polysilicon gate pMOSFETs with gate oxide thickness of 50 Å. Low field enhancement of gate induced drain leakage current caused by plasma charging damage is a function of metal 1 antenna area/length ratio and cell location. Combined with the charge pumping measurements, it is found that gate induced drain leakage current enhancement is mainly due to the plasma induced interface traps. A linear relationship between the gate induced drain leakage and the plasma induced interface trap density is observed within the experimental error. On the other hand, the threshold voltage measurements show that oxide trapped charge has no major contribution to, and no correlation with, the gate induced drain leakage current for thin gate oxide MOSFET devices.

A mobility model including the screening effect in MOS inversion layer

A mobility model for MOSFET device simulation is proposed. The model is not only applicable to both inversion layer and source/drain high concentration regions of a MOSFET, but it also takes into account the screening effect in the inversion layer. The model also includes an improved normal-field dependence for thin gate oxide MOSFETs. The low parallel electric field mobility is estimated by adding mobilities due to donor scattering, acceptor scattering and lattice scattering using Matthiesen's rule. Mobilities due to both the donor and the acceptor scattering include the electron screening effect. The mobility due to lattice scattering is formed as a function of normal electric field E/sub n/, including the strong dependence term of E/sub n/, to express surface roughness scattering. Calculation results of the device simulation using the mobility model show good agreement with the experimental data for various channel dopings.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Effects of titanium salicide process on MOSFET characteristics

The effects of the titanium-salicide (self-aligned silicide) process with different postmetallization anneals on the performance of very thin gate oxide MOSFETs are discussed. Compared to the conventional polycrystalline-silicon (poly-Si) gate process, a titanium-salicide process without enough annealing in hydrogen-containing ambients degrades MOSFET characteristics. However, after hydrogen anneal (but not a nitrogen anneal), the electrical characteristics of the salicided MOSFETs become comparable to those of poly-Si gate MOSFETs. The device degradation has been correlated with interface-state generation through an interface-state density study.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

IIIB-5 Fabrication of thin gate Oxide MOSFET's using low-temperature plasma-enhanced chemical-vapor-deposited SiO2

IIIB-5 Fabrication of thin gate Oxide MOSFET's using low-temperature plasma-enhanced chemical-vapor-deposited SiO₂

Experimental determination of finite inversion layer thickness in thin gate oxide MOSFETS

The influence of finite inversion layer thickness on the channel current in ultra thin gate oxide MOSFETs is investigated. The dependences of the channel current on gate bias, temperature, surface doping concentration and substrate bias indicate that the carrier transport is well characterized by introducing an effective oxide thickness which is an actual oxide thickness plus an average thickness of charge distribution in inversion layer. It is also confirmed that the mobility is independent of the gate oxide thickness in the range from 360 to 31 Å

Experimental determination of finite inversion layer thickness in thin gate oxide MOSFETS

Experimental determination of finite inversion layer thickness in thin gate oxide MOSFETS

Inversion-layer capacitance and mobility of very thin gate-Oxide MOSFET's

Inversion-layer capacitance has been experimentally characterized and identified to be the main cause of the second-order thickness-dependence of MOSFET characteristics. Field-dependent channel mobilities of both electrons and holes were independent of gate-oxide thicknesses from 50 to 450 Å, e.g., there is no evidence of the alleged mobility degradation in very thin gate-oxide MOSFET's. Subthreshold slope, insignificantly affected by the inversion-layer capacitance, follows the simple theory down to ∼ 35 Å of oxide thickness. The empirical equations for inversion-layer Capacitance and mobilities versus electric field are proposed.

Fixed charge density and inversion layer mobility of thin gate oxides

Thin gate-oxide MOSFET's with different oxide thickness (100-400 Å) are fabricated. Improved measurement techniques are utilized and carefully controlled experiments are planned to minimize the usual errors encountered in thin-oxide measurements. It is found that the fixed charge density increases and inversion layer mobility decreases as the oxide thickness is reduced for the as-grown samples, whereas no similar dependence is observed for the samples with oxides etched down to the same thickness. The mobility degradation for the thin as-grown samples can be explained by the effects of coulomb and surface roughness scattering.