Abstract

Low frequency, 1/ f, noise of the drain current, I D, fluctuations was measured on a series of Si MOSFETs with the gate oxide thickness, t ox, varied from 25 to 40 Å by steps of 5 Å. The salient point of this work is a demonstration that, at sufficiently low I D intensities, a mean low noise level in the MOSFETs is reduced as the gate oxide becomes thinner. This is explained assuming that the noise originates from the electron capture/release on Si/SiO 2 interface/border traps. The flat band voltage fluctuations, observable as noise, are linked then to the oxide charge fluctuations by a factor, that is inversely proportional to the gate capacitance, C ox, and thus proportional to t ox. At higher I D, the results are more complicated, as the access resistance noise is also involved. We provide an interpretation of the ensemble of the data and show that the noise analysis can furnish quantitative estimates of several device characteristics. Device degradation and its consequences for the low frequency noise at higher current levels are also discussed.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.