Thermo-compression Bonding Process Research Articles

Thermo-compression Bonding Assembly Technology

With the slowing of Moore’s law heterogeneous integration and assembly became important drivers of the performance of semiconductor packaging. This “More than Moore” approach enables higher functional density and higher bandwidth packages. At the same time, heterogeneous integration drives an aggressive interconnect pitch roadmap, pushing the limits of Advanced Packaging technologies. Flip chip with mass reflow has been the main assembly technology for fine pitch interconnect. However, the need for even finer pitch and higher packaging density was not compatible with the limitations imposed by the mass reflow process, therefore requiring new interconnect technologies. Local reflow flip chip via thermocompression bonding (TCB) overcomes limitations due to CTE-mismatch and warpage. Meanwhile, TCB based on solder micro-bumps became a well-established and cost effective fine-pitch interconnect process and Cu to Cu Hybrid Bonding is emerging as a technology for the future. Normal TCB typically requires the application of flux and post-bond flux cleaning as any flux residue can result in post mold package reliability issues, even for ‘no-clean’ flux materials. Post-bond flux cleaning, however, becomes more and more difficult for increasing die size and with bump pitch and stand-off height shrinking even further. K&S has developed and demonstrated a flux-less TCB process for large and high-density interconnect die that utilizes in-situ Formic Acid (FA) vapor application for copper and solder oxide reduction. This process eliminates the need for flux and, therefore, there is no need for the tedious and time-consuming cleaning of the post bond flux residue. The FA process delivers nearly the same productivity as a conventional flux based TCB process. The FA delivery system can be integrated on our high-accuracy C2S and C2W TCB tools, leveraging the existing HVM TCB infrastructure and extending its application space from ~35µm towards ultra-fine pitch applications around 10µm. Hybrid bonding created a lot of attention over the last years as this bump-less technology allows for long-term pitch scalability, possibly even down to 1µm. Hybrid bonding, however, requires a more complex process flow which relies on pristine die and target wafer surfaces as well as front-end level cleanliness conditions. Accordingly, the advantages and cost of Flux-less TCB as compared to Hybrid bonding should be explored in more detail. TCB can be viewed as an extension of flip chip. Using the existing assembly and metrology infrastructure as well as the existing die and substrate design layouts will be attractive to subcons. As a result, the overall cost and time to market should be much lower. An activity-based cost model has been developed along with SavanSys comparing flux-less TCB and Hybrid bonding. We present results on the process cost as well as the overall package cost as a function of die size and yield. In summary, flux-less thermo-compression bonding should be considered for ultra-fine pitch applications. We have demonstrated pitch capability below 30µm and believe that a pitch of 10µm may be possible. Other applications that formic acid vapor TCB enables are large module bonding (50 X 50 mm, 70 X 70 mm) and Cu to Cu interconnects.

In Situ Measurement Method for Temperature Profile Optimization During Thermocompression Bonding Process

Thermocompression bonding (TCB) is an important process in electronic packaging and is widely seen as a promising technology for miniaturized electronic devices. However, this process usually yields a lower throughput compared to more conventional mass-reflow processes, mainly because the thermal distribution uniformity across the bonding plane, as required for reliable joints, is achieved with longer bonding dwell times. Higher throughputs could be achieved by reducing the dwell time and increasing the heating rates, but this comes at the cost of higher temperature variations between the center and edges of the bonded component, leading to defects such as nonwet or bridged. Reliable temperature distribution measurements are thus needed to eliminate these joint defects. We present a novel method of temperature measurements to quantify the thermal limits of the TCB process. A microfabricated sensor with high temporal and spatial resolution was designed and fabricated for in situ temperature profile measurements up to 250 °C. This work aims to evaluate the influence of different heating rates on the temperature distribution across the chip surface, as well as on the resulting bonding quality. The bonding quality was assessed by the evaluation of bonding pull strength and interfacial defect characterization. The results demonstrate that slow heating rates (50 °C/s) lead to bridge defects and high heating rates (>80 °C/s) induce nonwetting defects in the solder joints. The solder joint defects can be related to the temperature uniformity measurements performed with the RTD sensor, thus providing a mean to more efficiently optimize the TCB heating rate in industrial processes.

Comprehensive comparative analysis of microstructure of Sn–Ag–Cu (SAC) solder joints by traditional reflow and thermo-compression bonding (TCB) processes

Thermo-compression bonding (TCB) process has been considered an emerging alternative to the conventional reflow process because of its significantly fast bonding time due to rapid ramping and its ability to fabricate ultra-fine pitch 3D stacked interconnections to achieve package miniaturization, as is necessary in high bandwidth memory (HBM) modules. Since the TCB-process bonded joints are usually followed by additional solder reflow processes for bonding of other components, no attention has been solely dedicated to the reliability of TCB-only bonded joints. In addition, there has not been any fundamental and comparative studies between the conventional reflow bonding and the TCB process. A recent study showed that the TCB joints could be vulnerable to thermal cycling and electro-migration (EM), and therefore risk exhibiting early failures. A significant difference in bonding processes between the two processes may affect solder grain and crystallographic characteristics, thus affecting the reliability performance. Here, we show that the Cu6Sn5 intermetallic compound (IMC) morphology at Sn–Ag–Cu (SAC-305) solder joint interfaces and the β-Sn crystallographic orientation of the solder joint could explain for the premature EM failure in TCB-utilized solder joints. The effect of the IMC layer of TCB-processed solder joints on the diffusion of Cu and Ni atoms at the solder/bond pad interfaces is presented. Furthermore, the thermomigration (TM) caused by Joule heating for TCB-utilized solder joints is discussed. Lastly, statistical studies using electron backscatter diffraction (EBSD) results reveal the higher lattice coherency of β-Sn crystallographic texture for TCB-processed solder joints.

Comprehensive Comparative Analysis of Microstructure of Sn-Ag-Cu (SAC) Solder Joints by Traditional Reflow and Thermo-Compression Bonding (TCB) Processes

Thermal-compression bonding (TCB) process has been considered to successfully fabricate the 3D stacked interconnection with ultra-fine pitch I/O bumped thin flip-chip and achieve package miniaturization, such as high bandwidth memory (HBM) modules that exceed capabilities of traditional thermal reflow process. Until now, a conventional reflow process has been the de facto solder interconnection method in microelectronic packaging. The alternative, TCB process has not been employed commonly for solder interconnection method as TCB-bonded solder joints have yet failed to prove their reliabil-ity such as upon thermal cycling and electro-migration (EM). A significant difference in solder reflow (i.e. melting and solidi-fication) technique may affect solder grain and crystallographic characteristics, thus affecting the reliability performance of 3D package modules. In addition, there has not been any fundamental and comparative study between the conventional reflow bonding and TCB processes. Also, the degradation mechanism of TCB-processed flip-chip packages upon EM failure has not been clearly defined. Here we show that the Cu6Sn5 intermetallic compound (IMC) morphology at Sn-Ag-Cu (96.5 wt./3.0 wt./0.5 wt.% SAC-305) solder joint interfaces and the texture of β-Sn crystallographic orientation of SAC-305 solder joint upon TCB-utilized flip-chip fabrication drives premature EM failure. We found that the lack of the IMC layer of TCB-processed solder joints facilitates the diffusion of Cu and Ni atoms at the solder-Cu bond pad interfaces, and furthermore the thermomigration (TM) caused by Joule heating at the TCB interface could provide synergistic impact on the EM. In ad-dition, through statistical studies using EBSD results, higher lattice coherency of β-Sn crystallographic texture was observed for TCB-processed solder joint that adds to a much faster diffusion of Cu and Ni atoms during the EM test, which is respon-sible for leaving defects both within the solder and at the interfaces of the joint. Our results demonstrate an insightful deriv-ing force of EM from the solder joint the microstructure and the crystal orientation that allows for juxtaposition of two most widely used bonding technologies, reflow bonding and TCB.

Fine Cone-shaped Bumps for Three-dimensional LSI Package—An Optimization of Thermocompression Bonding Process

Fine Cone-shaped Bumps for Three-dimensional LSI Package—An Optimization of Thermocompression Bonding Process

Polymer and Bump Planarization for Fine Pitch Micro-Bump Stacking

Advanced packaging, including fan-outs, 2.5D and 3D integration is gaining more interests as alternative driving force for performance improvement instead of scaling. A key element for the advanced packaging is interconnection technology between different chips. Flip chip micro-bumping enables electrical connection of different chips with shorter length than that of wire bonding. Although it is promising method for advanced packaging, there are several challenges need to be tackled to obtain robustness stacking below 10 μm pitch. For instance, the mechanical stability of micro-bumps become low due to the shape of the bumps. The bump height uniformity also becomes an issue when the pitches shrunk. In addition, the thermo-compression bonding (TCB) alignment and stacking will require incredibly high accuracy tool. In order to overcome these issues, alternative concept of flip chip bumping structures, which is embedded bump was introduced [1]. In this embedded bump concept, neither top nor bottom surfaces have topography, which improves the mechanical stability. In addition, it can be feasible in high-accuracy TCB process. One of the challenge for this concept is to planarize Sn bumps and polymer. The well-known method for material planarization in CMOS technology is chemical mechanical polishing (CMP). However, optimization of polishing on soft adhesive polymer and metal Sn bump requires comprehensive CMP development. On the other hand, pure machining process such as flat milling has wider range of process window. Therefore, we are investigating to apply a single diamond flat milling process, so called surface planer, for this embedded bump concept. The surface planer process is able to mechanically remove polymer top surface and bumps by a diamond bit. In the presentation, we will report characterization results of surface planer process for embedded bump concept. In addition, the stacking performance on 10 μm pitch bumps are shown. The middle images in the figure show that the planarized adhesive polymer and 10 μm pitch bump (top: schematic image, bottom: actual cross-sectional FIB image). The step height between bump and polymer is about 200 nm. By the planarization process, 10 μm pitch of Sn bumps can be connected by thermal compression bonding with minimum misalignment. By this feasibility study of polymer/bump planarization process, compatibility and challenges of embedded bump concept were laid out. [1] Jaber derakhshandeh et al,” 3D Stacking Using Bump-Less Process for Sub 10um Pitch Interconnects” ECTC2016 Figure 1

Monitoring of thermo-mechanical stress via CMOS sensor array: Effects of warpage and tilt in flip chip thermo-compression bonding

Flip chip thermo-compression bonding (TCB) involves the use of heat and pressure to simultaneously form interconnections for microelectronic packaging. In-situ measurements of thermo-mechanical stresses that arise during this bonding process could provide unique insight to help better understand the TCB process. A 4mm×3mm×500μm complementary metal-oxide-semiconductor (CMOS) sensor chip with an 8×8 array of Au-bumped sensor pads was developed for this purpose. It was designed to record XYZ force and temperature signals from bump locations, during a simulated flip chip process similar to TCB.In-situ measurements during simulated TCB events proved useful for tilt detection, thermal gradient characterization, and thermal expansion measurements. Further interpretation of the signals proved tilt and other thermo-mechanical effects were induced by thermal expansion mismatches. The most thermo-mechanically stressful stage of bonding was found to occur during thermal transients, specifically during bond head ramping. Further analysis concluded the actual time necessary to heat the bumps was less than 0.5s. Finally, the lateral thermal gradient across the sensor chip was calculated to be smallest in the central bump locations, and largest in the bump array corners due to warpage, tilt, and heat sink effects of the digital logic region.

Numerical Analysis of Warpage Induced by Thermo-Compression Bonding Process of Cu Pillar Bump Flip Chip Package

Numerical Analysis of Warpage Induced by Thermo-Compression Bonding Process of Cu Pillar Bump Flip Chip Package

Packaging and Assembly Challenges for 2.5D/3D Devices

The continuous development of 2.5D/3D packaging and stack assembly technologies has enabled different ways of producing advanced packages for the said devices. Advancement in D2D, D2W and W2W bonding have allowed these devices to be a step closer to being fully manufactured in volume. Thermo-compression bonding (TCB) process in combination with a pre-applied underfill material (WLUF/NUF) have been developed and investigated for assembling 2.5D and 3D devices with fine pitch (10μm - 40 μm) μbumps. This assembly step though developed, is not without challenges. There is a need to select the right underfill material based on its mechanical and chemical properties which could contribute to issues such as die warping, voiding and non-wetting of μbumps. These materials should also be able to withstand several thermal steps within the entire stack assembly process and is able to pass reliability testing. During the TCB process, bonding forces have a profound impact on the joint formation behavior on the μbumps. A low bonding force could produce a joint formation with a lot of underfill filler entrapment and an incomplete reaction of the solder. A higher bonding force leads to more solder squeezing-out, leaving a thin and completely reacted intermetallic compound (IMC) layer in the joints. The D2D, D2W and W2W assembled chips can then be packaged into a standard flip chip component using laminate BGA substrates. But even with this volume manufacturing process, the introduction of 2.5D/3D stack devices brings another set of challenges to an existing assembly infrastructure. Challenges such as the handling of the stacked devices, the CTE mismatches of an entirely new set of materials and the constant scaling in FC bump (Cu Pillar or C4) pitches in an existing infrastructure remain. The limitations of organic BGA packages in terms of CTE mismatches and costs gave rise to Fan-out Wafer Level Packages (FOWLP) or a technique also known as wafer reconstruction. However, there are certain tradeoffs particularly in the molding process step of fully D2W stacked or reconstructed 300 mm wafers. Molding such a large area of stacked chips with very narrow gaps of around 50μm to 300μm is a major challenge especially in trying to maintain the flatness of the wafer for succeeding wafer level processing steps. The large warpage of over molded (D2W or reconstructed) wafers is due to the coefficient of thermal expansion (CTE) mismatch between silicon and the reconstruction material. Therefore careful selection of materials and design of reconstructed structures is needed. Other techniques to keep the D2W or reconstructed assemblies are being developed and evaluated. Also by selecting an FOWLP or reconstructed wafer type of package, the integration of temporary bonding materials (TBMs) in TCB and wafer molding becomes a challenge. In order to produce the reconstructed wafer or the thinned D2W assembly, thermal and mechanical stability is required for such a material. In summary, the combination of advance stacking techniques and materials within certain 2.5D/3D integration flows could produce a low-cost and reliable 3D package. But these combinations will pose a number of challenges that needs to be addressed. This paper will discuss the different integration flows, stacking and packaging assembly techniques (and their challenges) that could make volume manufacturing possible for 2.5D/3D devices in the future.

Stress Analysis and Design Optimization for Low-<inline-formula> <tex-math notation="LaTeX">$k$ </tex-math></inline-formula> Chip With Cu Pillar Interconnection

Cu pillar technology can cater for high I/O, fine pitch, and miniaturization requirements compared with wire bonding and conventional solder flip-chip technologies. However, chip-package interaction of Cu pillar and low-k chip is a critical challenge during assembly process due to stiffer Cu pillar structure compared with conventional solder bump. Thermo-compression bonding (TCB) process was adopted and used for fine pitch Cu pillar assembly on Cu/low-k chip to reduce the package warpage and low-k stress. In this paper, a novel TCB process modeling methodology using a 2-D axisymmetric finite-element model with global-local technique was demonstrated by considering step-by-step process conditions. The TCB modeling method was validated by the experimental data. The simulation results show that TCB process results in much lower package warpage and low-k stress compared with conventional reflow (RF) process. Based on the proposed TCB modeling method, the comprehensive parametric studies were conducted to optimize TCB process and Cu pillar design for package reliability improvement, including bonding process conditions, Cu pillar structure design, package geometry, and packaging material selection. RF process-induced package warpage and low-k stress were also simulated for comparison. The final package and assembly solution was successfully achieved based on the suggestions and recommendations provided by the simulation results.

Effect of Surface Contamination on Solid-State Bondability of Sn-Ag-Cu Bumps in Ambient Air

Two solid-state bonding methods, thermocompression bonding (TCB) and surface activated bonding (SAB), were used for studying the effect of surface contamination on the bonding of Sn-Ag-Cu bumps in ambient air. The surface contamination was analyzed by X-ray photoelectron spectroscopy. Correlated to the surface contamination, the influence of Ar-plasma pretreatment time as well as the air exposure time on the shear strength was investigated in SAB process. The bonding of Sn-Ag-Cu bumps was achieved at 25–200C benefiting from dispersing the surface contamination. With an Ar-plasma activation process prior to the assembly under a low-vacuum background, the carbon contaminants on the bump surfaces in SAB process was removed, and the required bonding pressure or temperature to achieve a high shear strength and bond yield is lower than that in TCB process. [doi:10.2320/matertrans.MF200804]

Physical and Fuzzy Logic Modeling of a Flip-Chip Thermocompression Bonding Process

Flip-Chip connections using gold-to-gold, gold-to-aluminum, or gold-to-solder bondings or contacts enhanced by epoxy are low-cost alternatives to soldering. To assist their technology advancements, we have developed yield models for a representative assembly process with flip-chip, thermocompression bondings. Based on bonding mechanics, a physical yield model has been developed to characterize the process. Then, a fuzzy logic model has been established to improve the modeling’s accuracy by including experimental data. The physical yield model can predict the assembly yield as a function of forces and planarities of the end effector, bump height variations, bump geometries, mechanical properties corresponding to different materials and temperatures, and distribution patterns of bumps. Consistent with our experimental experience, the calculated force level for a high-yield process was around 3000 gmf for a 30-gold-bump chip with a bump diameter of 60 μm and a height of 50 μm. The fuzzy logic model can be trained and adjusted by the results of physical models and experiments. It correlates very well to the nonlinear relationships between the yield and the assembly parameters, and has a self-learning capability to update itself with new data. Such capabilities have been demonstrated by studying the bonding on a substrate with or without a compliant layer.