Digital Circuit Technology Research Articles

An Investigation of the Operating Principles and Power Consumption of Digital-Based Analog Amplifiers

Digital-based differential amplifiers (DDA) are particularly suitable to low voltage digital integrated circuit technologies. This paper presents an exhaustive analysis of digital-based analog amplifiers to take advantage of today’s high-performance digital technologies, and of computer aided design (CAD), which is commonly employed to design integrated circuits. The operating principle and the main mathematical relations of digital-based differential amplifiers are discussed along with an exhaustive explanation of its operating regions and of the corresponding power consumption. These aspects, which are not discussed in the literature, are very important for the circuit designers. Finally, a detailed description of the design procedure of the UMC 180nm standard CMOS technology is provided.

Current Status and Issues of Superconductor Peripheral Circuits for Quantum Computers

Superconductor devices are promising for building large-scale quantum computing systems. This article reports the current status and issues of the superconductor classical (digital and mixed-signal) circuit technology for quantum computing applications. The single-flux-quantum-based circuits provide advanced signal processing featuring several gigahertz clock frequencies, high sensitivity, and ultra-low power operation at a millikelvin-level temperature and are helpful for control and readout of quantum bits. The superconductor cryogenic peripheral circuits are expected to be a key to breakthrough in system scalability.

Manifestation of the channeling effect when manufacturing JFET transistors

TThe proposed work covers the tasks of such areas as reducing input currents and bias voltage of integrated operational amplifiers (ICs OA) manufactured according to BiFET technology, the prospect of using JFET transistors in digital circuit technology, Si CMOS technology at 22 nm node and beyond, manufacturing bipolar transistors on ultra-thin layers of the active base and emitter, increasing resistance of ICs to external influences. The main method of experimental investigation of channeling is the construction of impurity distribution profiles using SIMS. In this work to study the channeling effect of boron and phosphorus in silicon was chosen the method for constructing the response surface of the saturation current of JFET for a silicon wafer. The choice of method was based on the high sensitivity of the cut-off voltage and saturation current of the JFET transistor to the channel thickness and impurity concentration in it, the relative simplicity of performance and practical benefits in improving BiFET technology.

QGDR: A Via-Minimization-Oriented Routing Tool for Large-Scale Superconductive Single-Flux-Quantum Circuits

Single-flux-quantum (SFQ) circuit technologies are promising digital circuit technologies with high-speed and extremely low-power characteristics. However, heavy wire routing tasks are finished either by considerable human effort or by commercial routing tools with few physical considerations for the SFQ circuits. In this paper, we present an integrated global and detailed router for the SFQ circuits, qGDR, which aims at reducing the impedance mismatch during signal transfer by minimizing the total number of used vias. The global router allocates routing resources while minimizing the via usage by a dynamic layer assignment algorithm. The detailed router follows the global routing results to complete the routing task by resorting to a maze routing algorithm. Following the MIT-LL SFQ5ee process technology, qGDR can use only two routing layers to route an 8-bit integer divider with more than 40 000 Josephson junctions in less than one hour.

Computationally inexpensive enhanced growing neural gas algorithm for real-time adaptive neural spike clustering

Objective. Real-time closed-loop neural feedback control requires the analysis of action potential traces within several milliseconds after they have been recorded from the brain. The current generation of spike clustering algorithms were mostly designed for off-line use and also require a significant amount of computational resources. A new spike clustering algorithm, termed ‘enhanced growing neural gas (EGNG)’, was therefore developed that is computationally lightweight and memory conserving. The EGNG algorithm can adapt to changes of the electrophysiological recording environment and can classify both pre-recorded and streaming action potentials. Approach. The algorithm only uses a small number of EGNG nodes and edges to learn the neural spike distributions which eliminates the need of retaining the neural data in the system memory to conserve computational resources. Most of the computations revolve around calculating Euclidian distances, which is computationally inexpensive and can be implemented in parallel using digital circuit technology. Main results. EGNG was evaluated off-line using both synthetic and pre-recorded neural spikes. Streaming synthetic neural spikes were also used to evaluate the ability of EGNG to classify action potentials in real-time. The algorithm was also implemented in hardware with a Field Programming Gate Array (FPGA) chip, and the worst-case clustering latency was 3.10 µs, allowing a minimum of 322 580 neural spikes to be clustered per second. Significance. The EGNG algorithm provides a viable solution to classification of neural spikes in real-time and can be implemented with limited computational resources as a front-end spike clustering unit for future tethered-free and miniaturized closed-loop neural feedback systems.

A Digital-Based Ultra-Low-Voltage Pseudo-Differential CMOS Schmitt Trigger

A digital-based Pseudo-differential Schmitt trigger is proposed in this paper which is suitable for ultra-low voltages and pure digital integrated circuit technologies. The proposed Schmitt trigger is implemented according to the design procedure of an analog Schmitt trigger and only using digital CMOS inverters. It is composed of a differential comparator consisting of two CMOS inverters and a cross-coupled inverter pair positive feedback which has simultaneously two outputs of noninverting and inverting. The proposed circuit is the only digital Schmitt trigger which operates in differential mode and its hysteresis center can be changed by the input voltage. Implementing the circuit in digital-based allows the proposed Schmitt trigger to operate in 0.4[Formula: see text]V ultra-low-voltage. Principle operation of the proposed circuit is discussed theoretically and using formulas and its performance is verified by simulation in TSMC 0.18[Formula: see text][Formula: see text]m CMOS process. The proposed circuit occupies only [Formula: see text][Formula: see text][Formula: see text]m2 chip area due to the very low number of transistors. The hysteresis width of the proposed Schmitt trigger is 205[Formula: see text]mV and consumes only 6.64[Formula: see text]nW power.

Ultrahigh-speed Optical Communications Technology Combining Digital Signal Processing and Circuit Technology

Ultrahigh-speed Optical Communications Technology Combining Digital Signal Processing and Circuit Technology

The ROVER Fluxgate Magnetometer

Martian magnetic field measurement is one of the focuses of international Mars exploration mission. China's first Mars magnetic measurement mission would carry magnetometers on the rover and the orbiter to achieve joint observation of the surface magnetic field and the spatial magnetic field. Dual tri-axial fluxgate magnetometer would be carried on the rover,which adopts Helmholtz compensation coil probe technology and all digital closed-loop feedback circuit technology to realize high precision same-point measurement of space magnetic field. Reliability, safety and space environment adaptability of the instrument are well considered in the design. According to ground calibration, the range of the ROVER fluxgate magnetometer is ±65 000 nT,the noise level is 0.01 nT/√Hz,and the resolution achieves 0.01 nT.

Digital Circuit Learning System Based on Unity3D

As a new technology, virtual reality technology development has been the concern of researchers in different fields, and its application in the field of teaching has been the focus of people. On one hand, the virtual reality technology itself has unique charm and feature, which has attracted a large number of experts and scholars to explore its application in education. On the other hand, the teaching of compulsory courses in universities is faced with the shortage of teaching resources and the low enthusiasm of students. Especially in the experiment teaching process, circuit experiment plays an important role in understanding the theoretical knowledge, at the same time, let the student to independently explore unrestrictedly by time and resources as well as the important direction of future development. From this perspective, this article summarizes the development of virtual reality technology at home and abroad in today’s teaching system, with the help of unity3D and rhino, the simple teaching system is achieved. I take “Digital Circuit Technology” as the main body, and the whole design is also based on it. Through the simulation of the virtual classroom, virtual experiment box, typical chip and other structures, the learning system makes students to choose the experimental time and place freely. At the same time, students can strengthen the ability of innovation and logical thinking, start a vivid, strong interactive, efficient teaching mode. In unity3D, I achieved many interactive functions such as interface jump, output control with the development language C#.

Software Engineering Implementation Experience of Precision Navigating System

The precision navigating system is widely used in the weapon system. With the development of the digital circuit technology,the software becomes the core of navigating system,all of the function are accomplished by embedded software.There is a high requirement for software quality、security、stability and reliability.In order to increase the success rate for software development and improve the quality of software,this paper summarizes the creative measures of software engineering implementation from software system design、software management、communication mechanism、development process and reliability design in navigating system research process.The effectiveness of the measures is verified by research achievements.

Extension of Planar Bulk n-Channel MOSFET Scaling With Oxygen Insertion Technology

An experimental and simulation study of short-channel planar bulk nMOSFET performance enhancement achieved with oxygen insertion technology is presented. The benefits of this technology for low-power digital logic circuits make it a promising evolutionary approach to extend bulk MOSFET scaling.

A Digital-Based Analog Differential Circuit

A novel, digital-in-concept approach in the design of analog differential circuits, suitable to very low voltage, aggressively scaled, pure digital integrated circuit technologies, is explored in this paper. A differential stage based on the proposed technique is presented and its operation as a voltage comparator and as an operational amplifier in negative feedback configurations is discussed and demonstrated on the basis of theory and simulations. The practical feasibility of the proposed approach is finally verified by experiments carried out on a proof-of-concept prototype.

Semiconductor technologies for higher frequencies

An overview of the semiconductor active devices available for 100-GHz and 100-Gb/s applications is given, based on semiconductor properties and device requirements. The most widespread technologies are then described, and then the status of competing technologies is given in two different areas: frequency dividers, which illustrate the suitability of a technology for high-speed digital circuits, and oscillators, which illustrate their behavior in analog circuits applications. The aim of this presentation was to illustrate the variety and potential impact of these evolving technologies with consistently increasing frequency performance. While the improvement of device performance relied for a long time only on the reduction of dimensions permitted by progress in lithography, heterostructures and strain engineering are now powerful means by which to enhance performance, in both speed and power, to a level that opens a door to the 100-GHz and 100-Gb/s application arena.

Optimised asynchronous timing for superconductive digital circuits

Rapid Single Flux Quantum (RSFQ) logic is a digital circuit technology that in recent years has presented itself as an alternative to semiconductors in the application of ultra high speed, very low power applications. The optimal timing of digital circuits operating at hundreds of Gigahertz is still a complex problem for both RSFQ and semiconductor technologies. The fact that most RSFQ gates require a clock signal to function makes this even more complex. Various RSFQ liming schemes have been adapted from semiconductor design methodologies, and some have been designed specifically for RSFQ. Currently, synchronous clocking schemes outperform other schemes, but with the scale of RSFQ circuits ever increasing, the proper use of timing schemes are becoming more crucial. This paper describes a new asynchronous self-timing scheme where the details of clock distribution and clocking are built into the logic gates. Tests were done on the newly developed asynchronous logic-gales and a asynchronous full adder was implemented and tested.

Home-built magnetic resonance imaging system (0.3 T) with a complete digital spectrometer

A home-built magnetic resonance imaging (MRI) system with a complete digital spectrometer has been designed for investigation of plants and animals. With the application of the latest digital integrated circuit technology, the digital spectrometer is greatly simplified without the loss of flexibility and performance. A powerful pulse sequence compiler with a graphical editor can allow the user to edit the pulse sequence more easily and more conveniently than ever before. Moreover, a permanent magnet capable of producing a 180 mm diam spherical homogeneous region is employed in our MRI system to ensure a comparatively large image size. Compared with previous work, our MRI system has the features of flexibility, relatively large imaging size, and low cost. Experimental results obtained with the proposed system are presented in this article.

Robust technique for on-chip DC current measurements

A robust and highly scalable technique for measuring DC currents is described. The circuit consists largely of digital electronics except for a comparator and a passive RC filter. This simple structure is able to force a voltage at a circuit node while measuring the current that flows into it. The technique has been successfully demonstrated using a prototype constructed using a 0.35mm CMOS chip. The demand for highly integrated mixed-signal ICs has increased rapidly in recent years. This is mostly driven by the communications industry. However, as the level of integration increases, more and more analogue components are becoming buried deep inside the digital circuitry without external I/O access. Consequently, initial device character- isation and production testing of these components has become more challenging. An area of IC testing that is being affected by this high level of integration are the DC parametric tests. These tests are conducted to characterise a wide variety of mixed-signal circuits such as analogue-to-digital converters (ADCs), PLLs and bias networks. Also, these tests are needed in digital test applications such as pad current leakage and IDDQ tests. One type of DC parametric tests that is of focus involves forcing a voltage at a circuit node while measuring the current that flows into it. The traditional method for on- chip current measurements is by using a transimpedance amplifier (1, 2), an integrating network (3, 4) or a shunt resistance (5). However, all of these circuits involve the use of elaborate ADCs with trimmed components, which makes them more expensive and relatively nonscalable for on-chip implementation. This paper presents a novel technique for force-voltage current measurements. It makes use of simple ADCs and programmable voltage references (DACs) to capture the DC transfer characteristic of an internal load at different current levels. Once known, the transfer characteristic of the internal load can be used indirectly to determine the value of an unknown current level connected to the test circuit. The proposed method requires mostly digital logic with the exception of a comparator and several passive RC components. As a result, the circuit architecture will be able to take advantage of the down-scaling of digital integrated circuit technology and not be affected by the reduction in power supply voltages. Also, the system is programmable,

Agent-based project scheduling: computational study of large problems

We present in this paper the results of a computational study for project scheduling based on new ideas for project representation taken from digital circuit technology (Knotts et al. , 1998a) and a solution approach based on the artificial intelligence notion of agent technology. We experimented with projects with up to 10 000 stochastic duration activities which can be executed in a number of modes requiring renewable, nonrenewable, and periodically renewable resources. This study is about agent implementation in a project scheduling domain. It compares agent types and priority rules with respect to their impact on project schedule duration and computational performance. This work demonstrates: (i) that artificial intelligence concepts of agent technology can be successfully implemented for project scheduling; and (ii) in conducting project scheduling studies we can experiment successfully with large project networks. Both points made in this research are new.

GaN HFET digital circuit technology for harsh environments

The first demonstration of GaN digital circuits is reported. First‐generation GaN digital technology has already shown high yields for circuits of considerable complexity. Specifically, a 31-stage ring oscillator was implemented using 217 transistors. Properties of the AlGaN/GaN material system that enable outstanding power handling capabilities of GaN heterojunction field effect transistors (HFETs), i.e. large bandgap, high breakdown field and high saturation velocity, also make it attractive for digital applications in harsh environments. Because of these unique material characteristics GaN digital control circuits have the potential to operate in high radiation environments, at elevated temperature, and directly from high voltage rails. Successful operation of GaN 31-stage ring oscillators at the highest base-plate temperature attainable by test setup of 265°C, indicates these circuits can operate at significantly higher temperatures.

Analysis of open CNC architecture for machine tools

The evolution of digital circuit technology, leadind to higher speeds and more reliability allowed the development of machine controllers adapted to new production systems (e.g., Flexible Manufacturing Systems - FMS). Most of the controllers are developed in agreement with the CNC technology of the correspondent machine tool manufacturer. Any alterations or adaptation of their components are not easy to be implemented. The machine designers face up hardware and software restrictions such as lack of interaction among system's elements and impossibility of adding new function. This is due to hardware incompatibility and to software not allowing alterations in the source program. The introduction of open architecture philosophy propitiated the evolution of a new generation of numeric controllers. This brought the conventional CNC technology to the standard IBM - PC microcomputer. As a consequence, the characteristics of the CNC (positioning) and the microcomputer (easy of programming, system configuration, network communication etc) are combined. Some researchers have addressed a flexible structure of software and hardware allowing changes in the hardware basic configuration and all control software levels. In this work, the development of open architecture controllers in the OSACA, OMAC, HOAM-CNC and OSEC architectures is described.

P Channel thin film transistor and complementary metal–oxide–silicon inverter made of microcrystalline silicon directly deposited at 320°C

We report a p channel thin film transistor (TFT) made of directly deposited microcrystalline silicon (μc-Si). The μc-Si channel material is grown by plasma-enhanced chemical vapor deposition (PECVD) using dc excitation of a mixture of SiH 4, SiF 4 and H 2, in a process similar to the deposition of hydrogenated amorphous silicon (a-Si:H). The deposition temperature for the μc-Si is 320°C and the highest post-deposition TFT process temperature is 280°C. By integrating this p TFT on a single μc-Si film with an n channel TFT, we fabricated a complementary metal–oxide–silicon (CMOS) inverter of deposited μc-Si. The p channel μc-Si TFT represents a breakthrough in low-temperature Si TFT technology because p channel TFTs of a-Si:H have not been available to date. The integrated CMOS inverter is the building block of a new digital circuit technology based on directly deposited μc-Si.