Amplifier Technique Research Articles

A $3.6~\mu\text{V}_{\mathrm{rms}}$ Noise, 3 ppm/°C TC Bandgap Reference With Offset/Noise Suppression and Five-Piece Linear Compensation

This paper proposes a low-temperature coefficient (TC), noise, and offset bandgap reference (BGR) for the high precision applications. In order to reduce the offset voltage and noise introduced by the error amplifier, the offset and noise suppression technique is proposed. A five-piece linear compensation has been applied in the BGR to improve the TC performance. Moreover, an adaptive current loop is added to the bandgap reference to enhance the current driving capability. The proposed BGR is implemented in a $0.35~\mu \text{m}$ standard CMOS process occupying an active area of $0.22 \times 0.28$ mm2. The measured results show that the average TC is 3 ppm/°C −45 °C to 125 °C after trimming. The output reference voltage of 2.47 V can achieve $3.6~\mu \text{V}$ (rms) noise from 0.1 to 10 Hz. In the supply voltage range of 2.6 to 5 V, the proposed BGR can deliver $30~\mu \text{A}$ load current and its PSRR is about −83 dB @ 100Hz.

Application of Lock-in Amplifier Technique in AC FSM based on AD630

Field Signature Method (FSM) is one of non-intrusive technique for pipeline internal corrosion monitoring, but the commercial FSM systems nowadays are all using DC input which have many shortcomings. In this paper, AC FSM based on AC input has been developed, DC FSM can be replaced by AC FSM with low-frequency. To extract weak signals, the lock-in amplifier based on AD630 has been designed and manufactured, the functions and designed circuits of each part have been proposed. Experimental results show that, the application of lock-in amplifier technique in AC FSM based on AD630 can measure the weak signal from the noise interference effectively, ensuring the accuracy and security at the same time.

Quadrature demodulation based on lock-in amplifier technique for self-mixing interferometry displacement sensor.

A new self-mixing interferometry quadrature demodulation method based on a lock-in amplifier technique is proposed. Sinusoidal phase modulation of the beam is obtained by an electro-optic modulator (EOM) in the external cavity. Then the real phase of the external target can be calculated by lock-in amplifier analysis method. In this paper, the validity of the proposed method is confirmed by theoretical analysis and means of simulated signals, and then it is demonstrated by several experimental measurements for target harmonic and arbitrary motion. The results show that the proposed method can get a high-precision measurement, even using a diffusive target.

Inverter-Based Subthreshold Amplifier Techniques and Their Application in 0.3-V $\Delta\Sigma$ -Modulators

Subthreshold amplifiers suffer from the limited voltage headroom which leaves little space for conventional analog techniques to enhance performance and efficiency. This paper presents an evolution process of implementing conventional structures with inverters, allowing ultralow-voltage operation with increased flexibility in adopting traditional circuit techniques. Based on the proposed inverter-based elementary structure and CMFB, both the Miller-compensated (MC) operational transconductance amplifier (OTA) and the feedforward-compensated (FFC) OTA achieve significantly improved performance as compared to previous works. The proposed amplifier techniques are verified in $\Delta \Sigma $ modulator (DSM) design, with MC-OTA for a DT-DSM and FFC-OTA for a CT-DSM, both fabricated in a 0.13- $\mu \text{m}$ CMOS. The 0.3-V DT-DSM achieves 74.1-dB SNDR, 83.4-dB SFDR and 20-kHz bandwidth with 79.3- $\mu \text{W}$ power, resulting in a Schreier figure of merit (FoM) of 158 dB. The 0.3-V CT-DSM achieves 68.5-dB SNDR, 82.6-dB SFDR, and 50-kHz bandwidth with 26.3- $\mu \text{W}$ power, leading to a Schreier FoM of 161 dB. Both DSMs exhibit highly competitive performance among sub-0.5-V designs, validating the proposed subthreshold amplifier techniques.

A Watt-Level Quadrature Class-G Switched-Capacitor Power Amplifier With Linearization Techniques

A 30.1-dBm quadrature transmitter is implemented based on Class-G IQ-cell-shared switched-capacitor power amplifier (SCPA) and voltage mismatch compensation techniques for dual-supply voltage in a Class-G SCPA. For the Class-G operation in the IQ-cell-shared quadrature SCPA, a merged cell switching (MCS) technique comprising vector amplitude switching (VAS) and vector phase switching (VPS) is proposed. The VAS boosts system efficiency (SE) by enabling the Class-G operation with multiple supply voltages and the VPS conserves vector information in the merged cells that process the quadrature vectors. The linearization technique for Class-G SCPA minimizes the distortion that arises from the supply-voltage mismatches in a multiple supply-voltage system. Two SCPAs are coupled with a power combining transformer to achieve a watt-level output power. A time-domain interpolation minimizes the spectral image. The prototype SCPA, fabricated in a 65-nm CMOS, achieves peak output power and SE of 30.1 dBm and 37.0%, respectively. It achieves error vector magnitude (EVM) of −40.7 dB (−40.3 dB) and SE of 14.7% (18.3%) at an average output power of 19.5 dBm (22.5 dBm) with 802.11g 64-QAM OFDM signal with 10.6 dB peak-to-average power ratio (PAPR) (20-MHz single-carrier 256-QAM signal with 7.6-dB PAPR).

Gas System for the ATLAS NSW Micromegas Detectors: Design Aspects and Advanced Validation Methods for their QA/QC

In this work we present the design aspects of the Gas Distribution System of NSW Micromegas detectors, simulation results and gas flow / pressure uniformity. We also describe the appropriate gas leak test methods, a conventional and an alternative one, being used in the Quality Assurance and Quality Control of the detectors. For the performance studies we used emulated leak branches based on medical needles. We also describe proposed upgrade stages combining the proposed competitive Flow Rate Loss method with the Lock-in Amplifier technique. Further, we describe the baseline setup for the Gas Tightness Station at BB5/CERN.

Negative lumped element matching technique for performance enhancement of ultra-wideband LNA

The paper aims at designing of two stage cascaded ultra-wideband (UWB) low noise amplifier (LNA) by using negative image amplifier technique. The objective of this article is to show the performance improvement using negative image amplifier technique and realization of negative valued lumped elements into microstrip line geometry. The innovative technique to realize the negative lumped elements are carried out by using Richard's Transformation and transmission line calculation. The AWR microwave office tool is used to obtain characteristics of UWB LNA design with hybrid microwave integrated circuit (HMIC) technology. The 2-stage cascaded LNA design using negative image amplifier technique achieves average gain of 23dB gain and low noise Figure of less than 2dB with return loss less than −8dB for UWB 3–10GHz. The Proper bias circuit is extracted using DC characteristics of transistor at biasing point 2V, 20mA and discussed in detail with LNA layout. The negative image matching technique is applied for both input and output matching network. This work will be useful for all low power UWB wireless receiver applications.

Direct observation of polar nanodomains in the incommensurate phase of (K0.96Rb0.04)2ZnCl4 crystals using piezo force microscopy

Piezo force microscopy has been used to visualize nanoscaled surface charge density waves in a modulated ferroelectric system for the first time. Those structures are found in incommensurate systems close to lock-in transition consisting of an ordered sequence of commensurate nanodomains separated by discommensurations. In ferroelectrics, these domains are antiparallel polarized. As a model system, K2ZnCl4 crystals doped with Rb2ZnCl4 is used where the nanodomain structure can be stabilized at room temperature. Lock-in amplifier techniques allow the mapping of domain morphology and also its coarsening in aged crystals. Our results directly confirm earlier molecular dynamics simulations found in the literature.

Transmission Performance Comparison of 16*100 Gbps Dense Wavelength Division Multiplexed Long Haul Optical Networks at Different Advance Modulation Formats under the Influence of Nonlinear Impairments

Abstract Higher spectral efficiency and data rate per channel are the most cost-effective approaches to meet the exponential demand of data traffic in optical fiber network communication system. In this paper, diverse modulation formats are analyzed for Dense Wavelength Division Multiplexed system at 100 Gbps * 16=1600 Gbps data rates. The performance analysis of proffered system for Non-Return to Zero, Return to Zero, Carrier- Suppressed Return to Zero and Duo binary RZ with duty cycle 0.5 to 0.7 ranges like modulation formats are considered to find optimum modulation format for a 100 Gbps bit rate per channel optical fiber transmission network system. The simulations are analyzed for different values of input power, length of fiber, nonlinear refractive index, nonlinear dispersion and nonlinear effective area for all above mentioned modulation formats with spacing 100 to 250 GHz. to evaluate the effect of modulation format Fiber Bragg Gratting, optical fiber amplifier and Dispersion Compensation Fiber dispersion compensation techniques are enacted on this proposed optical network system.

A Novel Multi-Band Reduced Sampling Rate and I/Q Compensation Technique for RF Power Amplifiers

In this paper, a novel multi-band reduced sampling rate technique is proposed for power amplifier (PA) linearization system. It is used to enhance performance and reduce hardware costs in spectrum aggregation discontinuous broadband systems and compensate in-phase/quadrature (I/Q) imbalance in the multi-band case. During the feedback loop process of sampling rate, a band-limited filter is introduced, and the frequency band extrapolation is carried out so that the spectrum outside the limited band is compensated effectively. Theoretical analysis is performed to compare the proposed method and the conventional methods. To evaluate the performance of the proposed method, a broadband PA is excited by a tri-band signal composed of a 20 MHz long-term evolution (LTE) signal at 1.31 GHz, a 20 MHz 4-carrier wideband code division multiple access (WCDMA) signal at 2.49 GHz, and a 20 MHz 2-carrier WiMAX signal at 2.58 GHz respectively. The experimental results demonstrate that the normalized mean square error (NMSE) can get high accuracy less than −41 dB, with peak-to-average power ratio (PAPR) equaling 9 dB accompanied by a large reduction in sampling rate. Error vector magnitude (EVM) is 1% better than band-limited memory polynomial (MP) model and 2.3% better than conventional MP model.

Bidirectional hybrid OFDM based Wireless-over-fiber transport system using reflective semiconductor amplifier and polarization multiplexing technique

In this paper, a bidirectional hybrid OFDM based Wireless-over-fiber architecture has been investigated and demonstrated to transmit 10 Gbps as well as 6.25 Gbps OFDM data for downlink transmission and 5 Gbps as well as 2.5 Gbps OFDM data for uplink transmission over 50-km single mode fiber (SMF) employing polarization multiplexing technique (POLMUX) at optical line terminal (OLT) and optical network unit (ONU). The POLMUX technique is exercised by polarization beam splitters and polarization beam combiners. Mach-Zehnder modulator and RSOA have been used for modulation at OLT and ONU respectively. Transmission performances are observed by constellation diagrams, EVM and BER values. For 10 Gbps, 6.25 Gbps down-link signal and 5 Gbps, 2.5 Gbps up-link signal the power penalty of 3 dBm, 2.3 dBm and 4 dBm, 3.2 dBm at a BER of 10−9 between back-to-back and over 50-km SMF plus 10-m and 5-m wireless link, are observed respectively. For 32-QAM < 10.5% EVM and for 16-QAM < 13% EVM are recorded. Our architecture is a prominent alternative, not only due to its have potential of both optical and wireless technology but also it is offers a powerful platform to communicate high data rates and support various type of future unforeseen applications and services.

Beam-Oriented Digital Predistortion for 5G Massive MIMO Hybrid Beamforming Transmitters

In this paper, we propose a beam-oriented digital predistortion (BO-DPD) technique for power amplifiers (PAs) in hybrid beamforming massive multiple-input multiple-output (MIMO) transmitters, which can achieve linearization of the transmitted signal in the main beam direction and address the DPD implementation issue in the hybrid beamforming array. In massive MIMO hybrid beamforming transmitters, the conventional DPD to linearize each PA is impractical to implement for that the number of digital chains is less than the number of PAs; however, the BO-DPD can resolve this issue by constructing and linearizing the “virtual” main beam signal rather than single PAs. According to the beamforming weights for array elements, the feedback path combines all PA’s outputs to estimate the main beam signal for DPD processing. In addition, an average estimation method is also presented to broaden the linearized angle range around the main beam direction. A $4 \times 16$ (four subarrays and 16 antennas in each subarray) uniform linear array (ULA) simulation along with a $1 \times 2$ ULA at 2.5 GHz and a $2 \times 2$ ULA at 3.5-GHz experimental tests was performed. The experimental results show that the proposed technique and linearization angle range broadening method achieve up to 15-dB adjacent channel power ratio improvement and 10° linearization angle range in the main beam direction.

A fully integrated 4 × 2 element CMOS RF phased array receiver for 5G

This paper presents a fully integrated phased array receiver containing two four element radio frequency (RF) beamforming receivers supporting two multiple-input multiple-output channels. The receivers are designed and fabricated using 45 nm CMOS SOI technology. A 10 bit IQ vector modulator phase shifter (IQVM) is implemented in RF signal paths to control the phase and amplitude of the received signal before combining. Each IQVM provides 360° phase shift control and 17 dB gain variation. An off-chip, simultaneous high-Q impedance matching and bandpass filtering technique for each low-noise amplifiers is presented using non-uniform transmission line segments. Measured downconversion gain at 100 MHz intermediate frequency and noise figure (NF) of a single path are 23 and 5.4 dB, respectively, giving estimated 3.4 dB NF for a single element when simulated PCB and matching losses are taken into account. 1 dB compression point and Input third-order intercept point (IIP3) are − 37 and − 28 dBm, respectively. Each four-element receiver consumes 486 mW DC power from 1.2 V power supply. Total area of two receivers is 5.69 mm2.

A Power Reconfigurable High-Efficiency &lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$X$ &lt;/tex-math&gt; &lt;/inline-formula&gt;-Band Power Amplifier MMIC Using the Load Modulated Balanced Amplifier Technique

The load modulated balanced amplifier (LMBA) technique uses a control signal, injected at the output coupler, to modulate the impedance of the balanced amplifier transistors. A 14.1-W X-band LMBA is reported, integrating for the first time the balanced, driver, and control signal amplifiers in a single microwave monolithic integrated circuit. Load modulation and bias settings are used to demonstrate that high circuit efficiency can be achieved as the LMBA is adjusted for operation in three RF-power regimes; 1.5, 5.6, and 14.1 W for a constant input power of 22 dBm. Power-added efficiencies above 37% are observed in all power regimes from 8 to 9 GHz under saturated conditions.

Low power radiometric partial discharge sensor using composite transistor-reset integrator

The measurement of partial discharge provides a means of monitoring insulation health in high-voltage equipment. Traditional partial discharge measurements require separate installation for each item of plant to physically connect sensors with specific items. Wireless measurement methods provide an attractive and scalable alternative. Existing wireless monitoring technologies which use time-difference-of-arrival of a partial discharge signal at multiple, spatially separated, sensors place high demands on power consumption and cost due to a requirement for rapid sampling. A recently proposed partial discharge monitoring system using a wireless sensor network and measuring received signal strength only, has potential cost and scalability advantages. An incoherent wireless sensor incorporating a transistor-reset integrator has been developed that reduces the measurement bandwidth of the PD events and alleviates the need for high-speed sampling. It is based on composite amplifier techniques to reduce the power requirements by a factor of approximately four without compromising precision. The accuracy of the proposed sensor is compared to that obtained using a high-speed digital sampling oscilloscope. Received energies were measured over a 10 m distance in 1 m increments and produced an error within 1 dB beyond 4 m and 3.2 dB at shorter distances, resulting in a measurement accuracy within 1 m.

Analysis and Demonstration of an IIP3 Improvement Technique for Low-Power RF Low-Noise Amplifiers

This paper describes a linearization method to enhance the third-order distortion performance of a subthreshold common-source cascode low-noise amplifier (LNA) without extra power consumption by using passive components. An inductor between the gate of the cascode transistor and the power supply in combination with a digitally programmable capacitor between the gate and the drain of the cascode transistor enable to improve the third-order intermodulation intercept point (IIP3) of a subthreshold LNA. The theoretical mechanisms that underlie the linearity improvement are analyzed comprehensively under the consideration of the LNA’s input stage, cascode stage, reverse isolation, and stability. A 1.8-GHz LNA was designed and fabricated using 0.11- $\mu \text{m}$ CMOS technology to prove the concept. Measurement results reveal that the linearized low-power LNA has a 14.8-dB voltage gain, a 3.7-dB noise figure, and a −3.7-dBm IIP3 with a power consumption of 0.336 mW.

An Integrated Linearization Technique for GaAs Bipolar WCDMA Power Amplifier

Here we report a novel linearization and efficiency improvement technique for heterojunction bipolar transistor (HBT)-based Wireless Code Division Multiple Access (WCDMA) power amplifier. A process solution is proposed where a tantalum nitride (TaN) layer is strapped to the HBT base metal layer that resolves the current hogging issue. This is known as the strap ballasting technique. The resistance introduced by TaN improves the linear output power without trading-off its power added efficiency. At supply voltage of 4 V, the strap ballasting methodology improves the adjacent channel leakage ratio by 4.5 dB compared to the conventional base ballasting technique at output power of 28 dBm. The corresponding improvement in power added efficiency is 4%. The maximum output power delivered by power amplifier is 36 dBm. The proposed technique can be employed in the WCDMA power amplifier to minimize the fundamental trade-off issue between linear output power and efficiency.

A Precise Harmonic Control Technique for High Efficiency Concurrent Dual-Band Continuous Class-F Power Amplifier

In this paper, a design approach for a high-efficiency concurrent dual-band power amplifier (PA) with precise harmonic control up to third order is proposed. With the precise harmonic control approach, the high-efficiency performance of the PA can be improved at two arbitrary wide interval frequencies. Based on the inherent impedance matching flexibility of the continuous Class-F (CCF) operating mode, the design spaces of fundamental and harmonic impedances of the PA are largely expanded. The optimal impedances of a CCF PA mode at the internal current-generator (I-gen) plane and package plane are investigated, respectively, and a novel dual-band matching network topology is designed to simultaneously present required load impedances at the fundamental and harmonic impedances of both operation frequencies. First, a harmonic control network is designed to control the harmonic impedances precisely for CCF operation. Then, the fundamental impedances are synthesized using the real frequency technique. To verify the validity of proposed methodology, a dual-band CCF PA operating at 2.6 and 3.5 GHz is designed, fabricated, and measured. The measurement results show that the peak drain efficiency is 76.7% with an output power 42.4 dBm at the lower band and 72.8% with an output power 41.1 dBm at the upper band.

A Temperature Compensation Technique for a Dynamic Amplifier in Pipelined-SAR ADCs

This letter presents a temperature compensation technique for the gain of a dynamic amplifier in a pipelined-successive approximation register analog-to-digital converter. A fully dynamic temperature-dependent common-mode detector is proposed to assist in the compensation process of the dynamic amplifier. A single-stage dynamic amplifier with the proposed temperature compensation technique was designed and fabricated in a 130-nm CMOS process with an active area of 0.0135 mm2. With a 1.2-V power supply, the dynamic amplifier consumes 0.11 mW at 50 MS/s, and the proposed technique reduces the gain variation of the dynamic amplifier from 12.5% to 2.1% across the temperature range of –20 °C to 85 °C.

An Area-Efficient and Tunable Bandwidth- Extension Technique for a Wideband CMOS Amplifier Handling 50+ Gb/s Signaling

This paper reports an area-efficient and tunable bandwidth (BW)-extension technique for a wideband CMOS amplifier to handle very high rate (50+ Gb/s) signaling while keeping a low jitter penalty. We identify its architectural advantages by correlating the performances with the frequency domain (magnitude and group delay (GD) responses) and time domain (impulse and step responses) and comparing them with the existing solutions. Specifically, our technique enables a flexible ac characteristic by introducing a tunable grounded active inductor in the bridged-shunt peaking topology, offering: 1) a high BW enhancement ratio (BWER = $2.65\times$ ); 2) BW-power scalability with small in-band gain variation; and 3) fine tunability of the passband gain without affecting the BW, GD, and power. The experimental prototype is a 65-nm CMOS four-stage differential amplifier occupying just 0.0077 mm2. It delivers a 15-dB gain over a 43-GHz BW with 45-mW power consumption. Small in-band gain variation (0.58 dB) and ripple (1.53 dB) are concurrently achieved with low in-band GD variation (17 to 35.3 ps) and ripple (18.3 ps). The achieved figure of merit of 5.48 [(dc Gain $\times$ BW)/Power] compares favorably with the prior art.