TCAD Sentaurus Simulator Research Articles

2D analytical calculation of the electric field in lightly doped Schottky barrier double-gate MOSFETs and estimation of the tunneling/thermionic current

In this paper we present a new approach to calculate the channel electric field within a Schottky barrier Double-Gate MOSFET (SB-DG-MOSFET) in subthreshold region by solving Poissons equation. The Poisson equation is solved two dimensionally in an analytical closed-form with the conformal mapping technique. A comparison with data simulated by TCAD Sentaurus simulator for channel lengths down to 22 nm was made and shows an accurate agreement. Futhermore, a new way for the estimation of the tunneling current in SB-DG-MOSFET by applying the above 2D solution for the electric field and a 2D solution of the electrostatic potential is presented. Calculating the tunneling current, we use Wentzel–Kramers–Brillouin (WKB) approximation for the estimation of the tunneling probability. For the calculation of the tunneling and thermionic current a comparison with TCAD Sentaurus for channel lengths down to 65 nm was made.

Impact of Strain and Channel Thickness on Performance of Biaxial Strained Silicon MOSFETs

In this paper the impact of strain and channel thickness on the performance of biaxial strained silicon MOSFET with 40 nm channel length has been analyzed by simulation in TCAD Sentaurus Simulator. With the increase in the mole fraction of germanium at the interface of the channel region, the strain in the silicon channel increases and with it the mobility of the carriers increases and thus the drain current increases. The mole fraction in this paper is varied from 0 to 0.3. Other than mobility, the increase in strain also shows improvement in other performance parameters. The impact of variation in channel thickness on the functionality parameters of the MOSFET has also been analyzed. The channel thickness cannot be increased more than the critical thickness and therefore, in this paper the thickness is varied from 2nm to 20 nm. It is observed that beyond 10nm the performance improvement gets saturated and therefore the critical thickness for the channel of this structure is 10nm..