Abstract

In this paper the impact of strain and channel thickness on the performance of biaxial strained silicon MOSFET with 40 nm channel length has been analyzed by simulation in TCAD Sentaurus Simulator. With the increase in the mole fraction of germanium at the interface of the channel region, the strain in the silicon channel increases and with it the mobility of the carriers increases and thus the drain current increases. The mole fraction in this paper is varied from 0 to 0.3. Other than mobility, the increase in strain also shows improvement in other performance parameters. The impact of variation in channel thickness on the functionality parameters of the MOSFET has also been analyzed. The channel thickness cannot be increased more than the critical thickness and therefore, in this paper the thickness is varied from 2nm to 20 nm. It is observed that beyond 10nm the performance improvement gets saturated and therefore the critical thickness for the channel of this structure is 10nm..

Highlights

  • Strain Engineering is the most recent technology adopted to improve the performance of the device significantly

  • Introduction of strain in the channel region improves the drain current, subthreshold swing and DIBL, electron velocity and transconductance of the device overall improving the functionality of the device

  • Though scaling which is the present trend adopted to improve performance results in increase in drain current but the drawback with scaling is that with decrease in device dimensions, threshold voltage decreases and results in increase in subthreshold swing and DIBL

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Summary

INTRODUCTION

Strain Engineering is the most recent technology adopted to improve the performance of the device significantly. Strain results in increase in curvature of the hole bands and splitting of the electron bands [2] These factors results in increase in mobility of the device improving the functioning of the device. Though scaling which is the present trend adopted to improve performance results in increase in drain current but the drawback with scaling is that with decrease in device dimensions, threshold voltage decreases and results in increase in subthreshold swing and DIBL. In this paper Biaxial tensile Strained Silicon MOSFET of 40nm channel length and 2nm oxide thickness has been taken and the impact of strain and channel thickness on the performance of the device in terms of mobility, subthreshold swing, DIBL and drain current has been observed.

THEORETICAL STRUCTURE MODELLING
RESULTS AND DISCUSSION
CONCLUSION
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