Tapped Delay Research Articles

Robust blind space‐time adaptive processing for measurement error mitigation in GNSS receivers

AbstractThe measurement errors induced by the space‐time adaptive processing (STAP) is gaining attention for its significant detriment to the precision of the global navigation satellite system (GNSS) receiver positioning. To mitigate measurement errors, the steering vector (SV) estimation method based on spreading is widely employed in measurement error mitigation algorithms. However, the hazard of the SV estimation fluctuation problem is ignored in these algorithms. In this paper, the specific harm of such SV estimation fluctuation problem is analysed. To alleviate such problem and to eliminate the measurement errors as much as possible, a robust STAP beamformer for GNSS receivers is proposed. First, to acquire a series of robust SVs in different integration times, a desired signal covariance (DSC) matrix is iteratively reconstructed to remove the disturbance from thermal noise and the residual jamming signals. Second, to eliminate measurement errors, a replacement matrix is formed to help guarantee the phase linearities of the tapped delay lines (TDLs). Numerical examples demonstrate that the method can achieve a set of stable SV estimations and linear phase TDLs, leading to a carrier‐to‐noise‐power ratio () of more than 50 dBHz and a code phase bias of less than 3.4 m, which outperform the methods used for comparison.

A 128 Gb/s 7-Tap FIR Filter in 130 nm SiGe BiCMOS for High-Speed Channel Equalization

In this letter, a fully analog differential 7-tap 128 Gb/s finite impulse response (FIR) filter using IHP’s 130 nm SG13G2 SiGe:C BiCMOS process is presented. The design includes microstrip transmission line (TL) delay structures for introducing 3 ps tap delay, which corresponds to a third-bit period at 112 Gb/s. Detailed measurements show that the filter is capable of eye diagram improvements up to 128 Gb/s while consuming 693 mW, demonstrating its suitability for new generation 400 Gb/s communication channels. To the best of the authors’ knowledge, this is the fastest NRZ equalization by a fully analog FIR filter, to be found in the literature.

Performance evaluation of FBMC versus OFDM in tapped delay line doubly selective channels

Performance evaluation of FBMC versus OFDM in tapped delay line doubly selective channels

Secure Industrial IoT Systems via RF Fingerprinting Under Impaired Channels With Interference and Noise

Industrial IoT-enabled critical infrastructures are susceptible to cyber attacks due to their mission-critical deployment. To ensure security by design, radio frequency (RF)-based security is considered an effective way for wirelessly monitored or actuated critical infrastructures. For this purpose, this paper presents a novel augmentation-driven deep learning approach to analyze unique transmitter fingerprints and determine the legitimacy of a user device or transmitter. An RF fingerprinting model is susceptible to various channel and environmental conditions that impact the learning performance of a machine/deep learning model. As data gathering cannot always be considered a feasible alternative, efficient solutions that can tackle the impact of varying propagation channels on learning performance are emergent. This work aims to shed light on the RF fingerprinting problem from a different angle when 4G, 5G, and WiFi data samples are collected from different transmitters by proposing a fine-grained augmentation approach to improve the learning performance of a deep learning model. This work also proposes an enhanced classifier structure following the fine-grained augmentation approach. Results of experiments, conducted on the POWDER dataset, demonstrate promising RF fingerprinting performance when training data are augmented in a waveform-specific fine-grained manner. Thus, the RF identification accuracy can be boosted to 97.84% on unseen RF data instances from our previously published work where we had achieved an accuracy of 87.94% using tapped delay line (TDL)/clustered delay line (CDL)-based augmentation approach. The paper also presents a sensitivity analysis of the fine-grained approach concerning different signal-to-noise-ratio (SNR), signal-to-interference-ratio (SIR) levels (20 dB and 30 dB), and signal-to-interference-plus-noise-ratio (SINR) levels (15 dB, 25 dB). The sensitivity analysis exhibits that it achieves 85.78% accuracy at 20 dB SIR on both Day 1 (train) and Day 2 (test) data. In addition, it achieves 92.37% accuracy even at 20 dB SNR on Day 2 data from POWDER dataset. Furthermore, it achieves 84.95% accuracy at 15 dB SINR on Day 2 data. Hence, these results exhibit the resiliency of the fine-grained augmentation approach against interference and noise.

Performance evaluation of FBMC versus OFDM in tapped delay line doubly selective channels

Performance evaluation of FBMC versus OFDM in tapped delay line doubly selective channels

Characterization and Modeling of UHF Wireless Channel in Terrestrial SFN Environments: Urban Fading Profiles

This paper proposes several realistic fading channel models to describe the signal distortions that arise in single frequency network (SFN) environments. The proposed models characterize ultra-high frequency (UHF) wireless channels based on measurements from operating networks in metropolitan areas. In this paper, the unique features of SFN transmission are identified compared to the conventional, single antenna transmission channels. The impacts of urban propagation, tower configuration, and mobile and terrain effects are considered based on the tapped delay line structure. The proposed models can provide a useful reference to facilitate the SFN system design, network planning, verification, and receiver performance test. Free MATLAB source code of the fading simulator is available at <uri xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">https://github.com/ETRI-KMOU/FadingChannelSimulator</uri> .

V2V channel modeling at 5.2 GHz for highway environment

To design and evaluate vehicle-to-vehicle (V2V) communication systems in intelligent transportation system (ITS), it is important to understand the propagation mechanisms and channel models of V2V channels. This paper aims to analyze the channel models at 5.2 GHz for the highway environment in obstructed line-of-sight (OLoS) and line-of-sight (LoS) scenarios, particularly the vehicle connectivity probability derivation based on the propagation model obtained from measurement. First, the path loss (PL), shadow fading (SF), narrowband K-factor, and small-scale amplitude fading are analyzed. Results showed that the received signal magnitude follows Rice and Weibull distribution in LoS and OLoS scenarios, respectively. Second, we develop simple and low-complexity tapped delay line (TDL) models with a 10 MHz bandwidth for LoS and OLoS scenarios; in addition, we investigate the wideband K-factor, the root mean square delay spread (RMS-DS), and delay-Doppler spectrum. Third, we derive the closed form connectivity probability between any two vehicles in the presence of Weibull fading channel, and analyze the effects of Weibull fading channel and traffic parameters on connectivity. It is found that Weibull fading parameter, transmit power and vehicle density have positive impact on connectivity probability, PL exponent has negative impact on connectivity probability.

Deep Learning Channel Estimation for OFDM 5G Systems with Different Channel Models

At cellular wireless communication systems, channel estimation (CE) is one of the key techniques that are used in Orthogonal Frequency Division Multiplexing modulation (OFDM). The most common methods are Decision‐Directed Channel Estimation, Pilot-Assisted Channel Estimation (PACE) and blind channel estimation. Among them, PACE is commonly used and has a steadier performance. Applying deep learning (DL) methods in CE is getting increasing interest of researchers during the past 3 years. The main objective of this paper is to assess the efficiency of DL-based CE compared to the conventional PACE techniques, such as least-square (LS) and minimum mean-square error (MMSE) estimators. A simulation environment to evaluate OFDM performance at different channel models has been used. A DL process that estimates the channel from training data is also employed to get the estimated impulse response of the channel. Two channel models have been used in the comparison: Tapped Delay Line and Clustered Delay Line channel models. The performance is evaluated under different parameters including number of pilots (64 pilots or 8 pilots), number of subcarriers (64), the length of cyclic prefix (16 or 0 samples) and carrier frequency (4 GHz) through computer simulation using MATLAB. From the simulation results, the trained DL estimator provides better results in estimating the channel and detecting the transmitted symbols compared to LS and MMSE estimators although, the complexity of the proposed LSTM estimator exceeds the equivalent LS estimator. Furthermore, the DL estimator also demonstrates its effectiveness with various pilot densities and with different cyclic prefix periods.

Linearity improvement of UltraScale+ FPGA-based time-to-digital converter

Time-to-digital converters (TDCs) based on the tapped delay line (TDL) architecture have been widely used in various applications requiring a precise time measurement. However, the poor uniformity of the propagation delays in the TDL implemented on FPGA leads to bubble error and large nonlinearity of the TDC. The purpose of this study was to develop an advanced TDC architecture capable of minimizing the bubble errors and improving the linearity. To remove the bubble errors, the decimated delay line (DDL) architecture was implemented on the UltraScale + FPGA; meanwhile, to improve the linearity of the TDC, a histogram uniformization (HU) and multi-chain TDL (MCT) methods were developed and implemented on the FPGA. The integral nonlinearities (INLs) and differential nonlinearities (DNLs) of the plain TDCs with the ‘HU method’ (HU TDC) and with ‘both HU and MCT methods’ (HU-MCT TDC) were measured and compared to those of the TDC with ‘DDL alone’ (plain TDC). The linearity of HU-MCT TDC were superior to those of the plain TDC and HU TDC. The experiment results indicated that HU-MCT TDC developed in this study was useful for improving the linearity of the TDC, which allowed for high timing resolution to be achieved.

Design of Digital FIR Filter with Systolic Architecture using Reversible Logic Gates

The design of Digital filters plays a prominent role in the present scenario. The delay and area are the two major components that need to be concentrated on. The delay tap present in FIR filters should be suppressed to inflate the speed of the system. In this paper, the FIR filter design using systolic architecture with associative technique is implemented. This system includes a number of identical elements that are interconnected one after another by programmed manner to get the specified output. Here the proposed systolic FIR is compared with TDA logic block using bisection technique. There will be a greater reduce of critical path using the systolic architecture. To intensify the speed and to truncate the system delay the processing elements such as adders, multipliers and delay elements are designed by reversible logic operations. The proposed filter is better in many aspects such as density of gates, power consumption and delay outputs compared with existing filter. Experimental results are performed using the Xilinx ISE tool.

Design of a multi-channel high-resolution TDC based on FPGA

High-resolution multi-channel time-to-digital converters (TDC) is an important tool in many physical experiments. In the HL-2A tokamak device,a real-time double-ring neutron time-of-flight (TOFII) spectrometer system used to measure the neutron energy spectrum requires the TDC to have a measurement accuracy of 100 ps and a number of 90 channels. In the measurement-device-independent quantum key distribution (MDI-QKD) system, multi-channel and high-precision TDC is also one of the key factors affecting the final bit rate. In this paper, we propose the field programmable gate array (FPGA) method to develop the TDC. By using the coarse-fine combined measurement method, we complete the TDC design through the tapped delay line formed by the internal carry chain of the FPGA. Our method achieves a time measurement of 90 channels and a time resolution of 52 ps.

Digital modulation signal separation received by single antenna using TDL-ICA

Recently, signal source separation technique using independent component analysis (ICA) have been attracting attention in the field of wireless communications. Furthermore, TDL-ICA, which combined a tapped delay line with ICA to increase the number of separatable signals with fewer elements, has been proposed. However, the application to the digital modulation has not been considered enough. In this paper, it is shown that the TDL-ICA can separate the overlapped digital modulated signals in the frequency domain by setting the appropriate parameters of the TDL, and the relationship between the number of taps of the TDL and the separation performance is clarified.

Time‐Varying Channel Estimation Based on Air‐Ground Channel Modelling and Modulated Learning Networks

To improve the time-varying channel estimation accuracy of orthogonal frequency division multiplexing air-ground datalink in complex environment, this paper proposes a time-varying air-ground channel estimation algorithm based on the modulated learning networks, termed as MB-ChanEst-TV. The algorithm integrates the modulated convolutional neural networks (MCNN) with the bidirectional long short term memory (Bi-LSTM), where the MCNN subnetworks accomplish channel interpolation in frequency domain and compress the network model while the Bi-LSTM subnetworks achieve channel prediction in time domain. Considering the unique characteristics of airframe shadowing for unmanned aircraft systems, we propose to combine the classical 2-ray channel model with the tapped delay line model and present a more realistic channel impulse response samples generation approach, whose code and dataset have been made publicly available. We demonstrate the effectiveness of our proposed approach on the generated dataset, where experimental results indicate that the MB-ChanEst-TV model outperforms existing state-of-the-art methods with a lower estimation error and better bit error ratio performance under different signal to noise ratio conditions. We also analyze the effect of roll angle of the aircraft and the duration percentage of the airframe shadow on the channel estimation.

A 19 ps Precision and 170 M Samples/s Time-to-Digital Converter Implemented in FPGA with Online Calibration

This paper presents a 19 ps precision and 170 M samples/s time-to-digital converter (TDC) in FPGA. Through the direct count method and tapped delay line method, the coarse count and fine count can be extracted, respectively. The direct count is realized by the 350 M clock and the tapped delay line is constructed by the CARRY4 block. The ones-counter encoder is used to convert the thermometer code with bubble errors into binary code, which is applicable to all the FPGA chips. This work not only explains the schematic of the ones-counter encoder, but also shows how to configure it. Owing to the inconsistency of delay elements caused by process, bin-by-bin calibration is utilized to improve the differential nonlinearities (DNL) and integral nonlinearities (INL) of the TDC. A novel method was developed to compensate the influence of voltage and temperature. As the delay elements vary with voltage and temperature, a frequency counter is used to extrapolate and compensate its effect on the delay line. All of the above strategies use online calibration and improve the precision and sampling rate of TDC. The experimental results show the least significant bit (LSB) achieves 17.4 ps, the DNL is within [−0.90, 1.67] LSB, and the INL is in the range of [−1.90, 3.31] LSB.

A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Converter Based on Phase Wrapping Sorting and Selection

A field-programmable gate array (FPGA) high-resolution time-to-digital converter (TDC) based on phase-wrapping, sorting, and selection to achieve an extremely fine bin size of 1 ps is proposed in this paper. Based on Nutt interpolation method, a wide measurement range with a high resolution can be realized at the same time. The input signal is fed into tapped delay lines (TDL) with regularized and automated cell placements to generate a multitude of delayed signals with plenty of regularized phase shifts. Due to periodicity, those phase shifts will be equivalently wrapped within a reference clock period and then phase sorting, ROM-based selection are applied to construct a merged TDL with uniform phase division across the reference clock period. The FPGA TDC was implemented successfully on both Altera Stratix IV to achieve a resolution as fine as 1ps with a measurement range of 1s. The short-range integral non-linearity errors (INL) are measured as -1.470 – 1.676 LSB for Stratix IV to demonstrate its excellent linearity.

Simultaneous monitoring of the values of CD, Crosstalk and OSNR phenomena in the physical layer of the optical network using CNN

The aim of the research was to explore the possibilities of using the Asynchronous Delay Tap Sampling (ADTS) and Convolutional Neural Network (CNN) methods to monitor the simultaneously occurring phenomena in the physical layer of the optical network. The ADTS method was used to create a data sets showing the combination of Chromatic Dispersion (CD), Crosstalk and Optical to Signal Noise Ratio (OSNR) as optical disturbances in graphic form. Data were generated for 10 GB/s, Non-return-to-zero On–off keying (NRZ-OOK) and Differential Phase Shift Keying (DPSK) modulation and bit delays: 1 bit, 0.5 bit and 0.25 bit. A total of 6 data sets of 62,000 images each were obtained. The learning process was carried out for the number of epochs 50 and 1000. From the obtained learning results of the network, models with the best R^{2} matching factor were selected. The learned models were further used to study the recognition of three phenomena simultaneously. The tests were carried out on sets of 2500 images in a combination of interference in the following ranges: 400–1600 ps/nm for CD and 10–30 dB for Crosstalk and OSNR. Very good results were obtained for recognizing simultaneously occurring phenomena using models learned up to 1000 epoch. Accuracy of over 99% was obtained for CD and Crosstalk for both modulations. In the case of the OSNR phenomenon, slightly weaker results were obtained above 96% in most cases. For models taught up to 50 epoch, very good results were obtained for the CD phenomenon (over 99%). For Crosstalk weaker results for OOK modulation were obtained. Poor results were obtained for the OSNR phenomenon, where recognition accuracy ranged from 50 to 80%, depending on the type of modulation and bit delay. Based on the conducted research, it was established that the use of ADTS and CNN methods enables monitoring of simultaneously occurring CD, Crosstalk and OSNR interference in the physical layer of the optical network, while maintaining the requirements for Optical Performance Monitoring systems. These requirements are met for network models learned up to 1000 epoch.

Efficient Routing Algorithm using MLP and RBX in a Four Model Neural Networks

Two important paradigms which are contradicting by nature namely: the efficient routing information diffusion and adaptability to dynamic network conditions using wireless routing protocols have been researched in recent years. One way of solving this issue is by using the past experiences of a node in network traffic condition through intelligent algorithm to predict the network traffic condition in the future. In this methodology we propose an algorithm which is used to to predict one hop delay per packet during routing process using neural networking. The one hop delay that is predicted is then further used by the participating nodes for information diffusion during routing. Experimental analysis indicate that using tapped delay line radial basis function and tapped delay line multilayer perceptron, it is possible to predict mean delays as a time series. The inputs used for prediction are mean delay time series with traffic loads and mean delay time series itself. The pros and cons of the proposed work are also present in this paper.

Directivity enhancement with improved beamforming for physical layer ultra‐wideband communication by pulse shaping

SummaryIn this manuscript, a methodology of pulse shape modification is used for the directivity enhancement of ultra‐wideband (UWB) beam formation, to suppress the interference due to co‐existing narrowband communications with UWB signals. We propose that the modified pulse shaping produces more direct beam patterns for the tapped delay line antenna arrangements. These direct beam patterns are obtained for the smaller values of inter‐element spacing. This reduction of inter‐element spacing can provide more space for other development and compact the size of the any UWB antenna unit.

Experimental demonstration of low complexity hybrid FFE algorithm for strictly band-limited IM/DD system

Feed forward equalizer (FFE) has been widely used in high-speed short-haul optical transmission. When system suffers from serious inter-symbol interference (ISI), i.e. low-cost transceiver induced narrow-bandwidth limitation, FFE with large number of taps is necessary, which significantly increases the computational complexity. In this paper, we proposed a hybrid FFE (H-FFE) algorithm with tap delay adjusted between T space and T/2 space. Enabled by the H-FFE and conventional T/2-spaced FFE algorithms, we demonstrated the intensity modulation and direct detection (IM/DD) transmission of 56, 70, and 80 Gbaud PAM4 signals over standard single mode fiber (SSMF) links up to 2, 1 km and 500 m employing the 18 GHz (3 dB) system bandwidth at C band. The experimental results indicate that the proposed H-FFE algorithm has the similar performance with the conventional T/2-spaced FFE algorithm. In addition, using the proposed H-FFE algorithm, the computational complexity is one third of that of the conventional T/2-spaced FFE algorithm.

Experimental realization of integrated photonic reservoir computing for nonlinear fiber distortion compensation.

Nonlinearity mitigation in optical fiber networks is typically handled by electronic Digital Signal Processing (DSP) chips. Such DSP chips are costly, power-hungry and can introduce high latencies. Therefore, optical techniques are investigated which are more efficient in both power consumption and processing cost. One such a machine learning technique is optical reservoir computing, in which a photonic chip can be trained on certain tasks, with the potential advantages of higher speed, reduced power consumption and lower latency compared to its electronic counterparts. In this paper, experimental results are presented where nonlinear distortions in a 32 GBPS OOK signal are mitigated to below the 0.2 × 10-3 FEC limit using a photonic reservoir. Furthermore, the results of the reservoir chip are compared to a tapped delay line filter to clearly show that the system performs nonlinear equalisation.