T-type Converter Research Articles

Hybrid Seven-Level Converter Based on T-Type Converter and H-Bridge Cascaded Under SPWM and SVM

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper.

Virtual flux direct power-backstepping control of 5-level T-type multiterminal VSC-HVDC system

Summary In this study, a nonlinear control of a 5-level T-type converter topology-based multiterminal voltage source converter high-voltage direct current system is proposed. The idea of the proposed control is to combine the backstepping control and direct power control with virtual flux concept into one controller able to improve the performance of the transmission system. In the other side, the use of a 5-level space vector modulation with a balancing strategy based on effective use of the redundant switching states of the converters voltage vectors guarantees the objective of maintaining balanced voltages in DC-capacitors. Finally, simulations of the 5-level T-type multiterminal voltage source converter high-voltage direct current system validate the effectiveness of the proposed control law. The obtained results are compared with those performed by a conventional Proportional Integrator (PI) controller. These outcomes allow to exhibit excellent transient response during a range of operating conditions.

Unified Algorithm for Multilevel Inverters

Multilevel inverters (MLIs) are broadly classified into symmetrical and asymmetrical types based on the DC-link voltage distribution. Asymmetrical MLIs are further classified into binary, quasi-linear and ternary hybrid inverters based on the geometric progression of the DC-link voltages. This study focuses on a new type of random asymmetrical MLIs (RASMLIs) where the DC links voltages are random and randomness is not pertained to any specific geometric progression. This study proposes an optimised vector search algorithm which is unified for symmetrical, asymmetrical and RASMLI. The concept of gradient-intercept equation and its corresponding Gs is the basis of the algorithm for identifying the proximal vectors. The algorithm determines the maximum DC bus utilisation at which the inverter can effectively produce quality output with minimal total harmonic distortion. As the redundant vectors reduce due to randomness the algorithm also aims at reducing the common-mode voltage with minimum switch transition. To validate the proposed algorithm, a T-type converter with H-bridge modules cascaded along each phase is considered. An experimental prototype of the same was developed and random DC voltages were fed using isolated DC supplies with induction motor as load. Nexys-4 field programmable gate array was used to implement the algorithm.

Circulating Current Analysis and Suppression for Configured Three-Limb Inductors in Paralleled Three-Level T-Type Converters With Space-Vector Modulation

In high-power applications, paralleling three-level T-type converters (3LT 2 Cs) with common ac and dc sides represents a modular solution for overcoming limitations of active switches. However, when independent space-vector pulse-width modulation (SVPWM) is employed, zero-sequence circulating currents (ZSCCs) will emerge. Especially, the use of three-phase three-limb inductors (3P3LIs) without additional passive components to reduce cost and improve density of overall parallel system, will worsen ZSCC problem. In this paper, detailed analysis of ZSCCs generated by SVPWM based on a derived average model taking into account magnetic circuit characteristics of 3P3LIs is proposed. Furthermore, four inter-related methods are sequentially proposed: 1) synchronizing sector numbers based on modified vector diagram partition for eliminating periodical ZSCC jumps caused by asynchronous change of starting small vector; 2) feeding forward grid voltages for eliminating starting current jumps due to computation delay; 3) connecting neural points to eliminating constant dc ZSCC caused by neural-point voltage deviation; and 4) adjusting relative duration of negative and positive small vectors in pairs to suppress remaining low-frequency ZSCCs. Consequently, 3LT 2 Cs operated in parallel can separately regulate output powers with a good circulating current suppression performance. The validity of theoretical analysis and proposed methods is verified by experiment with three-parallel 175-kw 3LT 2 Cs.

Augmenting DFIG wind turbine transient performance using alternative voltage source T-type grid side converter

Voltage Source Converters (VSCs) are generally used to achieve energy conservation in wind energy applications. The conventional 2-level VSCs are commonly used in Doubly Fed Induction Generator (DFIG) wind turbines. Recently, the technology of multilevel converters in wind generators is becoming promising compared to the 2-level converters. This is because they can overcome some limitations of the 2-level converter performance during transients. This paper presents a new alternative T-type multilevel VSC topology for the grid side converter of the DFIG. The analysis and switching strategy of the T-type converter was presented. Simulations were run in Power System Computer Aided Design and Electromagnetic Transient Including DC (PSCAD/EMTDC) and results using the new T-type converter topology were compared with scenarios where the wind generator was protected by conventional crowbar, DC-chopper and parallel interleaved of the 2-level converters for the rotor and grid side converters of the DFIG. The results show the improved performance of the wind generator during transient, thus saving the cost of external expensive circuitry (crowbar) and more switching IGBTs (interleaving both converters). Furthermore, the performance of the T-type DFIG based grid converter was enhanced using a braking resistor connected to the stator of the wind generator.

Study by modeling and simulation of open-switch fault diagnosis for five-level converters

In this paper, an open-switch fault diagnosis method for five-level H-Bridge Neutral Point Piloted (HB-NPP) or T-type converters is proposed. While fault tolerant operation is based on three steps (fault detection, fault localization and system reconfiguration), a fast fault diagnosis, including both fault detection and localization, is mandatory to make a suitable response to an open-circuit fault in one of the switches of the converter. Furthermore, fault diagnosis is necessary in embedded and safety critical applications, to prevent further damage and perform continuity of service.In this paper, we present an open-switch fault diagnosis method, based on the switches control orders and the observation of the converter output voltage level. In five-level converters such as HB-NPP and T-type topologies, some switches are mostly 'on' at the same time. Therefore, the fault localization is quite complicated. The fault diagnosis method we proposed is capable to detect and localize an open-switch fault in all cases. Computer simulations are carried out by using Matlab Simulink and SimPowerSystem toolbox to validate the proposed approach.

Modelling of a New Configuration for DFIGs Using T-type Converters and a Predictive Control Strategy in Wind Energy Conversion Systems

In this paper, a new topology is introduced for Doubly-Fed Induction Generators (DFIGs), applied in wind energy conversion systems. In the proposed topology T-type converters are used in back-to-back form instead of conventional converters. T-type converters are high-efficient three-level converters with high power quality. Furthermore, a hysteresis-based predictive control method is suggested for rotor current control of DFIG. Therefore, discrete models of the DFIG and T-type converters are extracted. A new equation is also defined for rotor current reference calculation which determines predictive current error. The suggested equation can be applied either for pre-connection to grid for synchronizing the DFIG or after connection to grid for regular control of DFIG. In addition to simulation results, the proposed topology is verified using a laboratory setup. The constructed setup is based on a 16-bit DSPIC and a wound-rotor induction machine. Simulation and practical results confirm effective operation of the proposed topology.

Switching Transient Analysis and Design of a Low Inductive Laminated Bus Bar for a T-type Converter

Distributed stray inductance exerts a significant influence on the turn-off voltages of power switching devices. Therefore, the design of low stray inductance bus bars has become an important part of the design of high-power converters. In this study, we first analyze the operational principle and switching transient of a T-type converter. Then, we obtain the commutation circuit, categorize the stray inductance of the circuit, and study the influence of the different types of stray inductance on the turn-off voltages of switching devices. According to the current distribution of the commutation circuit, as well as the conditions for realizing laminated bus bars, we laminate the bus bar of the converter by integrating the practical structure of a capacitor bank and a power module. As a result, the stray inductance of the bus bar is reduced, and the stray inductance in the commutation circuit of the converter is reduced to more than half. Finally, a 10 kVA experimental prototype of a T-type converter is built to verify the effectiveness of the designed laminated bus bar in restraining the turn-off voltage spike of the switching devices in the converter.

A New SVPWM for the Phase Current Reconstruction of Three-Phase Three-level T-type Converters

This paper presents a new space vector pulsewidth modulation scheme to reconstruct phase currents using neutral-point current sensing in three-level T-type converters (TLTTCs). For this purpose, zero vector and offset vectors are replaced with complementary active vectors. These active vectors do not affect the resultant output voltage and the voltage balance at the neutral point of TLTTCs. Hence, the pulsewidths of corresponding active vectors can be adjusted even at low speeds without much additional switching losses and low-frequency noise in the inverter. The modified switching patterns can easily be generated without significant computational complexity. The proposed method is experimentally verified using Texas Instruments TMS320F28335 and Spartan 6 controllers, on a custom designed T-type converter based on Fuji IGBT modules.

Vector based dead-time compensation for three-level T-type converters

This paper proposes a new vector-based dead-time compensation method for three-level T-type converters. The origins and effects of the dead-time voltage errors are analyzed in detail for different switching commutations and load conditions. In order to eliminate the dead-time distortion in each phase, a dead-time error voltage vector is introduced to adjust the reference voltage vector depending on load current polarity. The proposed vector-based dead-time compensation scheme has several advantages. First, it can be applied to multilevel converters with any number of voltage levels using any modulation schemes. Second, the pulse loss issue which is common in conventional pulse-based compensation strategies can be eliminated. In addition, the pulse saturation can be mitigated by operating the converters in overmodulation regions. All of these advantages and effectiveness of the proposed vector-based dead-time compensation method are verified through both simulation and experimental studies.

A π-CLCL Type Immittance Converter for Constant Current and Dynamic Load Applications

Impedance-admittance converter is shortly termed as immittance converter. In this converter, the output current is proportional to the input voltage and the output voltage is proportional to the input current. The output current is thus independent of the load. This research evaluates the characteristics of a proposed π-CLCL immittance converter, which is a combination of the typical π- and T-type configurations, for constant current and dynamic load applications. The input-output characteristics and efficiency characteristics are analyzed and simulated. The characteristics are compared to that of the typical π- and T-type converters. The input-output characteristics and efficiency characteristics are then examined experimentally. It is observed that the experimental results agree with those of the simulation ones, and confirm that the π-CLCL configuration is more efficient than the typical π- and T-type immittance converters while maintaining a nearly constant output current and thus applicable for dynamic loads. DOI: http://dx.doi.org/10.11591/ijece.v4i5.5957

Optimised active harmonic elimination technique for three‐level T‐type inverters

This study develops a pulse-width modulation (PWM) method that is referred the optimised active harmonic elimination (AHE) technique to eliminate more harmonics with minimum switching frequency for three-level T-type converter (3 L-T2C) based on the fundamental frequency switching control method. First, Homotopy algorithm is applied to non-linear transcendental equations to eliminate low-order harmonics and to determine switching angle sets for selective harmonic elimination PWM in 3 L-T2C. The characteristics of the multiple solutions in terms of harmonic distribution, and total harmonic distortion (THD) are investigated. Then a detailed analysis of optimised AHE-PWM technique is presented to cancel more harmonics in 3 L-T2C using harmonic compensation strategy. A switching angle solution set that gives the lowest THD for optimised AHE-PWM is derived and the effectiveness of the control method is verified through extensive simulation studies. Finally, selected experimental results are reported to verify and validate the theoretical and simulation findings.

Design and Implementation of a Highly Efficient Three-Level T-Type Converter for Low-Voltage Applications

The demand for lightweight converters with high control performance and low acoustic noise led to an increase in switching frequencies of hard switched two-level low-voltage 3-phase converters over the last years. For high switching frequencies, converter efficiency suffers and can be kept high only by employing cost intensive switch technology such as SiC diodes or CoolMOS switches; therefore, conventional IGBT technology still prevails. In this paper, the alternative of using three-level converters for low-voltage applications is addressed. The performance and the competitiveness of the three-level T-type converter (3LT2C) is analyzed in detail and underlined with a hardware prototype. The 3LT2 C basically combines the positive aspects of the two-level converter such as low conduction losses, small part count and a simple operation principle with the advantages of the three-level converter such as low switching losses and superior output voltage quality. It is, therefore, considered to be a real alternative to two-level converters for certain low-voltage applications.