T-type Converter Research Articles

Power Quality Enhancement of Unbalanced Vehicle Microgrids by T-Type Converters Using Dual-Flexible Model Predictive Control

Power Quality Enhancement of Unbalanced Vehicle Microgrids by T-Type Converters Using Dual-Flexible Model Predictive Control

Comparative Study of Multilevel Converters using DQ Current Control

This paper presents a comprehensive comparative analysis of different multilevel converter topologies, including 2-level, Neutral Point-Clamped (NPC), Cascaded H-Bridge (CHB), and T-Type converters using the DQ current control strategy. The study aims to evaluate the performance of these topologies concerning current Total Harmonic Distortion (THD) and ripple in the direct and quadrature components of the current. A mathematical model of the grid is presented to facilitate the simulation study. The DQ current control scheme is implemented to regulate the current in both the direct and quadrature axes. The simulations are conducted under various operating conditions to capture the converters’ performance across different load scenarios and modulation techniques. Results indicate significant variations in the performance metrics among the different converter topologies. The 2-level converter exhibits higher THD and ripple compared to the more complex multilevel topologies.

Parasitic-Based Model for Characterizing False Turn-On and Switching-Based Voltage Oscillation in Hybrid T-Type Converter

High frequency and high voltage switching converters utilizing wide bandgap semiconductors are gaining popularity thanks to their compactness and improved efficiency. However, the faster switching requirements gives rise to new challenges. A key issue is the increased oscillation of the drain–source voltage caused by the switching action of the complementary switch in the same phase or change of state of the other phase switches. The voltage stress caused by these oscillations can damage the switch. Furthermore, the high dv/dt during turning-on of one switch might result in false turn-on of the complementary switch due to the miller effect. In this paper, these issues are investigated in a T-type converter through analytical and experimental analysis. Based on the proposed analytical approach, simple and cost-wise solutions utilizing an optimum design of gate driver circuits and circuit layout modifications can be developed to cope with the aforementioned issues. A comprehensive analytical model of the converter with consideration of parasitic capacitances and inductances is developed. By performing sensitivity analysis on the model, the effect of the parasitic parameters on the drain–source voltage oscillation and gate–source voltage amplitude in case of false turn-on is studied. The validity of the model is then assessed through numerical simulations and experimental results.

High-performance finite-time adaptive control strategy for three-level T-type converters

Three-level T-type converters are necessary interfaces for distributed energy resources to interact with the public grid. Naturally, designing a control strategy, featuring superior dynamics and strong robustness, is a promising solution to guarantee the efficient operation of converters. This article presents an improved finite-time control (IFTC) strategy for three-level T-type converters to enhance the dynamic performance and anti-disturbance capacity. The IFTC strategy integrates a dual-loop structure to regulate the dc-link voltage and grid currents. Specifically, the voltage regulation loop employs a finite-time adaptive controller that can counteract load disturbances without relying on current sensors. In the current tracking loop, finite-time controllers combined with a command filter are constructed to obtain fast and accurate current tracking. In this loop, the command filter is utilized to avoid calculating the derivative of current references. Theoretical analysis and experimental results demonstrate the IFTC strategy’s effectiveness.

A Bidirectional Single Capacitor Unit Based Hybrid T-Type Converter Topology With Sensor-Less Voltage Balancing Capabilities

A Bidirectional Single Capacitor Unit Based Hybrid T-Type Converter Topology With Sensor-Less Voltage Balancing Capabilities

Open-circuit Fault Diagnosis Method for Grid-tied T-type Converters based on Harr-like Features

Open-circuit Fault Diagnosis Method for Grid-tied T-type Converters based on Harr-like Features

Comprehensive modeling and formulation of split DC link capacitors balancing problem in Three-Phase Three-Level bidirectional AC/DC converters operating with arbitrary power factor

Three-phase three-level AC/DC and DC/AC converters have demonstrated several advantages over their classical two-level counterparts such as better efficiency, enhanced total harmonic distortion, lower dv/dt and lesser overall chip area. T-type and neutral point clamped (NPC) topologies dominate the family of three-phase three-level converters, widely used in 10kVA – 100kVA power range. However, control of three-level converters is more complicated than of their classical two-level counterparts due to necessity of adopting an additional voltage loop, aimed to balance partial split DC link voltages. Moreover, the latter contain multiples of triple-base-frequency harmonic ripple even under balanced AC-side operation (this does not happen in two-level converters), which should be minimized by the balancing loop mentioned above. The nature of partial DC link ripple formation was analyzed in-depth for unity power factor operation, yet hardly extended to non-unity power factor cases. Moreover, inaccurate conclusions were drawn in some of the related studies. Consequently, this paper focuses on comprehensive modeling and formulation of split DC link capacitors balancing problem in three-phase three-level bidirectional AC/DC converters operating with arbitrary power factor. Analytical expression for dynamics of partial DC link voltages difference is derived and studied in depth. The relation between zero-sequence component of modulation signals and neutral point current, tending to unbalance partial DC link voltages is explicitly established for arbitrary power factor values. Practical cases of restricted and unrestricted zero-sequence component of modulation signals are presented. Analytical predictions are shown to be fully supported by simulations based on both switching-cycle-averaged and full switched converter models. Experimental results obtained employing a 10kVA T-type converter prototype operating with restricted zero-sequence component of modulation signals under different power factor values are also given to further validate the presented methodology.

Generalization of Split DC Link Voltages Behavior in Three-Phase-Level Converters Operating with Arbitrary Power Factor with Restricted Zero-Sequence Component

This article examines the impact of a power factor on the behavior of partial DC link voltages in three-phase three-level AC/DC (or DC/AC) converters operating without additional balancing hardware. We consider the case in which the controller utilizes a bandwidth-restricted (DC in steady state) zero-sequence component to achieve average partial DC link voltage equalization since the injection of high-order zero-sequence components is impossible or forbidden. An assessment of partial split DC-link capacitor voltage behavior (particularly that of ripple magnitudes and phases) is necessary for, e.g., minimizing the values of DC link capacitances and selecting reference voltage values. Previous studies assessed the abovementioned behavior analytically for operation under a unity power factor based on third-harmonic-dominated split partial voltages’ ripple nature. However, it is shown here that deviation from the unity power factor introduces additional (to the third harmonic) non-negligible harmonic content, increasing partial voltage ripple magnitudes and shifting their phase (relative to the mains voltages). As a result, the third-harmonic-only assumption is no longer valid, and it is then nearly impossible to derive corresponding analytical expressions. Consequently, a numerical approach is used in this work to derive a generalized expression of normalized ripple energy as a function of the power factor, which can then easily be utilized for assessments of split DC link voltage behaviors for certain DC link capacitances and reference voltages. Simulations and experimental results validate the proposed methodology applied to a 10 kVA T-type converter prototype.

Closed-Form ZVS Boundaries for Three-Phase M-Level-to-N-Level DAB Converters With Different Winding Configurations

One of the essential characteristics of a three-phase dual-active-bridge (DAB) DC-DC converter is its inherent zero-voltage switching (ZVS) capability during the turn-on of the switches. This paper provides closed-form equations that identify the ZVS boundaries for an M-level-to-N-level DAB converter, where M and N can be any natural numbers. It is shown that the derived ZVS boundaries can be used for different converter topologies, including but not limited to: two-level full-bridge converter, three-level neutral-point-clamped converter, T-type converter, transition arm converter, modular multilevel converter, and controlled-transition-bridge converter. The effect of different winding configurations of the medium frequency transformer—YY, Y <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Delta$</tex-math></inline-formula> , and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Delta \Delta$</tex-math></inline-formula> —is also considered in the study. Additionally, easy-to-implement simplified ZVS boundaries are provided, and the effects of the different number of levels, transition times, and dead times on the ZVS operation are quantified. An important result shown is that the converters with the YY and the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Delta \Delta$</tex-math></inline-formula> windings lose ZVS at partial loads as soon as the transition time increases from zero, whereas the ones with the Y <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Delta$</tex-math></inline-formula> configuration retain ZVS at partial loads and DC ratios close to unity, without any advanced modulation techniques. The derived analytical models are validated with MATLAB simulations and experiments.

Passivity-Based Partial Sequential Model Predictive Control of T-Type Grid-Connected Converters With Dynamic Damping Injection

LCL-filter interfaced three-level T-type converters (LCL-3LT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> C) have been widely used in low-voltage applications due to their elevated power quality. However, there exist several problems. To begin with, the performance of the finite-control-set model predictive control (FCS-MPC) controlled 3LT2C relies on an accurate system model and measurement. Consequently, output performances will be influenced when model parameter mismatches, grid impedance variation, and the dead-time of power devices occur. In addition, the robustness of the FCS-MPC controller may also encounter challenges under disturbances and noise. Further, LCL-filter has the resonance problems in the grid currents, which may endanger the system stability. To solve these problems, a passivity-based (PB) partial sequential MPC (PSMPC) with dynamic-damping (DD) injection (DDPB-PSMPC method), which outperforms FCS-MPC and ensures the asymptotic stability, is proposed. First, the passive output voltage based on the Euler-Lagrange (EL) model is obtained using dynamic damping injection. Second, by embedding passive output voltage into MPC, a passivity-based PSMPC robust controller is designed to enhance its anti-disturbance abilities and achieve resonance suppression. Finally, to avoid the time-consuming of weighting factor selection, a PSMPC that allocates non-conflicting objectives in the same layer is introduced. Experimental results on 10-kW prototype demonstrates its excellent performance over existing techniques.

High Efficiency Isolated 5-Level Dual Active DC–DC Converter Using Wide Band Gap Devices

In this paper a bidirectional isolated dc-dc converter is proposed for application in shipboard power systems. In this topology, an active 5-level T-type converter is used on the primary and secondary sides of a high-frequency transformer. The operation of the proposed converter is optimized based on minimizing power losses. For the optimization, the transformer core loss, reactive power, and rms current are considered. Wide band gap devices are used for minimization of semiconductor switching losses. A control method based on the Fourier series and decomposition theorem is proposed. The proposed converter features higher efficiency, fault tolerant capability and smaller filter size compared to the common dual active bridge dc-dc converters. To reduce voltage overshoot, a laminated dc-link is designed and a two-level turn-off method is used for operating frequencies around 75 kHz. Finally, the step-up and step-down operations of the proposed structure are verified through experiments.

Switch Fault Detection and Localization for T-Type Converter

Over the past decade, multilevel converters have received considerable interest in medium voltage applications. A large number of active switches in a multilevel converter increases the probability of switch failure and decreases the reliability of the system. An open switch fault can lead to a malfunction of the whole system and should be diagnosed as soon as possible. In this paper, an open-switch fault diagnosis method for a five-level H-Bridge T-type converter is presented. The proposed fault detection method and the fault localization algorithm are based on the switching patterns and the converter output voltage level observation. This approach is capable to detect and localize an open circuit fault for all switches. First, it is validated by simulations in Matlab Simulink and Simscape toolbox environments. Experimental results are also presented and discussed to validate the simulation results.

Fault-Tolerant Dual Active Isolated DC-DC Converter

In this paper a fault-tolerant isolated dc-dc converter is proposed for shipboard power applications. In this topology, an active 5-level T-type converter is used on the primary and secondary sides of a high-frequency transformer. The operation of the proposed converter is optimized based on minimizing the losses. A fault-tolerant analysis is carried out for this converter and post-fault switching methods are proposed for each faulty condition. The proposed converter features better fault tolerance options and higher efficiency compared to the common dual active bridge dc-dc converters. Finally, the operation of the proposed structure in the normal and faulty conditions are verified through experiments.

Hybrid Vehicle CO2 Emissions Reduction Strategy Based on Model Predictive Control

This work proposes a hybrid drive controlled configuration, using a minimum emissions search algorithm, which ensures the operation of the Internal Combustion Engine (ICE) in its fuel efficiency range, minimizing CO2 emissions by controlling the power flow direction of the Electric Machine (EM). This action is achieved by means of Power Converters, in this case a bi-directional DC-DC Buck-Boost Converter in the DC-side and a DC-AC T-type Converter as the inverting stage. Power flow is controlled by means of a bi-directional Model Predictive Control (MPC) scheme, based on an emissions optimization algorithm. A novel drivetrain configuration is presented where both, the ICE and the EM are in tandem arrangement. The EM is driven depending on the traction requirements and the emissions of the ICE. The EM is capable of operates in motor and generator mode ensuring the Minimum Emission Operating Point (MEOP) of the ICE regardless of the mechanical demand at the drivetrain. Simulation and validation results using a Hardware in the Loop (HIL) virtual prototype under different operation conditions are presented in order to validate the proposed overall optimization strategy.

Gate Driver Circuit with All-Magnetic Isolation for Cascode-Connected SiC JFETs in a Three-Level T-Type Bridge-Leg

This article presents a gate driver circuit with all-magnetic isolation for driving silicon carbide (SiC) power devices in a three-level T-type bridge-leg. Gate driver circuitry for SiC devices has to be tolerant of rapid common-mode voltage changes. With respect to the resultant potentially problematic common-mode current paths, an arrangement of transformers is proposed for supplying the power devices with drive signals and power for their local floating gate driver circuits. The high-frequency carrier phase-switching technique is used to reduce the number of transformers. Signal timing and other implementation issues are addressed when using this arrangement with the T-type converter. The circuit is demonstrated in a 540 V bridge-leg constructed around 650 V and 1200 V cascode-connected normally-on SiC junction field effect transistors (JFETs).

Integrated Model Predictive Control of a Single-Phase Multilevel T-type Converter for a Photovoltaic Grid Connected System under Failure Conditions

Abstract The article presents two contributions: the first is an optimised control structure for photovoltaic grid connected systems (PVGCSs). The power chain is composed of two cascaded power converters, namely, a boost converter and a five-level T-type multilevel converter. Traditionally, each power converter is controlled by a separate mode control (SMC) from the other, which is computationally intensive since each converter requires its own control system, which is not practical. The suggested control, called integrated finite set model predictive control (IFS-MPC), allows controlling cascaded converters at the same time in one stage, instead of controlling them separately. Consequently, the overall implementation system is widely reduced. The second contribution of the article is a modified IFS-MPC called modified integrated finite set-model predictive control (M-IFS-MPC), which ensures the correct functioning of the grid-tied PV system under certain faults in converter components. Indeed, when one of the DC-link capacitors fails or when one of the auxiliary switches breaks down, by selecting an appropriate choice of the DC-link capacitors’ voltage reference, the proposed design allows a normal operation without intervention on the power circuit.

Open-Circuit Fault Diagnosis Method for Grid-Connected Bidirectional T-Type Converter Based on Geometrical Similarity Measurement

Grid-connected bidirectional T-type converter (GBTC) is widely used in power generation, vehicle-to-grid, and other applications because of its bidirectional energy flow and superior performance. However, transistor open-circuit fault can cause serious output harmonics and even system outage. In this work, a novel open-circuit fault diagnosis method is proposed based on geometrical similarity measurement, which is suitable for the rectifier state and inverter state of the GBTC. Under healthy and faulty conditions, current paths and distortions are deeply analyzed. To evaluate the distortions, reference geometry vectors and current geometry vectors constructed from the grid angle and normalized currents are studied. Geometry features including vector triangle area, structural similarity, and contour similarity are used to measure the similarities among the vectors and carry out fault detection, fault phase location, and fault transistor location, respectively. Reasonable diagnostic thresholds are designed, and no additional sensor is needed. The robustness and effectiveness of the method are verified by experiment results.

Design and Implementation of a T-Type Based Topology for Grid-Connected Current-Source Inverters in PV Applications

This paper presents a novel non-isolated 5-level inverter for interfacing renewable sources to the power grid. It consists of a modified T-type converter with an HERIC-based AC decoupling strategy. The 5-level output voltage is filtered by a passively damped LCL filter, resulting in a high power density structure. Experimental results on a 250 (W) prototype are presented to validate the operating principle of the proposed topology and show a high efficiency over the entire output power range. Besides, the injected current complies with the IEEE 1547-2018 specifications regarding harmonic content until the 10th harmonic, using a classical PI controller with an additional feedforward term.

A Nine-Level T-Type Converter for Grid-Connected Distributed Generation

This article presents a new high-efficiency nine-level T-type converter (9L-T2C) for grid-connected applications based on the three-level T-type converter (3L-T2C). The proposed 9L-T2C outperforms other common dc-link nine-level converters in terms of the required number of active switches and capacitors, flying capacitors (FCs) voltage ratings, and efficiency. Only ten power switches, eight gate drivers, and two FCs are required for each phase. Exploiting the available pole-redundant states, an FCs balancing algorithm is developed to stabilize the two FCs with one voltage sensor in steady-state and dynamic operation. Moreover, an effective balancing method is proposed for dc-link capacitors without the need for further redundant states and integrated into FCs balancing. The FCs and dc-link balance are integrated into the phase-disposition pulsewidth modulation (PD-PWM) method, eliminating the need for an additional controller. Considering the designed PD-PWM method, a mathematical analysis is performed to establish the relationship between the FCs size and the desired ripple. A comprehensive comparison with other converters is provided to demonstrate the merits and application areas of 9L-T2C. The operation of the proposed 9L-T2C with the capacitors’ balancing scheme is validated for stand-alone and grid-connected operation via simulation investigations and experimental setup.

Fault-Tolerant Sequential MPC for Vertical Switch Open-Circuit Fault and ZSCC Suppression for Parallel T-Type Converters

A fault-tolerant control (FTC) is proposed for enhancing the reliability of power electronic systems. The software-based FTC of parallel-connected three-level T-type converters (3LT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> Cs) for suppressing zero-sequence circulating current (ZSCC) induced by a vertical switch open-circuit fault is investigated. A simplified sequential model predictive control (SSMPC)-based FTC technique is developed. Parallel-3LT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> Cs and their prediction models are introduced, followed by an SSMPC for the no-fault condition. The model inaccuracies under vertical switch faults are elaborated. For the faulty 3LT <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> C, two fault-tolerant SSMPC (FT-SSMPC) methods are provided by creating a sequential predictive controller that considers ZSCC suppression and grid current tracking. The control policies for the ZSCC are changed from the standard feedback-free to feedback-based cost function (CF) optimization using the unimproved FT-SSMPC. Furthermore, an improved FT-SSMPC is proposed using a phase-deficient CF, which increases the accuracy of the mathematical relation of the fault condition. After fault diagnosis, the proposed method achieves neutral-point voltage balance and excellent point-of-common-coupling current, effectively suppresses the ZSCC, and increases the control reliability. Finally, experiments demonstrate the effectiveness of the proposed FT-SSMPC under various conditions.