System-level Power Research Articles

Multichannel Sensor Array Design for Minimizing Detector Complexity and Power Consumption in Ionoacoustic Proton Beam Tomography

Ionoacoustic tomography exploits the acoustic signal generated by the fast energy deposition along the path of pulsed particle beams to reconstruct with sub-mm precision the dose deposition, with promising envisioned applications in hadron therapy treatment monitoring. State-of-the-art ionoacoustic detectors mainly rely on single-channel sensors and time-of-flight measurements to provide 1D localization of the maximum dose deposition at the so-called Bragg peak. This work investigates the design challenges of multichannel sensors for ionoacoustic tomography in terms of their ability to accurately reconstruct the dose deposition of a 200 MeV clinical proton beam, highlighting the impact of the number of channels in the array and their directivity. A complete acoustic model of the sensors and environment has been developed and used to find an optimum tradeoff between accuracy, evaluated numerically through the gamma index, and hardware complexity due to higher channel numbers, thus minimizing the system-level power consumption of the detector.

Advancements in VLSI low-power design: Strategies and optimization techniques

As production technology advances, integrated circuits are increasing in size, leading to a corresponding rise in power consumption if not properly optimized. Consequently, the optimization of integrated circuit power consumption has gained paramount significance. This paper provides an overview of the theoretical and research developments in Very Large Scale Integration (VLSI) low-power design. Initially, the paper delves into the components of VLSI power consumption, elucidating the origins of various power consumption types and the factors influencing their magnitude. Subsequently, existing power reduction technologies are examined, including transistor-level optimization, gate-level optimization, and system-level power optimization. The principles, applicable power consumption types, as well as their respective advantages and drawbacks are analysed. The paper also introduces methods for evaluating VLSI power consumption and summarizes the characteristics, advantages, and disadvantages of high-level power estimation and low-level power estimation. Ultimately, it underscores the importance of considering multiple power optimization strategies during VLSI design and discusses research approaches for achieving low power consumption. This comprehensive exploration contributes to the enhancement and optimization of VLSI design efforts.

System-Level Performance Degradation Prediction for Power Converters Based on SSA–Elman NN and Empirical Knowledge

The degradation of power converter perfor-mance is one of the most critical issues of complex system with the improvement of power capacity and density. Power converter bears severe electrical and thermal stress, resulting in an increase in the probability of failure and significant economic losses. Most research addresses performance evaluation either through reliability theory without physical understanding or through data-driven methods requiring high experimental cost. Few studies focus on predicting system-level performance degradation, which is technically difficult as many components degrade randomly. Identifying the parameters of electronic com-ponents based on sensor data has become possible with the development of neural networks and computational power. Therefore, this paper proposes a novel system-level power degradation predicting framework, which combines the advantages of neural networks in nonlinear fitting and empirical knowledge to predict the degradation of power converter. In addition, a comprehensive and improved feature parameter screening method is proposed to iden-tify the most critical feature parameters of the power con-verter systems. Furthermore, the neural network parameter identification method based on SSA-Elman NN (Sparrow Search Algorithm - Elman Neural Network) is introduced to improve prediction accuracy. Finally, the result shows that the proposed method can accurately predict the degrada-tion of the system by using a DC-DC converter as an ex-ample.

Power allocation scheme for grid interactive microgrid with hybrid energy storage system using model predictive control

Grid-interactive microgrids have become a promising alternative to traditional centralized power systems as a result of the rising demand for reliable and sustainable energy solutions. DC microgrids (MG) based upon renewable energy sources (RES) are on the rise due to high energy efficiency and compact size than the AC microgrids. Microgrid equipped with hybrid energy storage system is sensible for a reliable and stable power supply to the system. Implementation of a potent control system makes sure of the system stability. A model predictive control (MPC) based control strategy is proposed due to its easy implementation approach and inclusion nonlinear dynamics & constraints of the controlled system. An efficient power allocation scheme is developed in this paper for a grid-interactive photovoltaic microgrid featuring a hybrid energy storage system (HESS). The system-level power allocation scheme (PAS) considers the real-time data of load demands, generation, market energy cost, and energy storage state-of-charge to actively manage the power flow within the microgrid and also with the utility grid. The proposed control scheme uses a sophisticated model predictive current control for the DC/DC bi-directional converters control and model predictive combined power and voltage control is used for bidirectional interlink converter. The proposed control approach provides faster DC bus voltage recovery. The HESS consisting of battery and supercapacitor is used as energy buffers for responding to the fluctuation of power generation and demand for smoothing the PV power. The potency of the proposed controller is verified using MATLAB/Simulink (2021b) environment. Also, the real-time implementation of the proposed approach is carried out using the OPAL-RT OP4510 simulator.

Model-based, fully simulated, system-level power consumption estimation of IoT devices

Internet of things (IoT) gaining more importance due to its crucial role in pervasive computing and also Industry 4.0. Since the number of IoT devices is scaling up to multiple dozens of billions, the importance of energy efficiency is significantly increased. With the consideration of huge variety of IoT device hardware and software, a comprehensive model and estimation methodology on energy consumption is necessary as an enabler. IoT devices are also frequently updated, upgraded and maintained because of the evolving nature of the requirements and market demands. Each and every such operation has an effect on the power consumption and arose the necessity for a new energy consumption modeling and estimation. This process is applicable for development of IoT devices, as well as the maintenance phase. Since the variety of designs is unlimited, and battery capacity is usually fixed, or a cost factor, a generic, fully simulated, model-based energy consumption estimation of IoT devices is crucial. In this study, we aim to address this problem via proposing fully simulated, model-based, system-level power estimation approaches, as well as their success rate in typical real-life scenarios. It can be seen that the proposed methodology has high accuracy over %97. For the realization of the best-proposed approach, we used Open Virtual Platform (OVP) as an instruction set accurate simulator.

Structured Model Order Reduction of System-Level Power Delivery Networks

Structured Model Order Reduction of System-Level Power Delivery Networks

Impact of Stack Temperature on Solid Oxide Electrolysis System Operation for Lunar Production of Hydrogen and Oxygen Propellants

Solid oxide electrolysis (SOEC) systems have the potential to produce hydrogen and oxygen propellant from lunar ice found in the permanently shadowed cream on the moon. Because SOEC systems electrolyze steam instead of liquid water as in more conventional alkaline and proton-exchange membrane electrolysis systems, they require lower stack voltages for thermal-neutral operation (about 1.29 V/cell vs. 1.48 V/cell for liquid-fed cells) and thus can have lower stack specific energy as defined by stack power requirements per kg of hydrogen produced. However, at a system level, power requirements in a remote lunar setting for vaporizing the steam and flowing it through the stack increase system-level power demands such that the advantages of the SOEC system are reduced due to the balance of plant loads contributing as much as 20 to 25% of the system energy at 800 deg. C. Our team at Mines collaborated with our partners at OxEon Energy to demonstrate an SOEC system with a stack operating temperature of 800 deg. C that demonstrated an overall system-level specific energy just below 50 kWh electric per kg of hydrogen. That study and a supporting model validation study provided a basis for showing the viability for high-temperature SOEC to be scaled-up for lunar production of hydrogen and oxygen propellant for propulsion. The current study builds on that previous work by exploring the impact of SOEC stack temperature on both the stack and balance of plant power requirements. This study explores the trade-offs between reduced balance of plant parasitics and increased stack mass with lower SOEC operating temperatures and explores the advantages of higher conducting mixed-ionic-electronic conducting electrolytes with electron blocking layers to increase current densities at lower temperatures.This study was performed using stack and balance of plant models that have been calibrated in the lab-scale demonstration of an SOEC system with an electrically driven steam generator, a scroll-compressor for driving the steam flow, and cathode and anode exhaust recuperators for heat recovery to the stack inlet steam flow. The system also includes H2 drying from the SOEC cathode exhaust by heat exchange with the incoming water stream. The current study looks updates the previous model by replacing the compressor with a higher pressure steam generator and an expansion valve that allows the operation of the system without the parasitic loads of a compressor. In the current study, three different electrolytes traditional yttrium-stabilized zirconia (YSZ), higher conductivity scandium-stabilized zirconia (ScSZ), and mixed ionic-electronic conducting gadolinium-doped ceria (GDC) with a YSZ blocking layer. The GDC bilayer electrolyte cells have the highest conductivity and allow for reasonable hydrogen production at operating temperatures below 700 deg. C. The results show that the lower operating temperatures enabled by the GDC bilayer electrolyte and by the ScSZ electrolytes not only reduce the system mass with smaller heat exchangers and thermal insulation, but also lower requirements for steam generation by enabling more heat recovery in the steam generator. The impact of stack operating temperatures on the feasibility of scaling up a lunar-deployed SOEC system to produce more than 1 kg/h are presented to further emphasize the feasibility of SOEC systems as part of a lunar propellant production facility.

Low-Complexity Double-Node-Upset Resilient Latch Design Using Novel Stacked Cross-Coupled Elements

With aggressive scaling down in integrated circuit technology, the design of double-node-upset (DNU)-resilient latches have become a major issue regarding radiation hardening by design (RHBD). The conventional DNU-resilient latches are mostly based on the Muller C-element (MCE) and the dual-interlocked storage cell (DICE) element, which exhibit severe limitations: charge sharing during the read operation at a system level and large power consumption. Overcoming these limitations, this brief proposes a DNU-resilient latch based on a novel latch element. The proposed latch fully exploits upset polarity awareness, achieving the maximum number of single-event upset (SEU)-insensitive nodes. We develop a novel double modular redundancy architecture for the DNU-resilient latch design with one SEU-immune module. Based on simulation results, the proposed latch achieves up to 27.6X average power-delay-area-product (PDAP) improvement over state-of-the-art DNU-resilient latches.

Power Management of Renewable-Grid Integrated Smart e-Mobility System for Light Electric Vehicles

This work proposes an architecture that integrates renewable energy sources or photovoltaic (PV) systems with the dc-link of utility and acts as primary and secondary energy sources to the electric vehicle (EV) load. The proposed architecture contains the dc-link cascaded single-stage conventional H-bridge, which superimposes a dual boost interleaved (DBI) topology with a series-series resonant (SSR) converter system. Further, the SSR side contains a wireless charging system followed by the diode bridge rectifier and a Li-ion battery as an EV load. It is challenging to integrate the above system with reduced power stages. Moreover, achieving power control in an integrated single-stage system makes it more complex. Therefore, this work includes a fundamental operation and analysis of the proposed architecture. A system-level power management scheme is also provided to control the proposed system. This power management scheme includes four basic power modes that comply with different system conditions during its operation. Furthermore, the essential of the power management scheme is to ensure that the utility should support the charging structure during excess or shortage of power flow between PV and EV load. Finally, the proposed architecture has been validated using MATLAB simulation and a 1.2kW hardware prototype.

Chip Level Thermal Performance Measurements in Two-Phase Immersion Cooling

Abstract Two-phase immersion cooling (2PIC) has been proposed as a means of economically increasing overall energy efficiency while accommodating increased chip powers and system-level power density. Designers unfamiliar with Two-phase immersion technology may be unaware of the chip-level thermal performance capabilities of the technology. This performance, in the case of a lidded processor, is quantified as a case-to-fluid thermal resistance, Rcf. This work made use of boiler assemblies comprised of copper plates to which two porous metallic boiling enhancement coatings (BECs) had been applied. These boiler assemblies were applied with conventional thermal grease to a thermal test vehicle (TTV) emulating the Skylake series of 8th Gen Intel® Xeon® CPUs and a thermal test slug (TTS) emulating the Advanced Micro Devices, Inc. (AMD) EPYCTM processors. Both were tested in saturated 3MTM FluorinertTM FC-3284 fluid. The lowest Rcf = 0.020 °C/W was achieved on the TTS at 350 W. The paper also includes additional TTS data gathered with different boiler assemblies and Thermal Interface Materials as well as field data in the form of Rcf or junction-to-fluid thermal resistances, Rjf, for different live silicon chips.

Microfluidic silicon interposer for thermal management of GaN device integration

With the popularity of the third generation semiconductor applications, silicon-based hetero-integration is driven to be applied massively by the miniaturization of microsystems and modules. The system-level power has a sharp increase in recent years, and consequently, hotspot thermal management is being increasingly concerned. A high-power GaN device with chip heat fluxes > 500 W/cm2 and hotspot heat fluxes > 30 kW/cm2 is implemented in this work to study extremely uneven hotspot cooling for silicon-based hetero-integration. A customized microjet silicon interposer (SI) is designed and fabricated based on the on-chip hotspot distribution, and another common microchannel SI in similar sizes is prepared for comparison. The GaN device is integrated on SI and micro-assembled in a test cube. The measurement results demonstrate that the maximum junction temperature of the GaN device on microjet SI is down to 150.3 ℃ at 70 ℃ ambient temperature with a pressure drop of 231.9 kPa. The overall thermal resistance (TR) of the test vehicle with microjet cooling has a 7.11 ∼ 7.72 % reduction and its heat transfer coefficient (HTC) increases by 12.3 ∼ 28.3 % compared to that with microchannel cooling with the pumping power of 0.5 ∼ 1.5 W. The material properties of the GaN chip and SI are extracted from the measurement results and then used in the analysis of the thermal and hydraulic properties of both microfluidic SIs numerically. Their cooling performance and efficiency are evaluated and compared based on the performance evaluation criteria (PEC), field synergy number and entropy generation rate. According to the evaluation results, while the PEC of microjet and microchannel SIs increases with the pumping power, the microjet SI can contribute to the enhancement of the synergetic relationship between the flow and temperature fields and reduction of total irreversibility in the heat transfer process compared to the microchannel SI in pursuit of low overall TR. The field synergy number improves by 90.40 % and the argument entropy generation rate is 0.376 when the overall TR is 1.35 K/W. The findings can provide valuable references for hotspot thermal management in silicon-based hetero-integration.

Performance Evaluation of Different Topologies of SRAM and SRAM Memory Array Design at 180nm Technology

Memory circuits such as static random-access memory (SRAM) and dynamic random-access memory (DRAM) form an integral part of system design and contribute significantly to system-level power consumption. Memory operating speeds and power dissipation have become important parameters due to the explosive growth of battery-operated appliances and the increased integration of circuits Hence SRAMs with different topologies are examined in terms of parameters like propagation delay, Static Noise Margin (SNM), corner analysis, and static power dissipation by simulating using versatile tool cadence virtuoso at 180nm technology. Besides, topological performance comparison, the SRAM memory array has also been illustrated from 2×2, 4×4 to 8×8, thereby verifying the read and write modes of operation of SRAM.

Next-Generation Cryo-Electric Hydrogen-Powered Aviation: A Disruptive Superconducting Propulsion System Cooled by Onboard Cryogenic Fuels

The idea of hydrogen (H <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> )-powered airplanes has recently attracted a revitalized push in the aviation sector to combat carbon dioxide (CO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) emissions. However, to also reduce, or even eliminate, non-CO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> emissions and contrails, the combination of H <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> with all-electric solutions is undoubtedly the best option. This article explores the next wave of disruptive technological developments needed to scale up zero-emission aviation beyond 2035. With respect to conventional electrical propulsion, major breakthroughs will be needed in terms of reducing the voltage level while increasing system-level power density and overall efficiency. We show how a next-generation H <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -powered aircraft could take advantage of onboard cryogenic fuels to cool the electrical components, enabling a cryo-electric superconducting drivetrain that could lead to extraordinary performance.

Data-Driven wind turbine performance assessment and quantification using SCADA data and field measurements

Quantifying a wind turbine’s holistic, system-level power production efficiency in its commercial operating condition is one of the keys to reducing the levelized cost for energy of wind energy and thus contributing significantly to the Sustainable Development Goal 7.2: “By 2030, increase substantially the share of renewable energy in the global energy mix.” It is so important because designers and operators need an effective baseline quantification in order to be able to identify best practices or make operation and maintenance decisions that produce actual improvements. However, this task is highly challenging due to the stochastic nature of the wind and the complexity of wind turbine systems. It is imperative to carry out accurate, trust-worthy performance assessment and uncertainty quantification of wind turbine generators. This article provides a concise overview of the existing schools of thought in terms of wind turbine performance assessment and highlights a few important technical considerations for future research pursuit.

Rotating neurons for all-analog implementation of cyclic reservoir computing

Hardware implementation in resource-efficient reservoir computing is of great interest for neuromorphic engineering. Recently, various devices have been explored to implement hardware-based reservoirs. However, most studies were mainly focused on the reservoir layer, whereas an end-to-end reservoir architecture has yet to be developed. Here, we propose a versatile method for implementing cyclic reservoirs using rotating elements integrated with signal-driven dynamic neurons, whose equivalence to standard cyclic reservoir algorithm is mathematically proven. Simulations show that the rotating neuron reservoir achieves record-low errors in a nonlinear system approximation benchmark. Furthermore, a hardware prototype was developed for near-sensor computing, chaotic time-series prediction and handwriting classification. By integrating a memristor array as a fully-connected output layer, the all-analog reservoir computing system achieves 94.0% accuracy, while simulation shows >1000× lower system-level power than prior works. Therefore, our work demonstrates an elegant rotation-based architecture that explores hardware physics as computational resources for high-performance reservoir computing.

ANNet: A Lightweight Neural Network for ECG Anomaly Detection in IoT Edge Sensors.

In this paper, we propose a lightweight neural network for real-time electrocardiogram (ECG) anomaly detection and system level power reduction of wearable Internet of Things (IoT) Edge sensors. The proposed network utilizes a novel hybrid architecture consisting of Long Short Term Memory (LSTM) cells and Multi-Layer Perceptrons (MLP). The LSTM block takes a sequence of coefficients representing the morphology of ECG beats while the MLP input layer is fed with features derived from instantaneous heart rate. Simultaneous training of the blocks pushes the overall network to learn distinct features complementing each other for making decisions. The network was evaluated in terms of accuracy, computational complexity, and power consumption using data from the MIT-BIH arrhythmia database. To address the class imbalance in the dataset, we augmented the dataset using SMOTE algorithm for network training. The network achieved an average classification accuracy of 97% across several records in the database. Further, the network was mapped to a fixed point model, retrained in a bit accurate fixed-point environment to compensate for the quantization error, and ported to an ARM Cortex M4 based embedded platform. In laboratory testing, the overall system was successfully demonstrated, and a significant saving of ≅ 50% power was achieved by gating the wireless transmission using the classifier. Wireless transmission was enabled only to transmit the beats deemed anomalous by the classifier. The proposed technique compares favourably with current methods in terms of computational complexity and has the advantage of stand-alone operation in the edge node, without the need for always-on wireless connectivity making it ideal for IoT wearable devices.

A Novel Short-Term Residential Electric Load Forecasting Method Based on Adaptive Load Aggregation and Deep Learning Algorithms

Short-term residential load forecasting is the precondition of the day-ahead and intra-day scheduling strategy of the household microgrid. Existing short-term electric load forecasting methods are mainly used to obtain regional power load for system-level power dispatch. Due to the high volatility, strong randomness, and weak regularity of the residential load of a single household, the mean absolute percentage error (MAPE) of the traditional methods forecasting results would be too big to be used for home energy management. With the increase in the total number of households, the aggregated load becomes more and more stable, and the cyclical pattern of the aggregated load becomes more and more distinct. In the meantime, the maximum daily load does not increase linearly with the increase in households in a small area. Therefore, in our proposed short-term residential load forecasting method, an optimal number of households would be selected adaptively, and the total aggregated residential load of the selected households is used for load prediction. In addition, ordering points to identify the clustering structure (OPTICS) algorithm are also selected to cluster households with similar power consumption patterns adaptively. It can be used to enhance the periodic regularity of the aggregated load in alternative. The aggregated residential load and encoded external factors are then used to predict the load in the next half an hour. The long short-term memory (LSTM) deep learning algorithm is used in the prediction because of its inherited ability to maintain historical data regularity in the forecasting process. The experimental data have verified the effectiveness and accuracy of our proposed method.

Formal Verification of System-Level Power Management Architecture in Modern Processors

Formal Verification of System-Level Power Management Architecture in Modern Processors

A Multiport Bidirectional DC–DC Converter for Hybrid Renewable Energy System Integration

The bidirectional power flow in most of the existing four-port converters is achieved on the battery port located on the low voltage side, i.e., the battery is charged by the energy sources and discharged to the dc link on the high voltage side. The lack of the bidirectional power flow at the dc link prevents them from managing the power at the system level. In this article, a bidirectional four-port dc-dc converter is proposed for the integration of the hybrid renewable energy system to a dc microgrid. The proposed converter uses the least number of devices compared with the existing bidirectional multiport converters. The bidirectional battery and the dc-link ports make it a good candidate for the dc-microgrid application in which the system-level power management is desired. The working principle of the converter is first analyzed, and the power transferred by the transformer and the zero-voltage switching (ZVS) conditions are derived. Then, the converter is designed to meet the requirements of the power rating and soft switching. The proposed converter is used to interface a wind turbine, a photovoltaic panel, a battery bank, and the dc microgrid. The experiments are carried to testify the performance in both steady state and the transient. The steady-state waveforms have validated the power relationship as well as the critical ZVS conditions while maintaining relatively high efficiency. The transient testing results show that the converter can switch from one scenario to another under the different conditions. This article is accompanied by a video demonstrating the converter in the real-time operation.

Bi-Objective Optimization of Data-Parallel Applications on Heterogeneous HPC Platforms for Performance and Energy Through Workload Distribution

Performance and energy are the two most important objectives for optimization on modern parallel platforms. In this article, we show that moving from single-objective optimization for performance or energy to their bi-objective optimization on heterogeneous processors results in a tremendous increase in the number of optimal solutions (workload distributions) even for the simple case of linear performance and energy profiles. We then study full performance and energy profiles of two real-life data-parallel applications and find that they exhibit shapes that are non-linear and complex enough to prevent good approximation of them as analytical functions for input to exact algorithms or optimization software for determining the Pareto front. We, therefore, propose a solution method solving the bi-objective optimization problem on heterogeneous processors. The method's novel component is an efficient and exact global optimization algorithm that takes as an input performance and energy profiles as arbitrary discrete functions of workload size, which accurately and realistically take into account resource contention and NUMA inherent in modern parallel platforms, and returns the Pareto-optimal solutions (generally speaking, load imbalanced). To construct the input discrete energy functions, the method employs a methodology that accurately models the energy consumption by a hybrid data-parallel application executing on a heterogeneous HPC platform containing different computing devices using system-level power measurements provided by power meters. We experimentally analyse the proposed solution method using three data-parallel applications, matrix multiplication, 2D fast Fourier transform (2D-FFT), and gene sequencing, on two connected heterogeneous servers consisting of multicore CPUs, GPUs, and Intel Xeon Phi. We show that it determines a superior Pareto front containing the best load balanced solutions and all the load imbalanced solutions that are ignored by load balancing methods.