Synchronous MOSFETs Research Articles

Soft switching high step-down series-capacitor based converter with coupled-inductor technique

High voltage step-down converters are very popular in distributed power systems, voltage regular modules, automatic vehicles, etc. To avoid extreme duty cycles, a series capacitor-based buck converter with a coupled inductor is proposed in this paper. In this converter, the voltage stresses of the power switches are clamped to half of the input voltage. Thus, low voltage rating MOSFETs with a low Rds,on could be utilized to improve the performance of the proposed converter. Moreover, synchronous MOSFETs are also used to reduce the conduction losses of the switches. Zero voltage switching (ZVS) for the main power switches is achieved using the coupled-inductor technique. In addition, through adding a bypass flowing path, a negative current is established to guarantee the ZVS condition of the power switches. The operating principle of the proposed converter is described in this paper, and the DC voltage gain ratio, automatic current sharing, soft switching condition and design guideline of the critical parameters are also given. Finally, experimental results obtained from a 60 V/200 W prototype are presented to verify the analysis of the proposed converter.

Adaptive Hybrid Primary/Secondary-Side Digital Control for Series Resonant DC–DC Converters in 48 V VR Applications

In this paper, a current sensorless adaptive secondary-side control is proposed for the series resonant converter (SRC), making it a good candidate for MHz 48 voltage regulators. By means of varying ac equivalent resistance, the output voltage regulation is achieved by controlling the duty cycle of the synchronous MOSFET. By taking advantage of the secondary-side control, SRCs can operate under zero-voltage switching at any input voltage and load conditions. A current sensorless adaptive digital control is proposed to control the current-type synchronous MOSFETs, which automatically compensates the delay caused by the current-sensor circuit and the gate driver, and also eliminates the current sensor in the power path. A hybrid control strategy is introduced to overcome the efficiency degradation caused by the secondary-side control.

Impact of Parasitic Elements on the Spurious Triggering Pulse in Synchronous Buck Converter

This paper derives a circuit-level analytical model for describing the mechanism of the spurious triggering pulse in the gate-source voltage of the synchronous MOSFET (SyncFET) in the synchronous buck converter. The model takes into account not only the parasitic capacitances and inductances of the control MOSFET (CtrlFET) and the SyncFET, but also the reverse recovery characteristics of the body diode of the SyncFET. An exhaustive investigation into the impact of all these factors on the spurious triggering pulse is conducted. The spurious triggering pulse can be attributed to two factors. The first one is the positive gate voltage caused by the displacement current through the gate-drain capacitance of the SyncFET, due to the increase in the drain-source voltage. The second one is the negative source voltage caused by the voltage drop across the source inductance of the SyncFET, due to the decrease in the drain current. It is discovered that the gate impedance of the SyncFET would exert different influence on the magnitude of the spurious triggering pulse, depending on the contributions of these two factors. Experimental results affirm that variation in the magnitude of the spurious triggering pulse with each parasitic element can be correctly inferred by the proposed model. Design guidelines for enhancing spurious turn-on immunity are advanced.

A Synchronous Buck Converter Using a New Predictive Analog Dead-Time Control Circuit to Improve Efficiency

The one-step predictive dead-time control circuit proposed in this paper consists of a dead-time detection circuit and an analog optimization circuit. The detection circuit, which can be manufactured on the same die as the synchronous MOSFET of the buck converter, provides an accurate detection signal that indicates body diode conduction. The proposed dead-time optimization circuit is an analog circuit, which uses the body diode detection signal and eliminates the shortcomings of digital dead-time detection circuits. Operation of the circuit is verified using PSIM. The results of the simulation show that the circuit reduces the body diode conduction time of the synchronous MOSFET to less than 4 ns at 20-A load, 12-V input, 1.2-V output, and 500-kHz switching frequency. As a result, the buck converter conduction losses can be reduced by 16.3%.

Performance Analysis of Trench Power MOSFETs in High-Frequency Synchronous Buck Converter Applications

This paper investigates the performance perspectives and theoretical limitations of trench power MOSFETs in synchronous rectifier buck converters operating in the MHz frequency range. Several trench MOSFET technologies are studied using a mixed-mode device/circuit modeling approach. Individual power loss contributions from the control and synchronous MOSFETs, and their dependence on switching frequency between 500 kHz and 5 MHz are discussed in detail. It is observed that the conduction loss contribution decreases from 40% to 4% while the switching loss contribution increases from 60% to 96% as the switching frequency increases from 500 KHz to 5 MHz. Beyond 1 MHz frequency there is no obvious benefit to increase the die size of either SyncFET or CtrlFET. The RDS(ON)×QG figure of merit (FOM) still correlates well to the overall converter efficiency in the MHz frequency range. The efficiency of the hard switching buck topology is limited to 80% at 2 MHz and 65% at 5 MHz even with the most advanced trench MOSFET technologies.