Synchronous Counterparts Research Articles

Cost and Efficiency analysis of the Secondary electric machine in a CRAFT wind turbine

Abstract Floating offshore wind turbines are ideal for deeper waters, providing access to stronger and more stable winds. The Counter-Rotating Axis Floating Tilting (CRAFT) turbine features a unique design with two counter-rotating turbines on a tilted vertical shaft and two independent electrical machines submerged below sea level. The primary generator, connected to both turbines, includes counter-rotation which doubles the relative torque, while the secondary machine controls the upper turbine. This study examines the impact of primary and secondary machine efficiency on electricity generation. The findings indicate that the primary generator’s efficiency is crucial for system stability, whereas the secondary machine’s efficiency is less critical. Reducing the secondary machine’s efficiency from 97% to 83% resulted in a 0.1% reduction in annual electricity generation. Despite the asynchronous machine’s lower efficiency, it is the economically favorable choice as the secondary machine over its synchronous counterpart due to its reduced design complexity and lower magnet costs, leading to lower overall expenses. Future research investigate how turbulent flow effects and airflow interactions between the turbines influences the model. Incorporating the cooling factor, a more comprehensive cost model and a refined dynamic stall model will also further improve the simulation’s accuracy and robustness.

Asynchronous ADMM for nonlinear continuous‐time systems

AbstractThis paper presents synchronous as well as asynchronous formulations of the alternating direction method of multipliers (ADMM) for solving continuous‐time nonlinear distributed model predictive control (DMPC) problems. It is shown that the optimal control problems of certain system classes can be transformed to fit the consensus‐based ADMM variant problem formulation. The arising subproblems are solved locally on the agent level while the consensus step is solved centrally by a coordinator. Furthermore, the convergence of the synchronous and asynchronous ADMM algorithms to their respective first‐order optimality conditions is presented in a continuous‐time setting. The algorithm is applied to different example systems for which the convergence behavior and influence of the individual algorithmic parameters are investigated. The computation time of the agents remains unaffected by the system size and thus demonstrates the applicability to high‐scaled systems. Moreover, results show that the asynchronous algorithm performs better in terms of execution time when compared to its synchronous counterpart.

A Scalable Formal Framework for the Verification and Vulnerability Analysis of Redundancy-Based Error-Resilient Null Convention Logic Asynchronous Circuits

The increasing demand for high-speed, energy-efficient, and miniaturized electronics has led to significant challenges and compromises in the domain of conventional clock-based digital designs, most notably reduced circuit reliability, particularly in mission-critical hardware. At scaled technology nodes, devices are vulnerable to transient or soft errors, such as Single Event Upset (SEU) and Single Event Latch-up (SEL). External radiation, internal electromagnetic interference (EMI), or noise are the primary sources of these errors, which can compromise the circuit functionality. In response to these challenges, the Quasi-Delay-Insensitive (QDI) Null Convention Logic (NCL) asynchronous design paradigm has emerged as a promising alternative, offering advantages such as ultra-low power performance, reduced noise and EMI, and resilience to process, voltage, and temperature variations. Moreover, its unique architecture and insensitivity to timing variations offers a degree of resistance against transient errors; however, it is not entirely resilient. Several resiliency schemes are available to detect and mitigate soft errors in QDI circuits, with approaches based on redundancy proving to be the most effective in ensuring complete resilience across all major QDI implementation paradigms, including NCL, Pre-charge/Weak-charge Half Buffers (PCHB/WCHB), and Sleep Convention Logic (SCL). This research focuses on one such redundancy-based resiliency scheme for QDI NCL circuits, known as the dual-modular redundancy-based NCL (DMR-NCL) architecture, and addresses the absence of formal methods for the verification and analysis of such circuits. A novel methodology has been proposed for formally verifying the correctness of DMR-NCL circuits synthesized from their synchronous counterparts, covering both safety (functional correctness) and liveness (the absence of deadlock). In addition, this research introduces a formal framework for the vulnerability analysis of DMR-NCL circuits against SEU/SEL. To demonstrate the framework’s efficacy and scalability, a prototype computer-aided support tool has been developed, which verifies and analyzes multiple DMR-NCL benchmark circuits of varying sizes and complexities.

Fault-tolerant selt-timed circuits

The article considers the problem of developing synchronous and self-timed (ST) circuits that are tolerant to faults. Redundant ST coding and two-phase discipline ensures that ST circuits are more soft error tolerant than synchronous counterparts. Duplicating ST channels instead of tripling reduces the fault-tolerant ST circuits’ redundancy and retains their reliability level compared to synchronous counterparts.

Asynchronous photonic time-delay reservoir computing.

Time-delay reservoir computing uses a nonlinear node associated with a feedback loop to construct a large number of virtual neurons in the neural network. The clock cycle of the computing network is usually synchronous with the delay time of the feedback loop, which substantially constrains the flexibility of hardware implementations. This work shows an asynchronous reservoir computing network based on a semiconductor laser with an optical feedback loop, where the clock cycle (20 ns) is considerably different to the delay time (77 ns). The performance of this asynchronous network is experimentally investigated under various operation conditions. It is proved that the asynchronous reservoir computing shows highly competitive performance on the prediction task of Santa Fe chaotic time series, in comparison with the synchronous counterparts.

On the convergence analysis of asynchronous SGD for solving consistent linear systems

Parallel and distributed stochastic algorithms have drawn significant attention in the realm of big data and machine learning. While the synchronous versions of these algorithms are well understood in terms of their convergence, the convergence analyses of their asynchronous counterparts are not widely studied. In this paper, we propose and analyze a distributed, asynchronous parallel algorithm to solve an arbitrary, consistent linear system by reformulating the system into a stochastic optimization problem as Richtárik and Takác̃ in [1]. We compare the convergence rates of our asynchronous algorithm with the synchronous parallel algorithm proposed by Richtárik and Takáč in [1] under different choices of the hyperparameters—the stepsize, the damping factor, the number of processors, and the delay factor. We show that our asynchronous parallel algorithm enjoys a global linear convergence rate, similar to the synchronous parallel algorithm in [1] under the same setup. We also show that our asynchronous algorithm improves upon the synchronous algorithm in [1] with a better convergence rate when the number of processors is larger than four. Furthermore, our asynchronous parallel algorithm performs asymptotically better than its synchronous counterpart for certain linear systems. Finally, we compute the minimum number of processors required for those systems for which our asynchronous algorithm is better and find that this number can be as low as two for some ill-conditioned problems.

Asynchronous Multi-User Detection for Code-Domain NOMA: Expectation Propagation Over 3D Factor-Graph

Code-domain non-orthogonal multiple access (NOMA) is a promising technology to achieve ubiquitous massive connections for 5G and beyond. In application scenarios with high channel dynamics or simplified scheduling procedures, multi-user signals face the difficulty of accurate synchronization. The resulted asynchronous inter-user interference (IUI) is too complex to be modeled or alleviated by conventional multi-user detection algorithms. To effectively characterize the asynchronous IUI for code-domain NOMA, this paper constructs a three-dimensional (3D) factor-graph by introducing time delay as an additional dimension and develops the corresponding message passing mechanisms. Then, a novel 3D-expectation propagation algorithm (3D-EPA) is proposed for low-complexity asynchronous multi-user detection. The proposed 3D-EPA iterates between per-user estimation, which projects the asynchronous interference via Gaussian approximation, and inter-user message passing, which propagates the previous estimates among the users to refine the approximation. We also extend the 3D-EPA to multi-antenna scenarios and analyze its state evolution. Simulation results show that the proposed asynchronous NOMA system with 3D-EPA even outperforms its synchronous counterpart, especially under high overloadings.

An Asynchronous Bundled-Data Template With Current Sensing Completion Detection Technique

An asynchronous circuit design paradigm can address the increasing energy efficiency and speed demands of portable electronic devices. However, designing a low-cost event-driven asynchronous circuitry is a challenging task. In this brief, we propose a novel asynchronous bundled-data event-driven template created by using the current sensing completion detection (CSCD) technique. The proposed template has the advantages of the cost-efficient characteristics of bundled-data circuits without suffering the disadvantages of PVT-sensitive matching delay cells. An asynchronous RISC-V processor was designed and thoroughly compared with its synchronous counterpart and the popular RISC-V cores to validate the effectiveness of the proposed template. The asynchronous processor delivers the same performance as the synchronous counterpart while consuming only 80.09% of the power. Alternatively, the asynchronous processor achieves a 1.32x speedup under the same power consumption. In addition, the asynchronous processor leverages 1.48x-3.23x energy efficiency against the other popular RISC-V cores.

Linear Permanent Magnet Vernier Generators for Wave Energy Applications: Analysis, Challenges, and Opportunities

Harvesting energy from waves as a substantial resource of renewable energy has attracted much attention in recent years. Linear permanent magnet vernier generators (LPMVGs) have been widely adopted in wave energy applications to extract clean energy from oceans. Linear PM vernier machines perform based on the magnetic gearing effect, allowing them to offer high power/force density at low speeds. The outstanding feature of providing high power capability makes linear vernier generators more advantageous compared to linear PM synchronous counterparts used in wave energy conversion systems. Nevertheless, they inherently suffer from a poor power factor arising from their considerable leakage flux. Various structures and methods have been introduced to enhance their performance and improve their low power factor. In this work, a comparative study of different structures, distinguishable concepts, and operation principles of linear PM vernier machines is presented. Furthermore, recent advancements and innovative improvements have been investigated. They are categorized and evaluated to provide a comprehensive insight into the exploitation of linear vernier generators in wave energy extracting systems. Finally, some significant structures of linear PM vernier generators are modeled using two-dimensional finite element analysis (2D-FEA) to compare their electromagnetic characteristics and survey their performance.

Patients with Metachronous Peritoneal Metastatic Mucinous Colorectal Adenocarcinoma Benefit More from Cytoreductive Surgery (CRS) and Hyperthermic Intraperitoneal Chemotherapy (HIPEC) than Their Synchronous Counterparts

Simple SummaryMucinous adenocarcinoma develops in 10–20% of all colorectal cancer (CRC) cases. This subtype is characterized by its worse clinicopathological features, including but not limited to more advanced stages at the time of tumor diagnosis, it being more frequent in the proximal colon, it showing mutation more frequently in CRC-specific protooncogenes, and its impaired response rate to various oncological treatments. Although several studies have investigated the benefits of cytoreductive surgery with hyperthermic intraperitoneal chemotherapy (CRS + HIPEC) in peritoneal metastatic CRC, limited data exist on the effect of mucinous CRC. Therefore, a retrospective study was conducted, and the following novel results were obtained. CRS + HIPEC is advantageous for both mucinous and non-mucinous CRC in metachronous cases, but the same cannot be said for those patients with synchronous metastases: the survival of mucinous CRC patients with synchronous peritoneal metastases was significantly worse despite the use of CRS + HPEC treatment.Background: Mucinous adenocarcinoma is a frequent subtype in colorectal cancer (CRC). A higher initial T-stage, poorer differentiation, worse response to anti-tumor therapies, and shorter survival are characteristic of mucinous CRC. Moreover, the therapeutic benefit of cytoreductive surgery with hyperthermic intraperitoneal chemotherapy (CRS + HIPEC) in mucinous CRC has not been significantly investigated. Methods: A retrospective analysis of 218 CRC patients with synchronous or metachronous peritoneal metastases was conducted. Results: 129 and 89 patients had synchronous and metachronous metastases, and 36 (27.8%) and 22 (24.8%) of these were mucinous CRC, respectively. Mucinous CRC was more frequent in the proximal colon, with a higher T-stage and N-stage and with an average peritoneal carcinomatosis index that was 2 values higher. Disease-specific survival was significantly worse in the synchronous mucinous group (median survival: 22.4 months vs. 36.3 months, p = 0.0229). In contrast, no such difference was observed in the metachronous cohort (32.6 months vs. 34.4 months, p = 0.6490). Conclusions: In the case of synchronous peritoneal metastases originating from mucinous CRC, the positive effect of CRS+HIPEC cannot be verified, and the added value of this highly invasive treatment is therefore somewhat questioned. However, CRS + HIPEC is recommended for metachronous metastases, since no difference between the two CRC-subtypes could be verified.

A Minimal Buffer Router with Level Encoded Dual Rail-Based Design of Network-on-Chip Architecture

Asynchronous NOCs are most prominent in present SOC designs, due to their low dynamic power consumption, modularity, heterogeneous nature, and robustness to the process variations. Though asynchronous designs are proved efficient over synchronous counterparts, they have some severe drawbacks when area and speed are considered, due to complex handshake control circuits which increase the static power loss. Quasidelay insensitive (QDI) class of asynchronous NOCs based on 2-phase encoding is proved beneficial for speed and throughput enhancement but with complex design. The work has introduced lightweight minimal buffer router based on LEDR encoding to design a low power, high speed with compact NOC architecture. Then, minimal buffer router with FSM-based arbiter and priority assigner block is designed to enhance the speed, power, and area. This proposed work achieves zero dynamic power consumption with a total power consumption of less than 0.082 W with a router latency of 0.8 ns.

Distributed Stochastic Inertial-Accelerated Methods with Delayed Derivatives for Nonconvex Problems

Stochastic gradient methods (SGMs) are predominant approaches for solving stochastic optimization. On smooth nonconvex problems, a few acceleration techniques have been applied to improve the convergence rate of SGMs. However, little exploration has been made on applying a certain acceleration technique to a stochastic subgradient method (SsGM) for nonsmooth nonconvex problems. In addition, few efforts have been made to analyze an (accelerated) SsGM with delayed derivatives. The information delay naturally happens in a distributed system, where computing workers do not coordinate with each other. In this paper, we propose an inertial proximal SsGM for solving nonsmooth nonconvex stochastic optimization problems. The proposed method can have guaranteed convergence even with delayed derivative information in a distributed environment. Convergence rate results are established for three classes of nonconvex problems: weakly convex nonsmooth problems with a convex regularizer, composite nonconvex problems with a nonsmooth convex regularizer, and smooth nonconvex problems. For each problem class, the convergence rate is $O(1/K^{\frac{1}{2}})$ in the expected value of the gradient norm square, for $K$ iterations. In a distributed environment, the convergence rate of the proposed method will be slowed down by the information delay. Nevertheless, the slow-down effect will decay with the number of iterations for the latter two problem classes. We test the proposed method on three applications. The numerical results clearly demonstrate the advantages of using the inertial-based acceleration. Furthermore, we observe higher parallelization speed-up in asynchronous updates over the synchronous counterpart, though the former uses delayed derivatives. Our source code is available at https://github.com/RPI-OPT/Inertial-SsGM.

An Asynchronous Bundled-Data Barrel Shifter Design That Incorporates a Deterministic Completion Detection Technique

A design for an asynchronous bundled-data barrel shifter that incorporates a deterministic completion detection circuitry is proposed. A bundled-data asynchronous circuit is inherently free from challenges associated with clock signals, but it is devoid of information pertaining to propagation delay through the circuit. An obvious solution is to produce the acknowledge signal at least <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\delta $ </tex-math></inline-formula> delay units after the arrival of the request signal, where <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\delta $ </tex-math></inline-formula> is the maximum propagation delay through the circuit. However, similar to synchronous circuits, such bundle-data asynchronous approach does not take advantage of times where the propagation delay through the circuit is less than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\delta $ </tex-math></inline-formula> . This brief proposes a design for a deterministic completion detection scheme for an asynchronous bundled-data barrel shifter. Once the request signal is active, the shifting operation begins, and the acknowledge signal is generated after a delay that matches the actual shifting delay associated with the shift amount using a deterministic completion detection scheme. The shifter can reduce the idle time between the time its output is ready and the start of the next shift cycle by using a deterministic completion detection circuit. In this brief, the proposed design of the asynchronous barrel shifter and its average delay is analyzed. Its performance is also compared against its synchronous counterpart.

Failure-tolerant synchronous and self-timed circuits comparison

The article considers the problem of developing synchronous and self-timed (ST) digital circuits that are tolerant to soft errors. Synchronous circuits traditionally use the 2-of-3 voting principle to ensure single failure, resulting in three times the hardware costs. In ST circuits, due to dual-rail signal coding and two-phase control, even duplication provides a soft error tolerance level 2.1 to 3.5 times higher than the triple modular redundant synchronous counterpart. The development of new high-precision software simulating microelectronic failure mechanisms will provide more accurate estimates for the electronic circuits’ failure tolerance.

Design and Implementation of Asynchronous Processor on FPGA

Low-power and fault-tolerant features for microprocessors have been recognized as two of the greatest concerns in applications for edge devices. In this study, we propose asynchronous circuit design techniques for field-programmable gate arrays (FPGA) that can fundamentally overcome the drawbacks of conventional synchronous circuit designs. We used commercial FPGAs and implemented an asynchronous MSP430 microprocessor using the proposed technique. We also introduce an interfacing architecture between the synchronous block memory and asynchronous core to support the congeniality of the commercial embedded processor and the asynchronous core. Furthermore, we analyze a compiler for MSP430 and adapt its result to achieve a high-level development environment for asynchronous MSP430. The experimental results showed that the asynchronous MSP430 consumes 62.3% less power than its synchronous counterpart and has significant fault tolerance compared to the synchronous MSP430 under unstable supply voltage conditions. Additionally, the asynchronous MSP430 emitted 13% less electromagnetic noise at the working frequency.

Global differences in applicant reactions to virtual interview synchronicity

Advances in employment assessment technology have increasingly enabled employers to recruit from around the world by allowing interviewees to respond to live or pre-recorded video or text prompts live or via asynchronous video recordings. Despite their greater scheduling convenience, asynchronous virtual interviews decrease applicants’ ability to engage in impression management and relationship building and therefore may negatively impact applicant reactions compared to their synchronous counterparts. Further, national culture has the potential to influence reactions to virtual interview synchronicity. Previous research has yielded mixed results, with some studies suggesting that culture can moderate how applicants react to selection tests and some finding little or no effect. Drawing from applicant reactions and media richness theories, we integrate Hofstede’s cultural dimensions to investigate the role of national culture in applicant reactions to virtual interview synchronicity in a sample of 644,905 virtual interviewees from 46 countries. Overall, our findings demonstrate that, though they rated both highly, interviewees around the world were generally more satisfied with synchronous virtual interviews and found them to be more effective than asynchronous virtual interviews. Three dimensions of national culture—uncertainty avoidance, long-term orientation, and indulgence—had small to medium moderating effects on these relationships.

Non‐Canonical Reactivity of Gold Carbene with Alkyne: An Overview of the Mechanistic Premise

AbstractThe unique nature of gold carbene and its synchronous counterpart gold‐stabilized carbocation, is mainly responsible for the non‐canonical reactivity profile that it demonstrates in comparison to any other transition metal carbene. Being an important subset to this class, reactions of gold carbene with alkyne sponsor products far more diverse than cyclopropenation as canonically expected in case of other transition metal carbenes. These gold‐catalyzed reactions have largely been proposed to follow either a [1,n]‐carbene transfer process or an alternate pathway involving a direct interception of the β‐gold vinyl cation with a nucleophile at the cationic carbon. Despite of a clear distinction in structure, bonding and energy of a vinyl gold carbene and β‐gold vinyl cation; they have been found to exhibit identical reactivities like cyclopropenation, C(sp2)–H insertion, etc. making it extremely difficult to “experimentally” investigate and validate a mechanistic pathway. It is because of lack of conclusive experimental evidence, in addition to the limited number of detailed computational studies, that multiple pathways have been proposed simultaneously to rationalize the product formation. As an effort to shed light on the mechanisms of these reactions, herein, documentation of these reactions with a focus on their mechanistic premise has been presented.

Gathering robots in graphs: The central role of synchronicity

The Gathering task for k robots disposed on the n vertices of a graph G requires robots to move toward a common vertex from where they do not move anymore.When dealing with very weak robots in terms of capabilities, considering synchronous or asynchronous settings may heavily affect the feasibility of the problem. In fact, even though dealing with asynchronous robots in general requires more sophisticated strategies with respect to the synchronous counterpart, sometimes it comes out that asynchronous robots simply cannot solve the problem whereas synchronous robots can.We study general properties of graphs that can be exploited in order to accomplish the gathering task in the synchronous setting, obtaining an interesting and innovative sufficient condition for the feasibility of the gathering task in graphs, regardless the topology.Furthermore, we consider dense and symmetric graphs like complete and complete bipartite graphs where in general the topology does not allow to distinguish vertices where to finalize the gathering. In such topologies, we fully characterize the solvability of the gathering task in the synchronous setting by suitably combining some strategies arising from the general approach with specific techniques dictated by the considered topologies.From the lower bound point of view in terms of number of synchronous time units required to accomplish the gathering task, in general nothing better than Ω(DG), with DG being the diameter of the input graph G, can be provided. For both complete and complete bipartite graphs, we prove a lower bound of Ω(logϕ⁡k), with ϕ being the well-known golden ratio. Combined with the provided algorithms, this reveals to be asymptotically tight for complete graphs while for complete bipartite graphs an additive factor of δ(k) is achieved, with δ(k) being the function that returns the number of divisors of the integer k.

WSEE Optimization Using Asynchronous ADMM for Massive MIMO Two-Way Relaying

We decentrally optimize the weighted sum energy efficiency (WSEE) of a multi-pair two-way half-duplex massive multi-input multi-output relaying. We use asynchronous alternating direction method of multipliers (aADMM) optimization approach, which is robust to node delays and failures. We analytically prove its convergence under a bounded delay assumption. We numerically show that the proposed aADMM approach yields similar WSEE and improved computational efficiency than its synchronous counterpart.

A Mixed-Integer and Asynchronous Level Decomposition with Application to the Stochastic Hydrothermal Unit-Commitment Problem

Independent System Operators (ISOs) worldwide face the ever-increasing challenge of coping with uncertainties, which requires sophisticated algorithms for solving unit-commitment (UC) problems of increasing complexity in less-and-less time. Hence, decomposition methods are appealing options to produce easier-to-handle problems that can hopefully return good solutions at reasonable times. When applied to two-stage stochastic models, decomposition often yields subproblems that are embarrassingly parallel. Synchronous parallel-computing techniques are applied to the decomposable subproblem and frequently result in considerable time savings. However, due to the inherent run-time differences amongst the subproblem’s optimization models, unequal equipment, and communication overheads, synchronous approaches may underuse the computing resources. Consequently, asynchronous computing constitutes a natural enhancement to existing methods. In this work, we propose a novel extension of the asynchronous level decomposition to solve stochastic hydrothermal UC problems with mixed-integer variables in the first stage. In addition, we combine this novel method with an efficient task allocation to yield an innovative algorithm that far outperforms the current state-of-the-art. We provide convergence analysis of our proposal and assess its computational performance on a testbed consisting of 54 problems from a 46-bus system. Results show that our asynchronous algorithm outperforms its synchronous counterpart in terms of wall-clock computing time in 40% of the problems, providing time savings averaging about 45%, while also reducing the standard deviation of running times over the testbed in the order of 25%.