Switching Transition Research Articles

Perovskite BiFeO3–BaTiO3 Ferroelectrics: Engineering Properties by Domain Evolution and Thermal Depolarization Modification

AbstractBismuth ferrite (BFO)‐based ceramics with large electromechanical response are important in electronic device applications. To better understand their physical mechanisms, a new phase diagram established by temperature dependence of dielectric properties, temperature dependence of piezoelectric coefficient, and the evolution of their properties is proposed to explain the contribution of piezoelectric and strain response by comparing ferroelectric (FE) and relaxor ferroelectric (RFE) compositions. The FE components with macrodomains have large piezoelectric constant (d33 of 412 pC/N) at high temperature. The RFE components with nanodomains possess giant strain response (Suni = 0.37%) at 180 °C. Combined with in situ and ex situ techniques, the physical mechanisms behind the enhancement of these properties are explored. Macrodomains and multipolar phase coexistence contribute to the piezoelectricity improvement. Nanodomains and an unstable depolarization temperature (Td) region engineer the strain enhancement, which can promote electric‐field‐induced domain switching, lattice strain, and irreversible phase transition. In particular, the Td region of BiFeO3‐based ceramics has been ignored for several years, although it is actually an effective medium to engineer properties. The proposed phase diagram and dynamic model can be used to well understand the structural origins of large electromechanical properties in BFO‐based ceramics, which can give some guidance to explore materials with excellent properties for different applications.

A Five-Level Space Vector Modulation Scheme for Parallel Operated Three-Level Inverters With Reduced Line Current Distortion

Parallel operation of voltage source inverters is useful to achieve larger power capacity and improve the system reliability, which has become the trend of power system design. However, the current harmonic of the parallel system is the same as that of every inverter when synchronized pulses are used for the paralleled inverters. The interleaved operation is helpful to reduce the current distortion, though the space left for improvement is limited, and high-frequency circulating current inevitably emerges. A novel parallel operation scheme based on five-level space vector modulation applied on two parallel three-level inverters is proposed in this article, which can provide reduced line current distortion, smaller zero-sequence circulating current, and less switching transitions. Theoretical analysis reveals that it is viable to operate the parallel three-level inverters as a single five-level system, and specific criteria of switching sequences design are presented to ensure the simple implementation. A neutral point balancing algorithm is also developed based on the specific switching sequences of the proposed modulation process, which is essential to the normal function of the system. The simulation and experimental results verify that the proposed scheme has superior performance compared with the synchronized and the interleaved operation.

An electronic synapse device based on aluminum nitride memristor for neuromorphic computing application

Brain-inspired computing is believed to have a better performance compared with the conventional von Neumann computing. The synaptic electronic device is the most important component of a neuromorphic circuit. In this study, we present an aluminum nitride (AlN) based memristor as the synaptic weight element in a functional neural network for handwritten digit recognition. Reliable and stable resistive switching behaviors were successfully demonstrated in the AlN based memristor. Moreover, it also possesses excellent features for neuromorphic applications such as long retention (>104 s), and multi-level storage. Continuous and smooth gradual set and reset switching transition can be modulated by applying appropriate compliance current limits and reset stop voltages. We particularly examined long-term potentiation and long-term depression and improved the linearity by optimizing pulse response conditions. Finally, the symmetric and linear synaptic behaviors which can be utilized in a neural network simulation are obtained. Simulations using the MNIST handwritten recognition data set prove that the AlN based memristor can operate with an online learning accuracy of 95%. Our work suggests AlN based memristor has potential for using as an electronic synapse in future neuromorphic systems.

Novel Approach to Analyze Crosstalk for a Multi-Line Bus System at 32-nm Technology

This research paper presents a novel approach to analyze the crosstalk-induced delay of multi-layered graphene nanoribbon (MLGNR) and multi-walled carbon nanotube (MWCNT) interconnects. A multi-line driver-interconnect-load (DIL) system is employed to analyze the crosstalk-induced delay for different switching transitions. The interconnect lines of the proposed DIL are said to be operated by either a resistive or a CMOS, or a CNFET driver for different switching transitions at 32-nm technology. Using the unique CNFET driver, the victim line of the multi-level MLGNR/MWCNT-based bus system experiences a delay almost 57.25% and 31.62% lesser in comparison to a resistive driver and a CMOS interconnect driver, respectively. Additionally, the overall worst-case delays are reduced by 89.45% and 98.98% for MLGNR in comparison to an equivalent MWCNT at 100[Formula: see text][Formula: see text]m and 1,000[Formula: see text][Formula: see text]m interconnect lengths, respectively.

Forming-Less Compliance-Free Multistate Memristors as Synaptic Connections for Brain-Inspired Computing

Hardware realization of artificial neural networks (ANNs) requires analogue weights to be encoded into the device conductances via blind update and access operations, leveraging Kirchhoff’s circuit laws. However, most memristive solutions lag behind in this aspect due to numerous device nonidealities, like limited number of addressable states, need for a stringent compliance current control, and an electroforming process. By modulating the oxygen vacancy profile of tin oxide switching elements, here we design and evaluate multistate memristors as synaptic connections for brain-inspired computing. Harnessing the advantages of a forming-less compliance-free operation, our devices display gradual switching transitions across multiple conductance states, sufficing the switching requirements of synaptic connections in an ANN. The soft boundary conditions are analyzed systematically, and spike-based plasticity rules, state-dependent spike-timing-dependent-plasticity (STDP) modulations, ternary digital logic, and analogue updatability schemes are proposed and demonstrated comprehensively to establish the analogue programming window of our memristors.

Rebound behaviour of uncoordinated EMS and their impact minimisation

In this paper, the impacts of uncoordinated energy management systems (EMS), with a rebound effect, on a renewable energy-dependent microgrid are discussed and feasible solutions are presented. Two different approaches, i.e. load-based and price-based EMS are modelled which consider PV units, battery energy storage systems (BESS), and electric vehicles (EVs). Taking account of each component's boundary conditions, the load-based approach intelligently charges the EV and BESS from the grid/PV during off-peak hours, and provides a combined discharge response during peak load hours. In the price-based approach, the charging-discharging of BESSs and EVs from/to grid and PV depends on the time-of-use tariff signal. The primary objective of both models is to minimise the customers' peak electricity consumption and the saturation issues of distribution transformers. It is observed that the simultaneous response of the EMS due to the identical behaviour of load or price curves, and the rebound effect after mode switching transition create large power demand spikes. To mitigate its negative consequence, an improved locking and randomisation technique is designed and implemented. Additionally, the impact of the PV power fluctuations on the load-support systems due to fast-moving clouds and their consequences to the behaviour of the EMS response are investigated.

Investigations on a 0.5-THz Ultrabroadband, Continuously Frequency-Tunable Gyrotron

Continuously frequency-tunable terahertz (THz) gyrotrons are attractive for modern applications. Nevertheless, it is challenging to generate a broadband, continuously frequency-tunable range for a single-mode operation gyrotron. In this article, a frequency-tuning scheme based on multimode switching and axial mode transition is employed to effectively enhance the frequency-tunable capacity of a THz gyrotron. A 0.5-THz broadband, continuously frequency-tunable gyrotron with four operating modes TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5,7,q</sub> , TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10,5,q</sub> , TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3,8,q</sub> , and TE <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1,9,q</sub> (q = 1, 2, 3...) working successively has been theoretically investigated in detail and the principle of the operating mechanism is proposed in this article. By means of changing the operating magnetic field and the beam energy, the four operating modes are excited successively. Numerically calculated results show that a 10-GHz level continuous frequency tuning range is obtainable. The frequency can be tuned from 500.3 to 510.8 GHz successively. Meanwhile, the output power always remains at hundreds of watts level, which is typically favorable for modern applications. Besides, the corresponding magnetron injection gun (MIG) is optimized to meet the requirements of the broadband frequency-tunable gyrotron. The electron beam quality versus the operating voltage or the operating magnetic field has also been studied. The principle could benefit the development of broadband, frequency-tunable THz gyrotrons.

Statistical Method of Estimating Semiconductor Switching Transition Time Enabling Condition Monitoring of Megawatt Converters

Detection of insulated-gate bipolar transistor (IGBT) switching transition time ( $t_{\text {tr}}$ ) is a promising temperature-sensitive electrical parameter (TSEP) for condition monitoring of IGBT power modules in converters for wind turbines. The accuracy required on $t_{\text {tr}}$ detection is in nanoseconds, which typically requires precision timing circuitry, or analog-to-digital converter (ADC) rates in hundreds of megasamples per second (MS/s). A method of calculating the statistically estimated switching transition time ( $\hat {t}_{\text {tr}}$ ) is proposed in this article. During multiple switching transitions of an IGBT, the IGBT collector–emitter voltage (vce) may be sampled with sample rates in sub-MS/s rates, yet with statistical accuracy on estimated $\hat {t}_{\text {tr}}$ in nanoseconds. A standalone converter monitoring unit (CMU), which samples vce and IGBT current ( $i_{c}$ ), was mounted in the converter of a multi-megawatt (MW) field test wind turbine. The proposed method is validated by testing it on field data from the CMU and by testing it on synthetically generated data. The proposed method is an enabler for low-cost monitoring of converters for wind-turbine field applications.

A fast and flexible nearest-level-equivalent space vector modulation algorithm for three-phase multilevel converters

This paper presents a nearest-level-equivalent space vector modulation (SVM) algorithm for three-phase multilevel converters. The proposed algorithm provides a simple approach to obtain three modulation vectors online based on basic vectors. In addition, the principle of nearest-level modulation (NLM) is applied in the proposed SVM to make its superior performance to the generalized SVM algorithms, which present: (1) Merely one modulation vertex need to be detected and three-phase duty cycles are obtained. Therefore, the unbalanced voltages of inner cell of neutral-point-clamped cascaded multilevel converter (NPC-CMC) can be addressed; (2) Redundant and optimized switching sequences are automatically generated to minimize the number of switching transition; (3) Different modulation modes can be flexibly chosen to optimize the harmonic benefit. The proposed SVM scheme is independent of level numbers and finally verified by simulation and experimental results.

ANALYSIS OF DATA SKIPPING USING LOW TRANSITION SWITCH REGISTERS

The emerging scenario in the fields of VLSI testing has its own demand for fault diagnosis in VLSI circuits. If the area and size of the circuit increases the problem of test generation time becoming very tough. Efficient techniques for test generations are essential in order to reduce the test generation time and size. In Existing methods, Low transition Switch Register (LTSR) applies the corresponding repeated patterns of the generated test data. The complication in the LTSR technique exponentially increases power with respect to the circuit size. In case of circuit which has more stuck-at-fault, the LTSR method fails to provide suitable fault coverage and low power consumption. The proposed test data skipping scheme using Reconfigurable Johnson counter reduces the test data volume from the multiple test pattern and reduces switching transitions by skipping the test sequence mostly between the consecutive test sequences. The RJC based Test data skipping scheme has additional circuit which consists of various counters, Bit skipping circuit and logic gates. Memory unit consists of the whole test sequence then these test sequences are fed to RJC and Switching Transition counter. The consecutive test sequence are eliminated or skipped by comparing those counters and the state analysis of FSM. The proposed test data skipping scheme circuit is developed to achieve minimum test patterns and reduced scan power by skipping long scan chain switching activities. This present work with the above mentioned issues for LTSR and existing in VLSI circuits is to examine all detectable faults with proposed circuit. The Efficiency of such system is tested by Xilinx and ISE tools to generate test patterns to achieve high fault coverage with low power consumption over the conventional systems.

Single particle Raman spectroscopy analysis of the metal-organic framework DUT-8(Ni) switching transition under hydrostatic pressure.

Experimental in situ observations of phase coexistence in switchable metal-organic frameworks are reported to provide a fundamental understanding of dynamic adsorbents that can change their pore structure in response to external stimuli. A prototypical flexible pillared layer framework DUT-8(Ni) (DUT = Dresden University of Technology) was studied under hydrostatic pressure by in situ Raman spectroscopy on single crystals. The closing transition of the open pore phase (op) containing DMF in the pores in silicon oil as a pressure transmitting fluid, as well as the closed pore phase (cp) to op transition under pressure in methanol, were studied. Phase coexistences during both transitions were observed.

Fixed Switching Frequency Direct Model Predictive Control With Continuous and Discontinuous Modulation for Grid-Tied Converters With LCL Filters

This article proposes two alternatives of a direct model predictive control (MPC) scheme for a three-phase two-level grid-connected converter with an LCL filter. Although both approaches are implemented as direct control methods, i.e., they combine control and modulation in one computational stage, they operate the converter at a constant switching frequency and generate a discrete grid current harmonic spectrum. To achieve this, the first method allows for one switching transition per phase and sampling interval, implying that a fixed modulation cycle akin to pulsewidth modulation (PWM) results. Moreover, by appropriately designing the objective function of the optimization problem underlying MPC, grid current distortions similar to those of space vector modulation (SVM) are produced. As for the second approach, two phases are allowed to switch per sampling interval, emulating the behavior of discontinuous PWM. Consequently, due to the introduced formulations, harmonic limitations imposed by relevant grid codes can be met with the proposed methods. Furthermore, due to the multiple-input multiple-output (MIMO) nature of both approaches, all output variables of the system can be simultaneously controlled. Finally, the inherent full-state information of MPC renders an additional active damping loop unnecessary, further simplifying the controller design. The presented performance assessment highlights the potential benefits of both proposed MPC-based algorithms.

Identification of Markov Jump Autoregressive Processes from Large Noisy Data Sets

This paper introduces a novel methodology for the identification of switching dynamics for switched autoregressive linear models. Switching behavior is assumed to follow a Markov model. The system’s outputs are contaminated by possibly large values of measurement noise. Although the procedure provided can handle other noise distributions, for simplicity, it is assumed that the distribution is Normal with unknown variance. Given noisy input-output data, we aim at identifying switched system coefficients, parameters of the noise distribution, dynamics of switching and probability transition matrix of Markovian model. System dynamics are estimated using previous results which exploit algebraic constraints that system trajectories have to satisfy. Switching dynamics are computed with solving a maximum likelihood estimation problem. The efficiency of proposed approach is shown with several academic examples. Although the noise to output ratio can be high, the method is shown to be effective in the situations where a large number of measurements is available.

Prediction Method of Driving Strategy of High-Power IGBT Module Based on MEA-BP Neural Network

An insulated gate bipolar transistor (IGBT) driver is crucial for improving the reliability of a power electronics system. This paper proposes a method for predicting the optimal driving strategy of high-power IGBT module based on backpropagation neural network optimized by the mind evolutionary algorithm in order to solve the problem of compromise among switching loss, switching time and overshoot and achieve a good driving effect. The three regions of switching transitions are analyzed based on the switching characteristics of the IGBT module. Neural networks are established to predict turn-on and turn-off driving strategies for variable gate resistance active gate driver of the IGBT module. The mind evolutionary algorithm is used to optimize the weights and biases of the neural networks so that the optimal weights and biases can be obtained. In order to verify the effectiveness of the driving strategy prediction method proposed in this paper, experiments are carried out for 4500V/900A the IGBT module. Compared to the conventional gate driver, the predicted driving strategies reduce the turn-on energy loss, turn-on time, overcurrent, comprehensive evaluation method, turn-on delay time and tail voltage duration by 59.31%, 46.38%, 36.99%, 65.65%, 1.9 μs, 2.9 μs, respectively. It was also found that the Planar-IGBT turn-off process was rarely affected by the gate resistance. The proposed method in this paper can be used not only for the guidance of the driving strategy determination of high-power the IGBT module driver, but also for the driver circuit improvement in the design process.

Design and analysis of space vector pulse width modulation techniques for Z-source inverter

This paper presents the design, analysis and digital implementation of space vector PWM-based various switching sequences for the Z-source inverter. Three main type of switching sequences have been taken, these are continuous switching sequence, basic bus clamping, and advanced bus clamping. Each of these sequences is designed in order to achieve symmetry in output line voltage. Two main control techniques, maximum boost, and maximum constant boost have been used to analyse each sequence in terms of switching transition per sample and duration of positive dc bus clamping. The novelty of the paper is the design of all switching sequence considering the conditions of symmetry and the implementation of advanced bus clamping techniques in the area of Z-source inverters. Simulation and experimental results have been presented to verify the design.

Water hammer analysis when switching of parallel pumps based on contra-motion check valve

In this paper, the close process of contra-motion check valve in countercurrent pressure difference is studied in nuclear power plant experimental circuit. The transient mathematical model is established. Through the dynamic grid technique, transient flow field in different conditions of valve closing are calculated, and dynamic properties of valve head closing process is analyzed. Through the CFD transient analysis, inherent damping principle and inhibition of water hammer principle are revealed. By writing water hammer analysis, the inhibitation ability of water hammer in typical six conditions is analyzed. At last the performance verification experiments show that contra-motion check valve can effectively inhibit water hammer in the process of parallel double pump switching transition.

A novel energy-efficient framework (NEEF) for the wireless body sensor network

Increasing the availability of wireless body sensor network is obligatory to monitor the patient inside and outside the hospital environment. Major amount of energy dissipated in the sensor node is through the enormous switching transitions in the transceiving unit, and hence, it becomes essential to minimize the switching transitions to prolong the lifetime of the network. Also, the packet holding cost in terms of energy influences the network lifetime to a greater extent. The novel energy-efficient framework (NEEF) approach provides a solution for lifetime problem and availability problem in the network. The subject is modeled as finite state machine with normal, abnormal and above normal states. The packet in the cluster head is transmitted once it reaches the threshold level. The critical packet is hoped through high energy node to ensure safe data communication. The framework is evaluated with Fail Safe Fault Tolerant algorithm. The lifetime enhancement is achieved through reducing the switching loss of the transceivers circuit. The NEEF provides extended lifetime and throughput and the framework also promotes improved half-life period. The first dead node in case of NEEF framework is high. The NEEF ensures high availability and extended lifetime.

A Minimum Switch Five-Level Unidirectional Rectifier Without Any Voltage Balancing and Pre-Charging Circuitry

This paper proposes a three-phase, five-level, non-regenerative pulsewidth modulated rectifier using only two active switches (minimum required) per phase, which drastically reduces gate driver requirement and hardware complexity. It draws sinusoidal input current at close to unity power factor. All the semiconductor devices are rated at only one fourth of the dc-link voltage, and none of them requires any transient voltage balancing snubber. A total of 8 out of the 14 diodes per phase undergo soft switching transition under all operating conditions, which increases its efficiency. No extra hardware circuitry for balancing the flying capacitors (FCs) or the dc-link mid-point voltage are required, which further reduces hardware complexity and increases the conversion efficiency. The proposed topology does not need any sophisticated startup procedure for charging the FCs either, which solves the problem of semiconductor overvoltage during starting. A 3-kW laboratory prototype is built to experimentally verify the proposed topology. The maximum efficiency obtained from the prototype is 98.7%, and it is always more than 96% for the load range from 15% to its rated.

Thermal Performance and Reliability Analysis of a Medium-Voltage Three-Phase Inverter Considering the Influence of High $dv/dt$ on Parasitic Filter Elements

In recent years, the use of silicon carbide (SiC) power semiconductor devices in medium-voltage (MV) applications has been made possible due to the development of high blocking voltage (10–15 kV)-based devices. While the use of these devices brings in a lot of advantages, the semiconductor devices are exposed to high peak stress (of up to 15 kV) and a very high $dv/dt$ (of up to 100 kV/ $\mu \text{s}$ ). The high $dv/dt$ across the devices leads to a high $dv/dt$ across other components connected to the system. This makes the effect of the parasitic capacitance across the components to be of paramount importance since an additional current flows through the components and, consequently, through the switching device. This additional current flows during each switching transition and leads to increased switching losses in the device. This article analyzes the effect of these additional losses on the lifetime of the device. The thermal performance of a three-phase inverter power block is provided, and a mission profile (solar irradiance and temperature)-based analysis is carried out to account for the additional junction temperature rise. The rainflow counting method is implemented to identify the mean and amplitude of each thermal cycle. An empirical device lifetime model is used to calculate the number of cycles to failure. Finally, the Palgrem Miner rule is used to quantify the total damage in the device. Comparisons have been carried out on basis of lifetime for both the cases (with and without the influence of parasitic capacitances). This analysis can be helpful in validating the importance of the design of filter inductors in these MV applications.

Design and Validation of A 250-kW All-Silicon Carbide High-Density Three-Level T-Type Inverter

This article presents a comprehensive design and validation of a compact all-silicon carbide (SiC) 250-kW T-type traction inverter with a power density of 25 kW/l and 98.5% peak efficiency. All the operation modes and switching transitions in a T-type phase leg are analyzed to model the semiconductor power losses over a fundamental cycle. Special attention has been paid to investigate the behavior and losses due to the reverse conduction of the SiC MOSFETs. Then a loss model is built based upon this analysis to calculate the device loss distribution and system efficiency, which is further used to determine the optimal switching frequency. In addition, detailed inverter system design and prototyping procedure, including the selection of SiC modules and dc-link capacitors, and the optimization of a four-layer laminated busbar, are presented. In this article, the T-type phase leg is formed by a normal half-bridge module and a common-source module. The switching performance and losses in this configuration are different from two-level topology that only uses one SiC module. Therefore, the switching performance and the associated switching energy in each switch position are characterized using a custom clamped inductive load (CIL) test setup designed for a T-type phase leg. The performance of the full power traction inverter prototype has been verified experimentally using pulse testing and continuous power testing.